text:
/* Includes ------------------------------------------------------------------*/
#include "stm32mp1xx_hal.h"

/** @addtogroup STM32MP1xx_HAL_Driver
  * @{
  */

/** @defgroup TIMEx TIMEx
  * @brief TIM Extended HAL module driver
  * @{
  */

#ifdef HAL_TIM_MODULE_ENABLED

/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
#define BDTR_BKF_SHIFT (16)
#define BDTR_BK2F_SHIFT (20)
#define TIMx_ETRSEL_MASK ((uint32_t)0x003C000)
#define TIMx_TIxSEL_MASK ((uint32_t)0x000000F)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState);

/* Private functions ---------------------------------------------------------*/

/* Exported functions --------------------------------------------------------*/
/** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
  * @{
  */

/** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
  * @brief    TIM Hall Sensor functions
  *
@verbatim
  ==============================================================================
                      ##### TIM Hall Sensor functions #####
  ==============================================================================
  [..]
    This section provides functions allowing to:
    (+) Initialize and configure TIM HAL Sensor.
    (+) De-initialize TIM HAL Sensor.
    (+) Start the Hall Sensor Interface.
    (+) Stop the Hall Sensor Interface.
    (+) Start the Hall Sensor Interface and enable interrupts.
    (+) Stop the Hall Sensor Interface and disable interrupts.
    (+) Start the Hall Sensor Interface and enable DMA transfers.
    (+) Stop the Hall Sensor Interface and disable DMA transfers.

@endverbatim
  * @{
  */
/**
  * @brief  Initializes the TIM Hall Sensor Interface and initialize the associated handle.
  * @param  htim: TIM Encoder Interface handle
  * @param  sConfig: TIM Hall Sensor configuration structure.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig)
{
  TIM_OC_InitTypeDef OC_Config;

  /* Check the TIM handle allocation */
  if(htim == NULL)
  {
    return HAL_ERROR;
  }

  assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
  assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
  assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));

  if(htim->State == HAL_TIM_STATE_RESET)
  {
    /* Allocate lock resource and initialize it */
    htim->Lock = HAL_UNLOCKED;

    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
    HAL_TIMEx_HallSensor_MspInit(htim);
  }

  /* Set the TIM state */
  htim->State = HAL_TIM_STATE_BUSY;

  /* Configure the Time base in the Encoder Mode */
  TIM_Base_SetConfig(htim->Instance, &htim->Init);

  /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the  Hall sensor */
  TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);

  /* Reset the IC1PSC Bits */
  htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
  /* Set the IC1PSC value */
  htim->Instance->CCMR1 |= sConfig->IC1Prescaler;

  /* Enable the Hall sensor interface (XOR function of the three inputs) */
  htim->Instance->CR2 |= TIM_CR2_TI1S;

  /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
  htim->Instance->SMCR &= ~TIM_SMCR_TS;
  htim->Instance->SMCR |= TIM_TS_TI1F_ED;

  /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
  htim->Instance->SMCR &= ~TIM_SMCR_SMS;
  htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;

  /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
  OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
  OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
  OC_Config.OCMode = TIM_OCMODE_PWM2;
  OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
  OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
  OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
  OC_Config.Pulse = sConfig->Commutation_Delay;

  TIM_OC2_SetConfig(htim->Instance, &OC_Config);

  /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
    register to 101 */
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
  htim->Instance->CR2 |= TIM_TRGO_OC2REF;

  /* Initialize the TIM state*/
  htim->State= HAL_TIM_STATE_READY;

  return HAL_OK;
}

/**
  * @brief  DeInitialize the TIM Hall Sensor interface
  * @param  htim: TIM Hall Sensor handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
{
  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

  htim->State = HAL_TIM_STATE_BUSY;

  /* Disable the TIM Peripheral Clock */
  __HAL_TIM_DISABLE(htim);

  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  HAL_TIMEx_HallSensor_MspDeInit(htim);

  /* Change TIM state */
  htim->State = HAL_TIM_STATE_RESET;

  /* Release Lock */
  __HAL_UNLOCK(htim);

  return HAL_OK;
}

/**
  * @brief  Initializes the TIM Hall Sensor MSP.
  * @param  htim: TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
{
	/* Prevent unused argument(s) compilation warning */
  UNUSED(htim);

  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
   */
}

/**
  * @brief  DeInitialize TIM Hall Sensor MSP.
  * @param  htim: TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
{
	/* Prevent unused argument(s) compilation warning */
  UNUSED(htim);

  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
   */
}

/**
  * @brief  Starts the TIM Hall Sensor Interface.
  * @param  htim : TIM Hall Sensor handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
{
  /* Check the parameters */
  assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));

  /* Enable the Input Capture channels 1
    (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);

  /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the TIM Hall sensor Interface.
  * @param  htim : TIM Hall Sensor handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
{
  /* Check the parameters */
  assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));

  /* Disable the Input Capture channels 1, 2 and 3
    (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);

  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Starts the TIM Hall Sensor Interface in interrupt mode.
  * @param  htim : TIM Hall Sensor handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
{
  /* Check the parameters */
  assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));

  /* Enable the capture compare Interrupts 1 event */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);

  /* Enable the Input Capture channels 1
    (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);

  /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the TIM Hall Sensor Interface in interrupt mode.
  * @param  htim : TIM handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
{
  /* Check the parameters */
  assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));

  /* Disable the Input Capture channels 1
    (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);

  /* Disable the capture compare Interrupts event */
  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);

  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Starts the TIM Hall Sensor Interface in DMA mode.
  * @param  htim : TIM Hall Sensor handle.
  * @param  pData: The destination Buffer address.
  * @param  Length: The length of data to be transferred from TIM peripheral to memory.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
{
  /* Check the parameters */
  assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));

   if((htim->State) == (HAL_TIM_STATE_BUSY))
  {
     return HAL_BUSY;
  }
  else if((htim->State) == (HAL_TIM_STATE_READY))
  {
    if(((uint32_t)pData == 0 ) && (Length > 0))
    {
      return HAL_ERROR;
    }
    else
    {
      htim->State = HAL_TIM_STATE_BUSY;
    }
  }
  /* Enable the Input Capture channels 1
    (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);

  /* Set the DMA Input Capture 1 Callback */
  htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
  /* Set the DMA error callback */
  htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;

  /* Enable the DMA channel for Capture 1*/
  HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);

  /* Enable the capture compare 1 Interrupt */
  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);

  /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the TIM Hall Sensor Interface in DMA mode.
  * @param  htim : TIM handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
{
  /* Check the parameters */
  assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));

  /* Disable the Input Capture channels 1
    (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);

  /* Disable the capture compare Interrupts 1 event */
  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);

  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @}
  */

/** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
  *  @brief   TIM Complementary Output Compare functions
  *
@verbatim
  ==============================================================================
              ##### TIM Complementary Output Compare functions #####
  ==============================================================================
  [..]
    This section provides functions allowing to:
    (+) Start the Complementary Output Compare/PWM.
    (+) Stop the Complementary Output Compare/PWM.
    (+) Start the Complementary Output Compare/PWM and enable interrupts.
    (+) Stop the Complementary Output Compare/PWM and disable interrupts.
    (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
    (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.

@endverbatim
  * @{
  */

/**
  * @brief  Starts the TIM Output Compare signal generation on the complementary
  *         output.
  * @param  htim : TIM Output Compare handle
  * @param  Channel : TIM Channel to be enabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

     /* Enable the Capture compare channel N */
     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);

  /* Enable the Main Ouput */
    __HAL_TIM_MOE_ENABLE(htim);

  /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the TIM Output Compare signal generation on the complementary
  *         output.
  * @param  htim : TIM handle
  * @param  Channel : TIM Channel to be disabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

    /* Disable the Capture compare channel N */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);

  /* Disable the Main Ouput */
    __HAL_TIM_MOE_DISABLE(htim);

  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Starts the TIM Output Compare signal generation in interrupt mode
  *         on the complementary output.
  * @param  htim : TIM OC handle
  * @param  Channel : TIM Channel to be enabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  switch (Channel)
  {
    case TIM_CHANNEL_1:
    {
      /* Enable the TIM Output Compare interrupt */
      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
    }
    break;

    case TIM_CHANNEL_2:
    {
      /* Enable the TIM Output Compare interrupt */
      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
    }
    break;

    case TIM_CHANNEL_3:
    {
      /* Enable the TIM Output Compare interrupt */
      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
    }
    break;

    default:
    break;
  }

	/* Enable the TIM Break interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);

	/* Enable the Capture compare channel N */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);

  /* Enable the Main Ouput */
  __HAL_TIM_MOE_ENABLE(htim);

  /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the TIM Output Compare signal generation in interrupt mode
  *         on the complementary output.
  * @param  htim : TIM Output Compare handle.
  * @param  Channel : TIM Channel to be disabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
	uint32_t tmpccer = 0;

  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  switch (Channel)
  {
    case TIM_CHANNEL_1:
    {
      /* Disable the TIM Output Compare interrupt */
      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
    }
    break;

    case TIM_CHANNEL_2:
    {
      /* Disable the TIM Output Compare interrupt */
      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
    }
    break;

    case TIM_CHANNEL_3:
    {
      /* Disable the TIM Output Compare interrupt */
      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
    }
    break;

    default:
    break;
  }

  /* Disable the Capture compare channel N */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);

	/* Disable the TIM Break interrupt (only if no more channel is active) */
  tmpccer = htim->Instance->CCER;
  if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
  {
    __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  }

  /* Disable the Main Ouput */
    __HAL_TIM_MOE_DISABLE(htim);

  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Starts the TIM Output Compare signal generation in DMA mode
  *         on the complementary output.
  * @param  htim : TIM Output Compare handle
  * @param  Channel : TIM Channel to be enabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @param  pData: The source Buffer address.
  * @param  Length: The length of data to be transferred from memory to TIM peripheral
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
{
  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  if((htim->State) == (HAL_TIM_STATE_BUSY))
  {
     return HAL_BUSY;
  }
  else if((htim->State) == (HAL_TIM_STATE_READY))
  {
    if(((uint32_t)pData == 0 ) && (Length > 0))
    {
      return HAL_ERROR;
    }
    else
    {
      htim->State = HAL_TIM_STATE_BUSY;
    }
  }
  switch (Channel)
  {
    case TIM_CHANNEL_1:
    {
      /* Set the DMA Period elapsed callback */
      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;

      /* Set the DMA error callback */
      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;

      /* Enable the DMA channel */
      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);

      /* Enable the TIM Output Compare DMA request */
      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
    }
    break;

    case TIM_CHANNEL_2:
    {
      /* Set the DMA Period elapsed callback */
      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;

      /* Set the DMA error callback */
      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;

      /* Enable the DMA channel */
      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);

      /* Enable the TIM Output Compare DMA request */
      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
    }
    break;

    case TIM_CHANNEL_3:
{
      /* Set the DMA Period elapsed callback */
      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;

      /* Set the DMA error callback */
      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;

      /* Enable the DMA channel */
      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);

      /* Enable the TIM Output Compare DMA request */
      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
    }
    break;

    default:
    break;
  }

  /* Enable the Capture compare channel N */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);

  /* Enable the Main Ouput */
  __HAL_TIM_MOE_ENABLE(htim);

  /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the TIM Output Compare signal generation in DMA mode
  *         on the complementary output.
  * @param  htim : TIM Output Compare handle
  * @param  Channel : TIM Channel to be disabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
{
  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  switch (Channel)
  {
    case TIM_CHANNEL_1:
    {
      /* Disable the TIM Output Compare DMA request */
      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
    }
    break;

    case TIM_CHANNEL_2:
    {
      /* Disable the TIM Output Compare DMA request */
      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
    }
    break;

    case TIM_CHANNEL_3:
    {
      /* Disable the TIM Output Compare DMA request */
      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
    }
    break;

    default:
    break;
  }

  /* Disable the Capture compare channel N */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);

  /* Disable the Main Ouput */
  __HAL_TIM_MOE_DISABLE(htim);

  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);

  /* Change the htim state */
  htim->State = HAL_TIM_STATE_READY;

  /* Return function status */
  return HAL_OK;
}

/**
  * @}
  */

/** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
  * @brief    TIM Complementary PWM functions
  *
@verbatim
  ==============================================================================
                 ##### TIM Complementary PWM functions #####
  ==============================================================================
  [..]
    This section provides functions allowing to:
    (+) Start the Complementary PWM.
    (+) Stop the Complementary PWM.
    (+) Start the Complementary PWM and enable interrupts.
    (+) Stop the Complementary PWM and disable interrupts.
    (+) Start the Complementary PWM and enable DMA transfers.
    (+) Stop the Complementary PWM and disable DMA transfers.
    (+) Start the Complementary Input Capture measurement.
    (+) Stop the Complementary Input Capture.
    (+) Start the Complementary Input Capture and enable interrupts.
    (+) Stop the Complementary Input Capture and disable interrupts.
    (+) Start the Complementary Input Capture and enable DMA transfers.
    (+) Stop the Complementary Input Capture and disable DMA transfers.
    (+) Start the Complementary One Pulse generation.
    (+) Stop the Complementary One Pulse.
    (+) Start the Complementary One Pulse and enable interrupts.
    (+) Stop the Complementary One Pulse and disable interrupts.

@endverbatim
  * @{
  */

/**
  * @brief  Starts the PWM signal generation on the complementary output.
  * @param  htim : TIM handle
  * @param  Channel : TIM Channel to be enabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  /* Enable the complementary PWM output  */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);

  /* Enable the Main Ouput */
  __HAL_TIM_MOE_ENABLE(htim);

  /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the PWM signal generation on the complementary output.
  * @param  htim : TIM handle
  * @param  Channel : TIM Channel to be disabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  /* Disable the complementary PWM output  */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);

  /* Disable the Main Ouput */
  __HAL_TIM_MOE_DISABLE(htim);

  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Starts the PWM signal generation in interrupt mode on the
  *         complementary output.
  * @param  htim : TIM handle
  * @param  Channel : TIM Channel to be disabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  switch (Channel)
  {
    case TIM_CHANNEL_1:
    {
      /* Enable the TIM Capture/Compare 1 interrupt */
      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
    }
    break;

    case TIM_CHANNEL_2:
    {
      /* Enable the TIM Capture/Compare 2 interrupt */
      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
    }
    break;

    case TIM_CHANNEL_3:
    {
      /* Enable the TIM Capture/Compare 3 interrupt */
      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
    }
    break;

    default:
    break;
  }

  /* Enable the TIM Break interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);

  /* Enable the complementary PWM output  */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);

  /* Enable the Main Ouput */
  __HAL_TIM_MOE_ENABLE(htim);

  /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the PWM signal generation in interrupt mode on the
  *         complementary output.
  * @param  htim : TIM handle
  * @param  Channel : TIM Channel to be disabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
{
  uint32_t tmpccer = 0;

  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  switch (Channel)
  {
    case TIM_CHANNEL_1:
    {
      /* Disable the TIM Capture/Compare 1 interrupt */
      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
    }
    break;

    case TIM_CHANNEL_2:
    {
      /* Disable the TIM Capture/Compare 2 interrupt */
      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
    }
    break;

    case TIM_CHANNEL_3:
    {
      /* Disable the TIM Capture/Compare 3 interrupt */
      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
    }
    break;

    default:
    break;
  }

  /* Disable the complementary PWM output  */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);

	/* Disable the TIM Break interrupt (only if no more channel is active) */
  tmpccer = htim->Instance->CCER;
  if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
  {
    __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  }

  /* Disable the Main Ouput */
  __HAL_TIM_MOE_DISABLE(htim);

  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Start the TIM PWM signal generation in DMA mode on the
  *         complementary output
  * @param  htim : TIM handle
  * @param  Channel : TIM Channel to be enabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @param  pData: The source Buffer address.
  * @param  Length: The length of data to be transferred from memory to TIM peripheral
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
{
  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  if((htim->State) == (HAL_TIM_STATE_BUSY))
  {
     return HAL_BUSY;
  }
  else if((htim->State) == (HAL_TIM_STATE_READY))
  {
    if(((uint32_t)pData == 0 ) && (Length > 0))
    {
      return HAL_ERROR;
    }
    else
    {
      htim->State = HAL_TIM_STATE_BUSY;
    }
  }
  switch (Channel)
  {
    case TIM_CHANNEL_1:
    {
      /* Set the DMA Period elapsed callback */
      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;

      /* Set the DMA error callback */
      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;

      /* Enable the DMA channel */
      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);

      /* Enable the TIM Capture/Compare 1 DMA request */
      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
    }
    break;

    case TIM_CHANNEL_2:
    {
      /* Set the DMA Period elapsed callback */
      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;

      /* Set the DMA error callback */
      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;

      /* Enable the DMA channel */
      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);

      /* Enable the TIM Capture/Compare 2 DMA request */
      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
    }
    break;

    case TIM_CHANNEL_3:
    {
      /* Set the DMA Period elapsed callback */
      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;

      /* Set the DMA error callback */
      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;

      /* Enable the DMA channel */
      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);

      /* Enable the TIM Capture/Compare 3 DMA request */
      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
    }
    break;

    default:
    break;
  }

  /* Enable the complementary PWM output  */
     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);

  /* Enable the Main Ouput */
    __HAL_TIM_MOE_ENABLE(htim);

  /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the TIM PWM signal generation in DMA mode on the complementary
  *         output
  * @param  htim : TIM handle
  * @param  Channel : TIM Channel to be disabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
{
  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  switch (Channel)
  {
    case TIM_CHANNEL_1:
    {
      /* Disable the TIM Capture/Compare 1 DMA request */
      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
    }
    break;

    case TIM_CHANNEL_2:
    {
      /* Disable the TIM Capture/Compare 2 DMA request */
      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
    }
    break;

    case TIM_CHANNEL_3:
    {
      /* Disable the TIM Capture/Compare 3 DMA request */
      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
    }
    break;

    default:
    break;
  }

  /* Disable the complementary PWM output */
    TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);

  /* Disable the Main Ouput */
    __HAL_TIM_MOE_DISABLE(htim);

  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);

  /* Change the htim state */
  htim->State = HAL_TIM_STATE_READY;

  /* Return function status */
  return HAL_OK;
}

/**
  * @}
  */

/** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
  * @brief    TIM Complementary One Pulse functions
  *
@verbatim
  ==============================================================================
                ##### TIM Complementary One Pulse functions #####
  ==============================================================================
  [..]
    This section provides functions allowing to:
    (+) Start the Complementary One Pulse generation.
    (+) Stop the Complementary One Pulse.
    (+) Start the Complementary One Pulse and enable interrupts.
    (+) Stop the Complementary One Pulse and disable interrupts.

@endverbatim
  * @{
  */

/**
  * @brief  Starts the TIM One Pulse signal generation on the complemetary
  *         output.
  * @param  htim : TIM One Pulse handle
  * @param  OutputChannel : TIM Channel to be enabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  {
  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));

  /* Enable the complementary One Pulse output */
  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);

  /* Enable the Main Ouput */
  __HAL_TIM_MOE_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the TIM One Pulse signal generation on the complementary
  *         output.
  * @param  htim : TIM One Pulse handle
  * @param  OutputChannel : TIM Channel to be disabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
{

  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));

  /* Disable the complementary One Pulse output */
    TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);

  /* Disable the Main Ouput */
    __HAL_TIM_MOE_DISABLE(htim);

  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Starts the TIM One Pulse signal generation in interrupt mode on the
  *         complementary channel.
  * @param  htim : TIM One Pulse handle
  * @param  OutputChannel : TIM Channel to be enabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
{
  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));

  /* Enable the TIM Capture/Compare 1 interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);

  /* Enable the TIM Capture/Compare 2 interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);

  /* Enable the complementary One Pulse output */
  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);

  /* Enable the Main Ouput */
  __HAL_TIM_MOE_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
  }

/**
  * @brief  Stops the TIM One Pulse signal generation in interrupt mode on the
  *         complementary channel.
  * @param  htim : TIM One Pulse handle
  * @param  OutputChannel : TIM Channel to be disabled.
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
{
  /* Check the parameters */
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));

  /* Disable the TIM Capture/Compare 1 interrupt */
  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);

  /* Disable the TIM Capture/Compare 2 interrupt */
  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);

  /* Disable the complementary One Pulse output */
  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);

  /* Disable the Main Ouput */
  __HAL_TIM_MOE_DISABLE(htim);

  /* Disable the Peripheral */
   __HAL_TIM_DISABLE(htim);

  /* Return function status */
  return HAL_OK;
}

/**
  * @}
  */
/** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
  * @brief    Peripheral Control functions
  *
@verbatim
  ==============================================================================
                    ##### Peripheral Control functions #####
  ==============================================================================
  [..]
    This section provides functions allowing to:
    (+) Configure the commutation event in case of use of the Hall sensor interface.
      (+) Configure Output channels for OC and PWM mode.
      (+) Configure Complementary channels, break features and dead time.
      (+) Configure Master synchronization.
      (+) Configure timer remapping capabilities.
      (+) Enable or disable channel grouping

@endverbatim
  * @{
  */
/**
  * @brief  Configure the TIM commutation event sequence.
  * @note: this function is mandatory to use the commutation event in order to
  *        update the configuration at each commutation detection on the TRGI input of the Timer,
  *        the typical use of this feature is with the use of another Timer(interface Timer)
  *        configured in Hall sensor interface, this interface Timer will generate the
  *        commutation at its TRGO output (connected to Timer used in this function) each time
  *        the TI1 of the Interface Timer detect a commutation at its input TI1.
  * @param  htim: TIM handle
  * @param  InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor.
  *          This parameter can be one of the following values:
  *            @arg TIM_TS_ITR0: Internal trigger 0 selected
  *            @arg TIM_TS_ITR1: Internal trigger 1 selected
  *            @arg TIM_TS_ITR2: Internal trigger 2 selected
  *            @arg TIM_TS_ITR3: Internal trigger 3 selected
  *            @arg TIM_TS_NONE: No trigger is needed
  * @param  CommutationSource : the Commutation Event source.
  *          This parameter can be one of the following values:
  *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource)
{
  /* Check the parameters */
  assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));

  __HAL_LOCK(htim);

  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
      (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  {
    /* Select the Input trigger */
    htim->Instance->SMCR &= ~TIM_SMCR_TS;
    htim->Instance->SMCR |= InputTrigger;
  }

  /* Select the Capture Compare preload feature */
  htim->Instance->CR2 |= TIM_CR2_CCPC;
  /* Select the Commutation event source */
  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  htim->Instance->CR2 |= CommutationSource;

  __HAL_UNLOCK(htim);

  return HAL_OK;
}

/**
  * @brief  Configure the TIM commutation event sequence with interrupt.
  * @note: this function is mandatory to use the commutation event in order to
  *        update the configuration at each commutation detection on the TRGI input of the Timer,
  *        the typical use of this feature is with the use of another Timer(interface Timer)
  *        configured in Hall sensor interface, this interface Timer will generate the
  *        commutation at its TRGO output (connected to Timer used in this function) each time
  *        the TI1 of the Interface Timer detect a commutation at its input TI1.
  * @param  htim: TIM handle
  * @param  InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor.
  *          This parameter can be one of the following values:
  *            @arg TIM_TS_ITR0: Internal trigger 0 selected
  *            @arg TIM_TS_ITR1: Internal trigger 1 selected
  *            @arg TIM_TS_ITR2: Internal trigger 2 selected
  *            @arg TIM_TS_ITR3: Internal trigger 3 selected
  *            @arg TIM_TS_NONE: No trigger is needed
  * @param  CommutationSource : the Commutation Event source.
  *          This parameter can be one of the following values:
  *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource)
{
  /* Check the parameters */
  assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));

  __HAL_LOCK(htim);

  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
      (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  {
    /* Select the Input trigger */
    htim->Instance->SMCR &= ~TIM_SMCR_TS;
    htim->Instance->SMCR |= InputTrigger;
  }

  /* Select the Capture Compare preload feature */
  htim->Instance->CR2 |= TIM_CR2_CCPC;
  /* Select the Commutation event source */
  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  htim->Instance->CR2 |= CommutationSource;

  /* Enable the Commutation Interrupt Request */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);

  __HAL_UNLOCK(htim);

  return HAL_OK;
}

/**
  * @brief  Configure the TIM commutation event sequence with DMA.
  * @note: this function is mandatory to use the commutation event in order to
  *        update the configuration at each commutation detection on the TRGI input of the Timer,
  *        the typical use of this feature is with the use of another Timer(interface Timer)
  *        configured in Hall sensor interface, this interface Timer will generate the
  *        commutation at its TRGO output (connected to Timer used in this function) each time
  *        the TI1 of the Interface Timer detect a commutation at its input TI1.
  * @note:  The user should configure the DMA in his own software, in This function only the COMDE bit is set.
  * @param  htim: TIM handle
  * @param  InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor.
  *          This parameter can be one of the following values:
  *            @arg TIM_TS_ITR0: Internal trigger 0 selected
  *            @arg TIM_TS_ITR1: Internal trigger 1 selected
  *            @arg TIM_TS_ITR2: Internal trigger 2 selected
  *            @arg TIM_TS_ITR3: Internal trigger 3 selected
  *            @arg TIM_TS_NONE: No trigger is needed
  * @param  CommutationSource : the Commutation Event source.
  *          This parameter can be one of the following values:
  *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource)
{
  /* Check the parameters */
  assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));

  __HAL_LOCK(htim);

  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
      (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  {
    /* Select the Input trigger */
    htim->Instance->SMCR &= ~TIM_SMCR_TS;
    htim->Instance->SMCR |= InputTrigger;
  }

  /* Select the Capture Compare preload feature */
  htim->Instance->CR2 |= TIM_CR2_CCPC;
  /* Select the Commutation event source */
  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  htim->Instance->CR2 |= CommutationSource;

  /* Enable the Commutation DMA Request */
  /* Set the DMA Commutation Callback */
  htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt;
  /* Set the DMA error callback */
  htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError;

  /* Enable the Commutation DMA Request */
  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);

  __HAL_UNLOCK(htim);

  return HAL_OK;
}

/**
  * @brief  Configures the TIM in master mode.
  * @param  htim: TIM handle.
  * @param  sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that
  *         contains the selected trigger output (TRGO) and the Master/Slave
  *         mode.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
                                                      TIM_MasterConfigTypeDef * sMasterConfig)
{
  uint32_t tmpcr2;
  uint32_t tmpsmcr;

  /* Check the parameters */
  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));

  /* Check input state */
  __HAL_LOCK(htim);

 /* Get the TIMx CR2 register value */
  tmpcr2 = htim->Instance->CR2;

  /* Get the TIMx SMCR register value */
  tmpsmcr = htim->Instance->SMCR;

  /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
  if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
  {
    /* Check the parameters */
    assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));

    /* Clear the MMS2 bits */
    tmpcr2 &= ~TIM_CR2_MMS2;
    /* Select the TRGO2 source*/
    tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
  }

  /* Reset the MMS Bits */
  tmpcr2 &= ~TIM_CR2_MMS;
  /* Select the TRGO source */
  tmpcr2 |=  sMasterConfig->MasterOutputTrigger;

  /* Reset the MSM Bit */
  tmpsmcr &= ~TIM_SMCR_MSM;
  /* Set master mode */
  tmpsmcr |= sMasterConfig->MasterSlaveMode;

  /* Update TIMx CR2 */
  htim->Instance->CR2 = tmpcr2;

  /* Update TIMx SMCR */
  htim->Instance->SMCR = tmpsmcr;

  __HAL_UNLOCK(htim);

  return HAL_OK;
}

/**
  * @brief   Configures the Break feature, dead time, Lock level, OSSI/OSSR State
  *         and the AOE(automatic output enable).
  * @param  htim: TIM handle
  * @param  sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
  *         contains the BDTR Register configuration  information for the TIM peripheral.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
                                                TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig)
{
  uint32_t tmpbdtr = 0;

  /* Check the parameters */
  assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
  assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
  assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
  assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
	assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
  assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
  assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
  assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
  assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));

  /* Check input state */
  __HAL_LOCK(htim);

  /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
     the OSSI State, the dead time value and the Automatic Output Enable Bit */

  /* Set the BDTR bits */
  MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
  MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
  MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
  MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
  MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
  MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT));

  if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
  {
    assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
    assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
    assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));

    /* Set the BREAK2 input related BDTR bits */
    MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << BDTR_BK2F_SHIFT));
    MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
    MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
  }

  /* Set TIMx_BDTR */
  htim->Instance->BDTR = tmpbdtr;

  __HAL_UNLOCK(htim);

  return HAL_OK;
}

/**
  * @brief  Configures the break input source.
  * @param  htim: TIM handle.
  * @param  BreakInput: Break input to configure.
  *          This parameter can be one of the following values:
  *            @arg TIM_BREAKINPUT_BRK: Timer break input
  *            @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
  * @param  sBreakInputConfig: Break input source configuration
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
                                             uint32_t BreakInput,
                                             TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)

{
  uint32_t tmporx = 0;
  uint32_t bkin_enable_mask = 0;
  uint32_t bkin_polarity_mask = 0;
  uint32_t bkin_enable_bitpos = 0;
  uint32_t bkin_polarity_bitpos = 0;

  /* Check the parameters */
  assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
  assert_param(IS_TIM_BREAKINPUT(BreakInput));
  assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
  assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
  if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
  {
    assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
  }

  /* Check input state */
  __HAL_LOCK(htim);

  switch(sBreakInputConfig->Source)
  {
  case TIM_BREAKINPUTSOURCE_BKIN:
    {
      bkin_enable_mask = TIM1_AF1_BKINE;
      bkin_enable_bitpos = 0;
      bkin_polarity_mask = TIM1_AF1_BKINP;
      bkin_polarity_bitpos = 9;
    }
    break;
  case TIM_BREAKINPUTSOURCE_DFSDM1:
    {
      bkin_enable_mask = TIM1_AF1_BKDFBK0E;
      bkin_enable_bitpos = 8;
    }
    break;

  default:
    break;
  }

  switch(BreakInput)
  {
    case TIM_BREAKINPUT_BRK:
      {
        /* Get the TIMx_OR2 register value */
        tmporx = htim->Instance->AF1;

        /* Enable the break input */
        tmporx &= ~bkin_enable_mask;
        tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;

        /* Set the break input polarity */
        if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
        {
          tmporx &= ~bkin_polarity_mask;
          tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
        }

        /* Set TIMx_OR2 */
        htim->Instance->AF1 = tmporx;
      }
        break;
    case TIM_BREAKINPUT_BRK2:
      {
        /* Get the TIMx_OR3 register value */
        tmporx = htim->Instance->AF2;

        /* Enable the break input */
        tmporx &= ~bkin_enable_mask;
        tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;

        /* Set the break input polarity */
        if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
        {
          tmporx &= ~bkin_polarity_mask;
          tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
        }

        /* Set TIMx_OR3 */
        htim->Instance->AF2 = tmporx;
      }
      break;
  default:
    break;
  }

  __HAL_UNLOCK(htim);

  return HAL_OK;
}

/**
  * @brief  Configures the TIMx Remapping input capabilities.
  * @param  htim: TIM handle.
  * @param  Remap: specifies the TIM remapping source.
  *         For TIM1, the parameter is one of the following values:
	*            @arg TIM_TIM1_ETR_GPIO:                TIM1_ETR is connected to GPIO
  *            @arg TIM_TIM1_ETR_ADC1_AWD1:           TIM1_ETR is connected to ADC1 AWD1
  *            @arg TIM_TIM1_ETR_ADC1_AWD2:           TIM1_ETR is connected to ADC1 AWD2
  *            @arg TIM_TIM1_ETR_ADC1_AWD3:           TIM1_ETR is connected to ADC1 AWD3
  *            @arg TIM_TIM1_ETR_ADC3_AWD1:           TIM1_ETR is connected to ADC3 AWD1
  *            @arg TIM_TIM1_ETR_ADC3_AWD2:           TIM1_ETR is connected to ADC3 AWD2
  *            @arg TIM_TIM1_ETR_ADC3_AWD3:           TIM1_ETR is connected to ADC3 AWD3:
  *
  *         For TIM2, the parameter is one of the following values:
  *            @arg TIM_TIM2_ETR_GPIO:                TIM2_ETR is connected to GPIO
	*            @arg TIM_TIM2_ETR_LSE:                 TIM2_ETR is connected to LSE
	*            @arg TIM_TIM2_ETR_SAI1_FSA:            TIM2_ETR is connected to SAI1 FS_A
	*            @arg TIM_TIM2_ETR_SAI1_FSB:            TIM2_ETR is connected to SAI1 FS_B
  *
  *         For TIM3, the parameter is one of the following values:
  *            @arg TIM_TIM3_ETR_GPIO:                TIM3_ETR is connected to GPIO
  *
  *         For TIM5, the parameter is one of the following values:
  *            @arg TIM_TIM5_ETR_GPIO:                TIM5_ETR is connected to GPIO
	*            @arg TIM_TIM5_ETR_SAI2_FSA:            TIM5_ETR is connected to SAI2 FS_A
	*            @arg TIM_TIM5_ETR_SAI2_FSB:            TIM5_ETR is connected to SAI2 FS_B
  *
  *         For TIM8, the parameter is one of the following values:
	*            @arg TIM_TIM8_ETR_GPIO:               TIM8_ETR is connected to GPIO
  *            @arg TIM_TIM8_ETR_ADC2_AWD1:          TIM8_ETR is connected to ADC2 AWD1
  *            @arg TIM_TIM8_ETR_ADC2_AWD2:          TIM8_ETR is connected to ADC2 AWD2
  *            @arg TIM_TIM8_ETR_ADC2_AWD3:          TIM8_ETR is connected to ADC2 AWD3
  *            @arg TIM_TIM8_ETR_ADC3_AWD1:          TIM8_ETR is connected to ADC3 AWD1
  *            @arg TIM_TIM8_ETR_ADC3_AWD2:          TIM8_ETR is connected to ADC3 AWD2
  *            @arg TIM_TIM8_ETR_ADC3_AWD3:          TIM8_ETR is connected to ADC3 AWD3
  *
  *
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
{
  uint32_t tmpor2 = 0;

  __HAL_LOCK(htim);

  /* Check parameters */
  assert_param(IS_TIM_ETRSEL_INSTANCE(htim->Instance));
  assert_param(IS_TIM_ETRREMAP(Remap));

  tmpor2 = htim->Instance->AF1;
  tmpor2 &= ~TIMx_ETRSEL_MASK;
  tmpor2 |= (Remap & TIMx_ETRSEL_MASK);

  /* Set TIMx_OR2 */
  htim->Instance->AF1 = tmpor2;

  htim->State = HAL_TIM_STATE_READY;

  __HAL_UNLOCK(htim);

  return HAL_OK;
}

/**
  * @brief  Configures the TIMx input Selection capabilities.
  * @param  htim: TIM handle.
  * @param  TISelection : parameter of the TIM_TISelectionStruct structure.
  * @param  Channel: specifies the channels that will be selected for configuration:
  *              @arg TIM_CHANNEL_1: TIM Channel 1
  *              @arg TIM_CHANNEL_2: TIM Channel 2
  *              @arg TIM_CHANNEL_3: TIM Channel 3
  *              @arg TIM_CHANNEL_4: TIM Channel 4
  *
  *         TISelection parameter of the TIM_TISelectionStruct structure is detailed as follows:
  *         For TIM1, the parameter is one of the following values:
  *            @arg TIM_TIM1_TI1_GPIO:                TIM1 TI1 is connected to GPIO
  *
  *         For TIM2, the parameter is one of the following values:
  *            @arg TIM_TIM2_TI4_GPIO:                TIM2 TI4 is connected to GPIO
  *
  *         For TIM3, the parameter is one of the following values:
  *            @arg TIM_TIM3_TI1_GPIO:                TIM3 TI1 is connected to GPIO
  *
	*         For TIM5, the parameter is one of the following values:
  *            @arg TIM_TIM5_TI1_GPIO:                TIM5 TI1 is connected to GPIO
  *            @arg TIM_TIM5_TI1_CAN_TMP:             TIM5 TI1 is connected to CAN TMP
  *            @arg TIM_TIM5_TI1_CAN_RTP:             TIM5 TI1 is connected to CAN RTP
  *
  *         For TIM8, the parameter is one of the following values:
  *            @arg TIM_TIM8_TI1_GPIO:               TIM8 TI1 is connected to GPIO
  *
  *         For TIM15, the parameter is one of the following values:
  *            @arg TIM_TIM15_TI1_GPIO:              TIM15 TI1 is connected to GPIO
  *            @arg TIM_TIM15_TI1_TIM2:              TIM15 TI1 is connected to TIM2 CH1
	*            @arg TIM_TIM15_TI1_TIM3:              TIM15 TI1 is connected to TIM3 CH1
  *            @arg TIM_TIM15_TI1_TIM4:              TIM15 TI1 is connected to TIM4 CH1
  *            @arg TIM_TIM15_TI1_LSE:               TIM15 TI1 is connected to LSE
  *            @arg TIM_TIM15_TI1_CSI:               TIM15 TI1 is connected to CSI
  *            @arg TIM_TIM15_TI1_MCO2:              TIM15 TI1 is connected to MCO2
  *            @arg TIM_TIM15_TI2_GPIO:              TIM15 TI2 is connected to GPIO
  *            @arg TIM_TIM15_TI2_TIM2:              TIM15 TI2 is connected to TIM2 CH2
	*            @arg TIM_TIM15_TI2_TIM3:              TIM15 TI2 is connected to TIM3 CH2
  *            @arg TIM_TIM15_TI2_TIM4:              TIM15 TI2 is connected to TIM4 CH2
	*
  *         For TIM16, the parameter can have the following values:
  *            @arg TIM_TIM16_TI1_GPIO:              TIM16 TI1 is connected to GPIO
  *            @arg TIM_TIM16_TI1_LSI:               TIM16 TI1 is connected to LSI
  *            @arg TIM_TIM16_TI1_LSE:               TIM16 TI1 is connected to LSE
  *            @arg TIM_TIM16_TI1_RTC:               TIM16 TI1 is connected to RTC wakeup interrupt
  *
  *         For TIM17, the parameter can have the following values:
  *            @arg TIM_TIM17_TI1_GPIO:              TIM17 TI1 is connected to GPIO
  *            @arg TIM_TIM17_TI1_SPDIFFS:           TIM17 TI1 is connected to SPDIF FS
  *            @arg TIM_TIM17_TI1_HSE_1MHZ:          TIM17 TI1 is connected to HSE 1MHz
  *            @arg TIM_TIM17_TI1_MCO1:              TIM17 TI1 is connected to MCO1
  *
  * @retval HAL status
  */
HAL_StatusTypeDef  HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection , uint32_t Channel)
{
  uint32_t tmptisel = 0;

  __HAL_LOCK(htim);

  /* Check parameters */
  assert_param(IS_TIM_TISEL_INSTANCE(htim->Instance));
  assert_param(IS_TIM_TISEL(TISelection));

  tmptisel = htim->Instance->TISEL;

  tmptisel &= ~(TIMx_TIxSEL_MASK << (Channel << 2));
  tmptisel |= (TISelection);

  /* Set TIMx_TISEL */
  htim->Instance->TISEL = tmptisel;

  htim->State = HAL_TIM_STATE_READY;

  __HAL_UNLOCK(htim);

  return HAL_OK;
}
/**
  * @brief  Group channel 5 and channel 1, 2 or 3
  * @param  htim: TIM handle.
  * @param  Channels: specifies the reference signal(s) the OC5REF is combined with.
  *         This parameter can be any combination of the following values:
  *         TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
  *         TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
  *         TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF
  *         TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
{
  /* Check parameters */
  assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
  assert_param(IS_TIM_GROUPCH5(Channels));

  /* Process Locked */
  __HAL_LOCK(htim);

  htim->State = HAL_TIM_STATE_BUSY;

  /* Clear GC5Cx bit fields */
  htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3|TIM_CCR5_GC5C2|TIM_CCR5_GC5C1);

  /* Set GC5Cx bit fields */
  htim->Instance->CCR5 |= Channels;

  htim->State = HAL_TIM_STATE_READY;

  __HAL_UNLOCK(htim);

  return HAL_OK;
}

/**
  * @}
  */

/** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
  * @brief    Extended Callbacks functions
  *
@verbatim
  ==============================================================================
                    ##### Extended Callbacks functions #####
  ==============================================================================
  [..]
    This section provides Extended TIM callback functions:
    (+) TIM Commutation callback
    (+) TIM Break callback

@endverbatim
  * @{
  */

/**
  * @brief  Hall commutation changed callback in non blocking mode
  * @param  htim : TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim)
{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(htim);

  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_TIMEx_CommutationCallback could be implemented in the user file
   */
}

/**
  * @brief  Hall Break detection callback in non blocking mode
  * @param  htim : TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(htim);

  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_TIMEx_BreakCallback could be implemented in the user file
   */
}

/**
  * @}
  */

/** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
  * @brief    Extended Peripheral State functions
  *
@verbatim
  ==============================================================================
                ##### Extended Peripheral State functions #####
  ==============================================================================
  [..]
    This subsection permit to get in run-time the status of the peripheral
    and the data flow.

@endverbatim
  * @{
  */

/**
  * @brief  Return the TIM Hall Sensor interface state
  * @param  htim: TIM Hall Sensor handle
  * @retval HAL state
  */
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
{
  return htim->State;
}

/**
  * @}
  */

/**
  * @brief  TIM DMA Commutation callback.
  * @param  hdma : pointer to DMA handle.
  * @retval None
  */
void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
{
  TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;

  htim->State= HAL_TIM_STATE_READY;

  HAL_TIMEx_CommutationCallback(htim);
}

/**
  * @brief  Enables or disables the TIM Capture Compare Channel xN.
  * @param  TIMx to select the TIM peripheral
  * @param  Channel: specifies the TIM Channel
  *          This parameter can be one of the following values:
  *            @arg TIM_Channel_1: TIM Channel 1
  *            @arg TIM_Channel_2: TIM Channel 2
  *            @arg TIM_Channel_3: TIM Channel 3
  * @param  ChannelNState: specifies the TIM Channel CCxNE bit new state.
  *          This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
  * @retval None
  */
static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState)
{
  uint32_t tmp = 0;

  tmp = TIM_CCER_CC1NE << Channel;

  /* Reset the CCxNE Bit */
  TIMx->CCER &=  ~tmp;

  /* Set or reset the CCxNE Bit */
  TIMx->CCER |=  (uint32_t)(ChannelNState << Channel);
}

/**
  * @}
  */

#endif /* HAL_TIM_MODULE_ENABLED */
/**
  * @}
  */

/**
  * @}
  */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

redpajama_set_name: RedPajamaGithub


The new update 6.0.0.80 of WhiteRIP besides bugfixes and general improvement has added the support to new printers including Epson Stylus Photo R320, Epson Stylus Photo L800, Epson Stylus Photo L1800, Epson SureColor P600 and Epson SureColor P800. WhiteRIP team also communicates that WhiteRIP is NOT yet 100% compatible with the latest Microsoft O.S. Windows 10 but the 100% compatibility will be reached soon.


text:
Career Narrative
Nagual Masks
Masked Jewelry
AZ Museum for Youth
Caras y Mascaras Exhibit
Awards Created
Guerrero Family Music
Face to Face in a Frenzy
School Residencies
Día de los Muertos Activities and Workshops
Ancient Technology Day
Home / Education / Ancient Technology Day
By Carmen Guerrero
In Education, Performances, Uncategorized
Ancient Technology Day2019-03-062019-03-06https://zarkmask.com/wp-content/uploads/2017/02/Zarkmask-DarkBG-42.pngZarkmaskhttps://zarkmask.com/wp-content/uploads/2019/03/screen-shot-2019-03-05-at-5.27.52-pm.png200px200px
This year Cultural Coalition is proud to announce our participation in the 19th annual Ancient Technology Day at the Pueblo Grande Museum on March 9th, 2019.
People have lived in the Valley of the Sun for thousands of years. Centuries before the invention of air conditioning, modern architecture or automobiles, ancient people learned to use the resources of the Sonoran desert to thrive in large communities. These ingenious people were able to take this dry desert and, by diverting water systems, transform it into a bountiful farming valley. Ancient Technology Day is an event designed to celebrate the contributions of historic and prehistoric technologies in our modern lives.
Named Arizona's "Best Storyteller" of 2017 by the Phoenix New Times, Zarco Guerrero will be presenting his "River Stories". This performance tells the true tales of our Salt and Gila Rivers long before they were diverted. Guerrero relays these stories through the perspective of multiple lively characters, both ancient and historic, who were part of several migrations of people through these lands. This irreverent, poignant social commentary covers over 2000 years of the relationship between these rivers and the people who have called this desert home.
In addition to free admission, this event boasts tons of cultural exhibits, live demonstrations of historic technologies and arts and crafts stations for kids. Guests will be able to taste traditionally roasted agave, throw spears (atlatl) or try their hand at traditional weaving. As part of this special event the Park of Four Waters, an archeological site usually closed to the public, will be open for guided tours. Local artisans will explain how ancient peoples created beauty through beadwork, weaving and shell jewelry. You will also be able to purchase locally created art and frybread in the vendors' section.
This city of Phoenix event, produced with the aid of a grant from the Tohono O'odham Nation, is free to attend and open to all.
The event will take place March 9th, 9AM to 3PM at the Pueblo Grande Museum, 4619 East Washington Street, Phoenix. Please join us!
Carmen Guerrero
Gila and the Salt River stories at Tempe History Museum
Valley Metro Light Rail Station
Water Heritage Public Art Challenge Award
El Rancho Del Arte Apartments
© 2017 Zarco Guerrero, All Rights Reserved
I consent to Zarkmask collecting my details through this form.
Water Heritage Public Art Challenge AwardUncategorized
Valley Metro Light Rail StationExhibitions, Sculptures, Uncategorized, Visual Arts

redpajama_set_name: RedPajamaCommonCrawl


The duration of a presentation slot is 15 minutes. Please notice that, in general, this includes 12 minutes for presentation and 3 minutes for discussions with the audience.
Every session room will have an LCD projector and an electrical outlet (100V 60Hz, Japanese standard type). SICE 2013 will not provide laptops for presentation, i.e., YOU NEED YOUR LAPTOP FOR YOUR PRESENTATION. The connector from the LCD projector to your laptop is limited to a D-sub 15 pin male connection.
It is highly recommended to show up in your session room 10 minutes before the session starts. You should test the connection of your laptop with the LCD projector.
The poster sessions will be held at ES Lobby in E&S Building.
You need your printed poster. SICE 2013 WILL NOT PROVIDE ON-SITE PRINTING SERVICE. A board (approximately 1700 mm tall by 890 mm wide in size) will be provided for each poster presentation. An electrical outlet will NOT be available for each poster presentation.
Your poster must be setup before your session starts. Poster mounting items (pins) will be provided by SICE 2013. No-show presentations will be checked by SICE 2013 during the session.
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You will receive a few documents for chairing your session at Registration Desk. In particular you will have a list of presentation records to be filled for your session.
Please appear at the session room at least 5 minutes before the session starts. Please confirm that all the presenters are in the session room.
The duration of each talk is 15 minutes including discussions (about 12 minutes talk and a few minutes discussions would be standard). Please indicate the elapsed time to the speaker appropriately and be punctual to the session schedule.
In case of no-show, do not move to the next presentation. The session should be synchronized with all the presentations at other sessions.


text:
Oren Eini on DevOps Success at RavenDB (Part 2) - Episode 56
This is the second part to the two-episode series with Oren Eini! If you haven't listened to the first part already be sure to tune into that one first!
Oren Eini, pseudonym Ayende Rahien, is a frequent blogger at Ayende.com and has over 20 years of experience in the development world, with strong focuses on...
Today's guest is Oren Eini, pseudonym Ayende Rahien. Oren is a frequent blogger at Ayende.com and has over 20 years of experience in the development world, with strong focuses on the Microsoft and .NET ecosystem. As an internationally acclaimed presenter, Oren has appeared at DevTeach, JAOO (now GOTO) QCon, Oredev,...
Kayla Cinnamon and Rich Turner on DevOps on the Windows Terminal Team - Episode 54
On this week's podcast, Kayla Cinnamon and Rich Turner are joining the show! Kayla is a Program Manager on the Windows Terminal Team and has been working for Microsoft for the last 8 years, and Rich is a Senior Program Manager, also on the Windows Terminal Team and has been with Microsoft for nearly 4 years.
Kayla...
Jared Parsons on DevOps on the C# Compiler Team - Episode 53
Today, your host, Jeffrey Palermo is speaking with Jared Parsons, the Principal Developer Lead on the C# Compiler Team. Everybody tuning in probably uses his code on a day-to-day basis! Jared started out at Microsoft 15 years ago as a Developer; moved on to become a Senior Developer; then Principal Developer on Midori...
Patrick Smacchia on Static Code Analysis - Episode 52
Patrick Smacchia is the founder and CEO of NDepend — a tool for .NET static analysis — and has been in the software world for over 20 years. He's one of the world's top tier experts in static code analysis. And today, with more than 8,000 client companies (including many Fortune 500s), NDepend offers...


text:
Star Wars Battlefront: I Find Your Lack of Chat Disturbing
By Unknown November 24, 2015
After several scornful looks that quickly escalated to threats to life, limb, and eye sight, I have been forced to pull myself away from the Xbox One and EA's Star Wars Battlefront to write a thorough and non-biased review. First off, let me say that I am a huge Star Wars fan so being biased towards it is a thing I generally do. On the other hand, when it comes to Star Wars, I also am very strict. I grew up in an age when you spent two nights in a tent outside of a theater with other Star Wars fanatics to get the best seats in the theater for opening night. With all this being said, even though I am a huge Star Wars fan I feel that I can provide an honest in-depth review of this game
Let's start with the good. Star Wars Battlefront is probably the most beautifully rendered game I have ever laid my eyes on. The details in the graphics are amazing, breath-taking even. Finally there is a game that flexes the next gen graphics muscle that were intended for the available consoles. Dice (Battlefield) utilized amazing colors and textures to really submerge Battlefront players deeply into the Star Wars universe, whether on the snow covered mountains of Hoth or the jungle like forests on the moon of Endor. I found the gameplay immersive and encompassing. When I play a map on Tatooine, I feel that I am actually there. The weapon and card system is a creative way to customize your gameplay to suit your style. Dice, despite not throwing a campaign in the mix, gives players many different options to choose from in their multiplayer modes. Aerial fights, large map full scale battles, close quarter small map battles, and objective based game modes are all there. The ability to play as your favorite heroes (or villains) adds a unique element to the game that makes me feel like a kid on Christmas every time i see that hero token on the ground. The list of heroes for the Rebel side include Princess Leia, Luke Skywalker, and Han Solo. The playable villains include Emperor Palpatine, Darth Vader, and Boba Fett. Each hero or villain have their own increased amount of health/ defense, abilities, and play style; find which one suits you best and start mowing through swaths of enemies. The available vehicles in the game give a fairly authentic feel to aerial battles in the game. It is important to note that in future planned expansions Dice plans on adding more maps, vehicles, weapons, and cards to the mix. The first map expansion drops on December 8th with The Battle of Jakku. Those who pre-ordered Battlefront will have early access to the map starting on December 1st. The first full expansion is expected in early 2016.
*sigh* And now for the bad. Some things I can overlook in a game, but some decisions made by developers invoke a full face-palm reflex. What are those things you ask? Well, for starters, developing a game that requires strategy (especially in modes like walker assault and supremacy), why would you not add a communication feature? Why?! That seems like a very large oversight to have the players rely on external communication via party chat to communicate within the game. As of now, the weapons seem extremely unbalanced. Range and damage statistics seem to have little value when choosing a weapon. Add this to the almost non-existent weapon recoil and you can be sniped with a scopeless rifle by an opponent from halfway across the map. Taking cover behind a rock or wall provides little cover as I have been shot and killed by laser bolts through them many times. The spawn system is horrendous. I was playing yesterday and spawned in a huddle of three opponents that were so close together I was unable to move. Needless to say, I was granted a quick death. Lack of a campaign mode and a non-existent variety of maps make for an almost repetitive gameplay experience.
Despite my complaints, I feel that Dice was very successful in developing a game that Star Wars fans and gamers alike can enjoy. Through patches and expansions, I believe that Battlefront can be a game that is played and talked about for years to come. I hope to see you all online and see you before you see me.
Overall Rating: 8.75/10.0
Battlefront EA Electronic Arts J1ML Just One More Level PlayStation 4 Star Wars Xbox One
Labels: Battlefront EA Electronic Arts J1ML Just One More Level PlayStation 4 Star Wars Xbox One


This is the association industry's only event specifically for professional meeting planners. Learn from experts and each other about how to be the best meeting planner you can during two days at the uniquely beautiful The Craddock Terry Hotel and Event Center.
The agenda includes over 6 hours of CAE approved education on meeting planner topics.
Connect with and learn from fellow meeting planners.
Know your value as a meeting planner and what you bring to your organization.
Leverage your personal and professional development through volunteerism.
Peer into the projected outlook of the hospitality industry.
Learn best practices and new trends in meeting planning.
There will also be facilitated roundtable discussions. Bring your specific issues and learn from the experiences of your fellow planners. If you plan a meeting as part of your job, this is an event you do not want to miss.


War of the Rebellion: Serial 012 Page 0718 THE PENINSULAR CAMPAIGN,VA. Chapter XXIII.
to the assistance of General Martindale. The brigade returned left in front, and the regiments were formed in column by companies as they successively arrived in the wheat field in rear of Kinney's house.
At this point I was informed that Martin's battery had been silenced and two guns taken the enemy, and that General Martindale's command was in imminent danger. Although the men were very much fatigued by the long march, I appealed to them to hurry to the support of their comrades, and they obeyed with the utmost alacrity. I immediately pushed forward the Fourteenth New York along the Richmond road, where General Martindale was engaged. General Morell, commanding division, being present, took immediate command of this regiment, relieving the Second Maine Volunteers and Twenty-fifth New York Volunteers, which had theretofore borne the brunt of the attack, and had nearly on Martin's battery, but a destructive fire by battalion from the Fourteenth New York, followed by brisk and well-sustained file firing, compelled him to retire.
As the Fourteenth New York was engaged in front, the Sixty-second Pennsylvania and the Ninth Massachusetts entered the wood from the wheat field, the Ninth behind the Sixty-second, and attacked the enemy on his left flank. In a short time the retreat became a complete rout, and the enemy, closely pressed by the Ninth and Sixty-second, fled in every direction. The Fourteenth New York was then ordered by General Porter to cease firing and advance farther along the Richmond road to support Griffin's battery, which had taken position to open fire on the retreating enemy. The Ninth Massachusetts and Sixty-second Pennsylvania dark, when the Fourteenth and Sixty-second, by order of General Porter, were withdrawn and encamped with the Fourth Michigan on the open space in front of the wood. The Ninth Massachusetts remained in the wood until morning, when it returned and joined the rest of the brigade.
A large number of prisoners and a considerable quantity of arms were taken.
The Fourth Michigan Regiment was not engaged, but was held in reserve in the wheat field. The fierce and irresistible attack of the other regiments routed the enemy so completely that it was not necessary to bring the Fourth into action.
All the troops under my command displayed the utmost courage and coolness during the battle. Veterans could not have done better.
I am happy to report that the casualties in this brigade were comparatively few, as will be seen by the accompanying report.* A burial party, under command of Major Patterson, Sixty-second Pennsylvania, buried 1 mann of this command and 51 of the enemy.
Colonel, Commanding Second Brigade, Porter's Division.


text:
Q: Inserir múltiplos registros php mysql Estou desenvolvendo um site de autos e quando o usuário  fazer o cadastro do veículo ele tem a opção de inserir várias imagens do veículo. Eu tenho o código de upload, mas queria saber como inserir mais de uma imagem no campo de imagens da tabala (Exemplo Banco Dados: imagem_veiculo : 01.jpg, 02.jpg,...) ou não sei se é melhor fazer a inserção de múltiplas linhas em uma tabela específica.
Se alguém puder dar exemplos.
if(isset($_POST['upload'])){

    //INFO IMAGEM
    $file       = $_FILES['img'];
    $numFile    = count(array_filter($file['name']));

    //PASTA
    $folder     = 'upload';

    //REQUISITOS
    $permite    = array('image/jpeg', 'image/png');
    $maxSize    = 1024 * 1024 * 10;

    //MENSAGENS
    $msg        = array();
    $errorMsg   = array(
        1 => 'O arquivo enviado excede o limite definido na diretiva upload_max_filesize do php.ini.',
        2 => 'O arquivo excede o limite definido em MAX_FILE_SIZE no formulário HTML.',
        3 => 'O upload do arquivo foi feito parcialmente.',
        4 => 'Nenhum arquivo foi enviado.',
        6 => 'Pasta temporária ausênte.',
        7 => 'Falha em escrever o arquivo em disco.',
        8 => 'Uma extensão do PHP interrompeu o upload do arquivo.'
    );

    if($numFile <= 0)
        echo 'Selecione uma imagem!';
    else{
        for($i = 0; $i < $numFile; $i++){
            $name   = $file['name'][$i];
            $type   = $file['type'][$i];
            $size   = $file['size'][$i];
            $error  = $file['error'][$i];
            $tmp    = $file['tmp_name'][$i];

            $extensao = @end(explode('.', $name));
            $novoNome = rand().".$extensao";

            if($error != 0)
                $msg[] = "<b>$name : </b>".$errorMsg[$error];
            else if(!in_array($type, $permite))
                $msg[] = "<b>$name : </b> Erro imagem não suportada!";
            else if($size > $maxSize)
                $msg[] = "<b>$name : </b> Imagem ultrapassa limite de 10MB";
            else{

                if(move_uploaded_file($tmp, $folder."/".$novoNome))
                    $msg[] = "<b>$name : </b> Upload realizado com sucesso!";
                else{
                    $msg[] = "<b>$name : </b> Desculpe ocorreu um erro!";
                }

            }

        }

        $insert = "INSERT INTO upload
                    (imagens)
                    VALUES
                    ('{$novoNome}')";
        $exe_insert = mysql_query($insert, $con);

    }

}

A: O correto é você ter uma tabela de imagens, e colocar uma linha para cada imagem.
Nessa tabela você tem que ter o id que referencia o registro do veículo:
Exemplo:
Tabela de Veículos:
CREATE TABLE `test`.`veiculos`(
  `id` INT NOT NULL AUTO_INCREMENT,
  `marca` VARCHAR(50) DEFAULT '',
  `modelo` VARCHAR(100) DEFAULT '',
  `ano` YEAR,
  `datacadastro` DATETIME,
  `datamodificacao` DATETIME,
   PRIMARY KEY (`id`)
);

Tabela de Imagens
CREATE TABLE `test`.`imagens`(
  `id_veiculo` INT DEFAULT 0,
  `imagem` VARCHAR(255) DEFAULT ''
);

Já o INSERT você pode fazer em uma única query, por exemplo:
INSERT INTO imagens (id_veiculo, imagem) VALUES
(1, 'imagem1.jpg'),
(1, 'imagem2.jpg'),
(1, 'imagem3.jpg');

A: Ou também como amigo acima disse colocando:

create table images(
id int unsigned not null auto_increment,
id_veiculos int unsigned default null,
imagem blob not null,
primary key (id),
constraint fk_veiculos_id foreign key (id_veiculos) references veiculos(id)
);

A: Ola meu amigo veja estes link's:
http://blog.wieczorek.com.br/index.php/como-fazer-o-upload-de-arquivos-para-um-banco-de-dados-mysql-utilizando-o-php?blog=1
http://php.net/manual/pt_BR/features.file-upload.multiple.php
https://www.scriptbrasil.com.br/forum/topic/161933-mega-tutorial-upload-simples-e-multiplo/

redpajama_set_name: RedPajamaStackExchange


The 2012 Race for the White House.
During the 2000 Political race I was asked to make a prediction as to who would win the Presidential Election.
By using the combination of Numerology and Astrology, a month before the election, both in print and on the national morning TV shows, my Numbers/Astrology predicted that George Bush had a minuscule advantage over Al Gore. And, with retrograding Mercury throwing a Monkey Wrench into the communication sector, the planetary chaos surrounding the election could force the final decision into the hands of the Electoral College. And we all know the end of that National Saga.
In 2004 there was no Numerological/Astrological contest. Senator Kerry's chart indicates that he will remain a powerful force in US politics, but will never be President.
This brings us to the 2008 election of President Obama and the 2012 race for the White House.
For the 2008 Presidential election my Numbers/Astrology clearly pointed to a new President who (when I made this prediction in 2004), no one would remotely consider as a viable candidate for the Presidency. This ruled out the majority of the candidates. My Numbers/Astrology also predicted that this Revolutionary Presidency would change our National conscience and vision of the future.
Mr. Obama fit this Numerological/Astrological profile, and I cast my Election-prediction in his favor. However one of the more interesting aspects of President Obama's Astrological power is that he does not win the race – but his opponent (Among other things, Sarah Palin as VP?) lost the Presidential race.
The Numbers/Astrology also pointed out that the 2008 President would only serve one, four-year term. And according to my Numerological/Astrological prognostication, President Obama will serve out his term, but could make different choices for his future or simply not be re-elected.
President Obama's Astrological chart has a particularly lucky aspect in that, it's not that he wins his races — it's that his opponents lose the race. Between September 2011 and October 2012 President Obama is in a politically vulnerable phase: will face big challenges, roadblocks and adept political adversaries. But, if he chooses to run in 2012, once more, it will be his opponent – who wins or loses the race.
One More Thing: It's interesting to note, that even as Revolutionary as President Obama's presidency has been and continues to be, according to the Numbers/Astrology, it's the next (2012) President who will carry through and preside over an even more important turning point in the history of our beloved country.


text:
Free exchange | Health care reform
Score it
The health care bill, in a nutshell
By R.A. | WASHINGTON
EZRA KLEIN offers a sneak preview of the Congressional Budget Office's scoring of the Senate' health care reform bill, which has already passed and which will make up the final health reform law, give or take a reconciliation side-car:
According to a Democratic source, CBO has finished its work and will release the official preliminary score later today. But here are the basic numbers: The bill will cost $940 billion over the first 10 years and reduce the deficit by $130 billion during that period. In the second 10 years -- so, 2020 to 2029 -- it will reduce the deficit by $1.2 trillion. The legislation will cover 32 million Americans, or 95 percent of the legal population.
It doesn't strike the blow for cost control for which some had hoped, but that's not a terrible performance.
More from Free exchange
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Many children are still persecuted as alleged witches in Africa for similar reasons
Has BRICS lived up to expectations?
The bloc of big emerging economies is surprisingly good at keeping its promises
How to interpret a market plunge
Whether a sudden sharp decline in asset prices amounts to a meaningless blip or something more depends on mass psychology


080808 ran from 7pm New Zealand time on Friday 8 August until 1pm NZ time on Saturday 9 August. As NZ is ahead of most of the rest of the world, this means that for most of you, the festival ran during the day and evening of Friday 8 August.
BLOCK 1: 7pm-midnight NZ time, RL access nodes in Wellington (7pm-midnight) and Oslo (local time 10.30am-6pm).
BLOCK 2: 2am-8am Saturday 9th NZ time, RL access node in Munich (local time 7pm-10pm Friday 8th).
BLOCK 3: 9am-1pm Saturday 9th NZ time, RL access node in Wellington (local time 12 noon-1.30pm).
Times show are New Zealand times, with local times for the performers in each show. To find your own local time, use the link beside each performance.
During any gaps between performances, audience members joined the 080808 curators and artists on the 080808 Foyer Stage (click here).
The performances were all in English (with bits of other known and unknown languages) except Amazigh Storyteller, which was in French with a concurrent English translation.
BLOCK 1: 7pm-midnight NZ time, RL access nodes in Wellington (7pm-midnight) and Oslo (10.30am-6pm local time).
7.30pm NZ: "Workshop Zoo" – click here to enter the stage.
9.30am Belgrade; find your local time here.
8pm NZ: "Calling Home – The Big Get Together" – click here to enter the stage.
6pm Brisbane, 9am UK; find your local time here.
8.30pm NZ: "Noxiterra" – click here to enter the stage.
1.30am PST, 2pm Bangalore, 5.30pm Seoul; find your local time here.
9pm NZ: "Mysterious Mali's Drawings" – click here to enter the stage.
5pm Brisbane; find your local time here.
9.30pm NZ: "Water Under The Bridge" – click here to enter the stage.
2.30am California, 3pm Bangalore, 6.30pm Seoul; find your local time here.
10pm NZ: "RxEgo-Go" – click here to enter the stage.
6am USA,12pm Beograd, 8pm Brisbane; find your local time here.
10.30pm NZ: "I Miss You, Great to See You Again 2.0" – click here to enter the stage.
11pm NZ: "Veni! Ελθέ! Dodji! to the Zapata Private/Pirate Birthday Party. And, Vice Versa …" – click here to enter the stage.
1pm Beograd; find your local time here.
11.30pm NZ: "Colour Race" – click here to enter the stage.
1.30pm France; find your local time here.
BLOCK 2: 2am-8am Saturday 9th NZ time, RL access node in Munich (local time 7pm-9pm Friday 8th).
2am NZ, Sat. 9th: "Amazigh Story Teller" – click here to enter the stage.
Friday 5pm Lebanon; find your local time here.
2.30am NZ, Sat. 9th: "Workshop Zoo" – click here to enter the stage.
Friday 1pm Beograd; find your local time here.
3am NZ, Sat. 9th: "Noir Night …" – click here to enter the stage.
Friday 9.00am Colorado, 11.00am New York; find your local time here.
3.30am NZ, Sat. 9th: drinks and discussion in the 080808 Foyer – come on in!
4.30am NZ, Sat. 9th: " Merznet/" – click here to enter the stage.
Friday 9.30am PST; find your local time here.
5am NZ, Sat. 9th: drinks and discussion in the 080808 Foyer – come on in!
5.30am NZ, Sat. 9th: "Veni! Ελθέ! Dodji! to the Zapata Private/Pirate Birthday Party. And, Vice Versa …" – click here to enter the stage.
Friday 7.30pm Beograd; find your local time here.
6am NZ, Sat 9th: "Colour Race" – click here to enter the stage.
Friday 8pm France; find your local time here.
6.30am NZ, Sat. 9th: " Merznet/" – click here to enter the stage.
Friday 11.30am PST; find your local time here.
7am NZ, Sat 9th:"Noxiterra" – click here to enter the stage.
7.30am NZ, Sat 9th: "Water Under The Bridge" – click here to enter the stage.
Friday 12.30pm California, 9.30pm Munich, Saturday 1am Bangalore, 4.30am Seoul; find your local time here.
BLOCK 3: 9am-1.30pm Saturday 9th NZ time, RL access node in Wellington (local time 12noon-1.30pm).
9am NZ, Sat. 9th: "Binding" – click here to enter the stage.
Friday 4pm Montreal, USA, 11pm Istanbul; find your local time here.
9.30am NZ, Sat 9th: "RxEgo-Go" – click here to enter the stage.
Friday 5.30pm USA, 11.30pm Beograd, Sat 7.30am Brisbane; find your local time here.
10am NZ, Sat 9th: "Noxiterra" – click here to enter the stage.
Friday 3pm California, Sat. 3.30am Bangalore, 7am Seoul; find your local time here.
10.30am NZ, Sat 9th: "Calling Home – The Big Get Together" – click here to enter the stage.
Sat. 8.30am Brisbane, Friday 11.30pm Uk; find your local time here.
11am NZ, Sat 9th: "Mysterious Mali's Drawings" – click here to enter the stage.
9am Brisbane; find your local time here.
11.30am NZ, Sat 9th: "I Miss You, Great to See You Again 2.0" – click here to enter the stage.
12pm NZ, Sat 9th: "Noir Night …" – click here to enter the stage.
Friday 6.00pm Colorado, 8.00pm New York; find your local time here.
12.30pm NZ, Sat 9th: "Amazigh Story Teller" – click here to enter the stage.
Sat. 4am Lebanon; find your local time here.
1pm NZ, Sat 9th:" Merznet/" – click here to enter the stage.
Friday 6pm PST; find your local time here.