Ulefone T1 Android Smartphone comes with a powerful octa-core MTK Helio P25 CPU and 6GB RAM. It runs on Android 7.0.
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text:
What is a better alternative to the word rickety?
My sentence is "The system was so badly designed that it has now become rickety. Even a minor change could cause the entire system to collapse". Rickety just doesn't seem to fit well.
single-word-requests phrases adjectives
tr_questtr_quest
"Fragile" might be better in some contexts. – Hot Licks Oct 11 '15 at 13:43
Unstable should work. – Joe Dark Oct 11 '15 at 13:47
Which synonyms have you considered and rejected? – JHCL Oct 11 '15 at 14:03
You may say that the system is now "in unstable equilibrium" or that it may "collapse like a house of cards". – Graffito Oct 11 '15 at 20:55
I rather like rickety there, actually. – Hellion Oct 12 '15 at 15:05
You can use "(extremely) unstable" in place of rickety. When you describe systems and computer-related hardwares and softwares which are not stable in operation, you use "unstable" which is defined in Wiktionary:
(1) Having a strong tendency to change. (2) Fluctuating; not constant. (3) Fickle. (4) Unpredictable.
You could use unstable or unsound. Fragile would also work. Rickety seems to fit better when referring to furniture or a stair-case.
JaimsyJaimsy
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redpajama_set_name: RedPajamaCommonCrawl


Showcase your website design or interface design with this iPad Tablet Hand Hold Mockup. Just put your graphic in Smart Object Layer and save. Enjoy!
Present your website design with this photo-based mock up.


Christmas day can be fraught with difficulties or it can be enjoyable and fun. Those with IBS and who have found the miracle of the low Fodmap diet have more to prepare for than most. But there is no reason this can't be a special day for you too. Check out my five top tips for coping with a low Fodmap Christmas Day.
It is in your best interest not to make a fuss about what you can and can't eat or there could be some backlash with you ending up feeling bitter and twisted because your needs are not being taken into account by family members and friends. If your family are supportive, then let them know your main triggers like onion and garlic perhaps and then take the chance that the rest will be fine. Overwhelming them with dietary demands will usually end badly no matter how hard they try. This diet is the most complex one on earth so you can't expect others to understand it in a five minute conversation.
If yours is like our family, then you will be contributing something to the family feast. Make sure that is a low Fodmap dish that includes all the food groups so you have something you know you can eat for sure.
There are many more on my website.
3. Pre-prepare as much as possible in the previous days so there is no need to rush on the day itself. Have the meal already cooked and in the fridge with the car packed if you are travelling any distance to the event. Clean the house and set the table if Christmas is at your place and prepare as much food as possible. I have Christmas at my house this year and the stuffing will be done, the turkey prepared and ready for the oven so all I have to think about is the roast vegetables on the day. Everything else is brought by other family members. My stuffing and turkey and vegetable preparation will be low Fodmap so I will have plenty to eat. In my case, my family are very supportive of my dietary needs but I never expect them to go to any great lengths to accommodate my IBS because I always get enough to eat anyway.
4. Reduce your anxiety about the day to a minimum or that alone will cause symptoms even if you eat nothing wrong. If you have followed number one and two on this list, you will be organised and there will be no bad feeling going into the day. Remember that everyone is doing the best they can with who they are and try to forgive them their flaws. Start the day with ten minutes of deep breathing to calm down the stress reflex and keep your heartbeat slow and regular and to stop any adrenaline from flowing as if you were ready for a battle. Every hour or so, take a minute to repeat the deep breathing exercise to get your stress levels back down again. No one will even know you are doing it. That's the beauty of deep breathing – it highly effective and invisible to others. Any time someone says something that is a trigger for you – and families are great at that – take more deep breaths so you can stay in a calm, rational place and respond appropriately.
5. Get plenty of good quality sleep the night before. Eight hours uninterrupted will set you up for a calm, pleasant day. If you are sleep deprived, you will not only feel tired, but your IBS will suffer and your temper will be short. Not a good thing when surrounded by family and friends on what is supposed to be a joyous day of celebration. Count eight hours backwards from when you have to get up and go to bed at that time. Lie down in a dark, quiet room with no possibility of interruptions (probably not possible for parents of little darlings)and don't get up for any reason except for a brief toilet visit if necessary. Then you will wake up refreshed and in the best condition to face the day.
So, sleep, stress-releasing techniques and preparation are the key to an enjoyable day. And remember that having too many unreasonable expectations of others will only end in disappointment. This is about you, not them.
It's always so nice to read your posts, you truly care. I'm not on a low fodmap, but I still appreciate it.
Thanks, Marta. Even though you don't need the diet, you can mention it to others with IBS. It really is a lifesaver.
Thank you for the tips Suzanne, It's helpful have made low fodmap Christmas mince pies this year and they are great. Hope by some miracle to do a pineapple low fodmap Christmas cake . my attempt with glazed fruit was a bit to sweet but it did the job. this year have dried blueberries ,cranberries, pine apple etc so hope it works out.
Good to hear from you, Eleanor. Hope you are doing well.
All that dried fruit would be an issue for most people with IBS so go easy on it. Have a great Christmas.


A one-of-a-kind mobile application that allows you to quickly discover new strains, concentrates, and edibles like never before, all at your local dispensaries.
How much do you know about weed strains? Interested in learning more? We created this awesome weed strain guessing game! Let's see how many weed strains you know! We've included all of the most famous strains and some you've probably never even heard of from all over the world.
Now you can get the top marijuana news from the best sources around the world. Download The Cannabis Daily app 100% FREE on your iPhone. The Cannabis Daily is a mobilizing app platform featuring daily news designed to keep you up to date on the latest events related to marijuana. We search and source the best cannabis news and sources updated 24/7 delivering everything to you in one place for your convenience.
HIGH TIMES has continued to evolve to become as much of a cultural destination as a respected news outlet. Our unyielding coverage of the cannabis lifestyle has helped define one of the most prolific and enduring subcultures in modern American society. Music, arts, entertainment, live events and food now all have a seat at the table in the cannabis movement.
Duby is your new smoke spot. Take a break and pass some dubys while you chill with friends. Light up a duby and pass it to other users anonymously near you.
The best marijuana products are discovered and shared by the cannabis enthusiasts who have experienced them first hand. Our network of pot aficionados are people just like you, but also includes some of the most credible voices in the legal marijuana industry.
WEED SHOP 2: BACK 2 CALI - the highly anticipated sequel to one of the best weed growing games is finally here and it's DOPER THAN EVER! Grow new weed strains, sell your pot harvest, promote and expand your cannabis firm, hire ganja farmers to do the work for you, roll some joints and turn your weed shop into the best marijuana dispensary in California!
From ganja to glory - get ready to grow your operation into a mighty Hempire! This is the ultimate weed growing game. It doesn't just stop at the pot: you must harvest your plants, breed new and unusual strains, make friends (and enemies), and eventually take control of your entire home city to be victorious. But watch your back! Just 'cause weed's gone legit doesn't mean you're safe! Hempire is a story driven joint, so get ready to deal with corrupt cops and shady businessmen, while also helping old ladies bake brownies. For real.
In this follow-up to Weed Firm: RePlanted, the popular role-playing weed growing and dealing adventure, expelled botany student Ted Growing heads back to his Alma Mater. This time he's not there to hit the books, but rather to hide out from the cops who are hot on his trail. Ted sets up his pot grow-op in an abandoned gym and gets down to doing what he does best: cultivating and selling cannabis. You get to be Ted as he expands his pot farm! Feel your pulse rising as Ted tries to keep his buzz up while growing his empire and selling to an ever-increasing client base that demands R-E-S-P-E-C-T.
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Gorgeous Chanel fall 2010 collection, Super soft white & baby blue Angora knit dress size 38. Measurements taken without any stretching or pulling but it is knit so stretches beyond measurements. Waist approx 28cm, length 38in. Condition never worn.


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I don't think Nintendo wants me to have ANY 3DS. No circle pad pro? No pure white like my DSL and Wii are? No reversable covers in the US?
I've heard rumours they want to push people towards pure digital, which might be why they're skimping out on the extras in software.
Joystiq has an article detailing the development timeline for the Vita Silent Hill game. I didn't realize it was made by WayForward. Guess I'll have to check it out, even if I'll have no one to play with.


text:
President, PM greet all on 23rd anniversary of CHT Peace Accord
President M Abdul Hamid and Prime Minister Sheikh Hasina on Tuesday issued separate messages marking the 23rd anniversary of Chittagong Hill Tracts (CHT) Peace Accord.
On the completion of 23 years of the historic agreement, President Hamid called upon all irrespective of party affiliations to work together to harness the potentials of the hill districts.
The head of the state, in his message, said the CHT Peace Accord would be a shining example in the world in resolving disputes peacefully.
On the occasion of the signing of CHT Peace Accord, he extended his best wishes to all the residents of the hill districts.
Rangamati, Bandarban and Khagrachhari are the three hill districts of Bangladesh which are a source of natural beauty, he said, adding that the colorful lifestyle, language and culture of different people living in the hills for ages have made this region special and unique.
He further said that the historic agreement or the accord was signed on December 2 in 1997 between the government and the Parbatya Chattagram Jana Sanghati Samiti (PCJSS) with the sincere initiative of Prime Minister Sheikh Hasina for socio-economic development and peace in the hill districts.
Through this, the long-running conflict in the hill districts had ended and the path of peace was indicated, he said.
Hamid said Chittagong Hill Tracts is a region rich in natural resources and it has great potential for development.
Following the implementation of the peace agreement, the Ministry of Chittagong Hill Tracts Affairs and the Chittagong Hill Tracts Regional Council were formed, he said, adding that as a result of the peace agreement, socio-economic and cultural development including infrastructure in the Chittagong Hill Tracts region have been accelerated to a remarkable extent.
He hoped that the CHT Peace Accord would play a positive role in the development and progress of the hill areas.
In her message, Prime Minister Sheikh Hasina greeted the countrymen, specially the people of the three hill districts, on the occasion of the completion of 23 years of the historic agreement.
The Prime Minister sought cooperation from all for full implementation of the CHT peace accord.
On December 2 in 1997, the historic CHT Peace Accord was signed without the mediation of any third party, with a view to stopping bloody conflicts in the CHT, the premier said.
This peace accord brought an end to the long-term bloody racial skirmishes in the CHT region and established the trend of peace and development there, she said.
Sheikh Hasina said achieving the UNESCO Peace Prize is a global recognition to this accord.
The Prime Minister said the post-1975 undemocratic governments (after the assassination of Bangabandhu) had created divisions between the Bangalee and the hill people for their self-interest instead of maintaining social stability there.
Killings, tortures and injustice, grabbing of lands and wealth and misuse of the state resources had made the region more unstable, she added.
In 2001, Sheikh Hasina said, the then BNP-Jamaat alliance government had opposed the historic peace agreement and wanted to destabilize the hilly region again. But their ill efforts went in vain, she added.
"We are pledge-bound to maintain peace across the country, including the CHT," the Prime Minister said.
Sheikh Hasina said her government has been implementing massive development programmes in all sectors, including education, health, electricity, communications, infrastructure and mobile networks in the region.
Over 10, 890 families have been given power supply by setting up solar panel in the region, she said, adding that a beautiful complex is being built on two acres of land in the Dhaka's Bailey Road at a cost of Taka 194 crore for the people of hill districts, she added.
The Prime Minister said CHT is no more a backward locality because of the timely steps taken by the government.
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Calling all puppy party guests! Wag your tails over to the play space for some fun puppy party games!
Like a scavenger hunt, this kids' party game has players searching for dog bones that are hidden around the party space. You can use a box of real dog bones, use toy bones or cut the shapes of dog bones out of colored paper. Since dogs tend to bury their bones, you may want to hide some of the bones under things (such as under the rug if the party is indoors or under patio chair cushions in the yard).
Once all of the bones are hidden, divide players into two teams. Give each team a list of bones they must find. For instance, if you used colored paper, the list might instruct them to find three yellow, two blue, and five red bones. A simpler option is to just instruct each team to find a certain number of bones. The first team to collect all of their dog bones wins the game.
The concept of this game is simple enough: have players race on all fours to the finish line. You can do this as one-on-one races or divide players into teams and have a four-legged relay race. Another variation has them crawl like dogs through an obstacle course.
This game can get messy, so have kids sit around a table covered with a disposable tablecloth and keep plenty of napkins and wet wipes on hand. Place a dog bowl in front of each player and fill the bowls with soft cake or ice cream. Kids must sit on their hands and clean out their bowls using only their mouths. The first player to lick his bowl clean wins.
Play this game just like the traditional game of musical chairs, but instead of chairs, place pillows on the floor. These are the dog beds. Have kids circle the line of pillows, on all fours, as music plays. When the music stops, the "dogs" must roll over onto a bed and pretend to take a puppy nap. The player left without a bed is out of the game, a pillow is removed, the music begins again and play continues until only one puppy is left on a pillow.
To play this puppy party game, have kids gather in the middle of the room. Play a song they will all know well and ask them to bark along instead of singing along to the lyrics. Have someone stop the song at random intervals. When the music stops, the barking must stop as well. The last kid to stop barking is out of the game, the music restarts and the kids once again bark along until the song is stopped. Song suggestions for this game include: How Much is that Doggie in the Window?
To play this game, divide players into two teams and have each team line up in front of a dog's bed. Several feet from the dog's beds, place two sets of clean dog toys. Teams must race, relay style, to retrieve the dog toys from the piles and place them in the beds. To continue with the dog party theme, have them race on all fours and carry the toys back in their mouths. The first team to have all of their toys in their bed wins the race.
To play this backyard party game, have two players stand side-by-side behind a designated line. Give each player a different colored rubber ball. On the "go!" command, each player must throw their ball as far as they can. They must then go and "fetch" the balls and bring them back to the starting line. The challenge is that each player must retrieve the ball that was thrown by her opponent. The first player to return with the ball wins.
Divide players into two teams. Set up a course with several stopping points around the yard. Have two players from each team stay at the starting line. Of the remaining players, have one from each team stand at each of the points in the course. Give a harness and leash to each of the teams at the starting line. One player will have to wear the harness and leash, get on all fours and be "walked" by his teammate. When the players are ready, they will walk their "dogs" to the first stopping point. Here, the players who are the dogs will switch places with the waiting players at the stop. The new dog will then be walked to the next point, where once again, a switch will be made. The first team to have all of their "dogs" walked from one point to the next wins.
Give the kids a bunch of puppy ears, tails, and some face paint. Let them dress each other up as show dogs (or have adults help if they are very young), and then strut their stuff on a doggie runway. They can perform tricks, show off their best doggie sweaters or even howl a tune for talent. Award prizes for categories such as silliest trick, most-fashionable pup, and best talent performance. Be sure to make up enough categories so that every dog wins a prize.
One fun idea for awards is to bake cookies in the shape of dog bones or make a batch of people puppy chow to serve as "treats" to the winners.
Remove the lid from a large cardboard box, turn it upside down and cut a hole where a dog house entrance should be. Give the kids paint, colored markers, dog-themed stickers, glue, and dog bones that they can use to decorate their very own doghouse.


text:
Multi-operation mode nonvolatile memory
Disclosed are various embodiments that program a memory array with different carrier movement processes. In one application, memory cells are programmed with a particular carrier movement process depending on the pattern of data usage, such as code flash and data flash. In another application, memory cells are programmed with a particular carrier movement process depending on particular threshold voltage state to be programmed, in a multi-level cell scheme.
Lue, Hang Ting (Hsinchu, TW)
Hsieh, Kuang Yeu (Hsinchu, TW)
Macronix International Co., Ltd. (Hsinchu, TW)
365/185.28
G11C16/04
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20040120191 Semiconductor circuit comparing two data rows June, 2004 Nakase
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20090254772 Extending and Scavenging Super-Capacitor Capacity October, 2009 Cagno et al.
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20060285417 TRANSFORMER COUPLED CLOCK INTERFACE CIRCUIT FOR MEMORY MODULES December, 2006 Washburn et al.
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LAPPAS, JASON
MACRONIX (C/O HAYNES BEFFEL & WOLFELD LLP P. O. BOX 366, HALF MOON BAY, CA, 94019, US)
1. An integrated circuit device, comprising: a semiconductor substrate; a memory array on the substrate comprising charge storage, nonvolatile memory cells configured to store data in response to electrical signals applied to cause at least one of a first carrier movement process to program data in the memory array and a second carrier movement process to program data in the memory array; and controller circuitry coupled to the memory array, including logic to apply electrical signals to cause the first carrier movement process to program data in the memory array and to apply electrical signals to cause the second carrier movement process to program data in the memory array.
2. The integrated circuit device of claim 1, wherein for a first pattern of data usage the logic applies the electrical signals to cause the first carrier movement process, and for a second pattern of data usage the logic applies the electrical signals to cause the second carrier movement process.
3. The integrated circuit device of claim 1, wherein the memory array has a range of threshold voltages, and the logic applies the electrical signals to cause the first carrier movement process over a first part of the range of threshold voltages and the logic applies the electrical signals to cause the second carrier movement process over a second part of the range of threshold voltages.
4. The integrated circuit device of claim 1, wherein, to switch between causing the first carrier movement process and the second carrier movement process in particular nonvolatile memory cells of the memory array of the memory array, the logic of the controller circuitry applies electrical signals to cause a reset process to the particular nonvolatile memory cells.
5. The integrated circuit device of claim 1, wherein the non-volatile memory cells in the memory array respectively comprise a first channel terminal, a channel, and a second channel terminal in the substrate, a first dielectric layer, a charge trapping structure and a second dielectric layer overlying the channel, and a gate terminal.
6. The integrated circuit device of claim 1, wherein the non-volatile memory cells in the memory array respectively comprise a first channel terminal, a channel, and a second channel terminal in the substrate, a first dielectric layer, a charge trapping structure and a second dielectric layer overlying the channel, and a gate terminal, and wherein the charge trapping structure comprises at least one of silicon nitride, Al2O3, HfOx, ZrOx, or other metal oxide.
7. The integrated circuit device of claim 1, wherein the non-volatile memory cells in the memory array storing data in response to electrical signals applied to cause the first carrier movement process, and the non-volatile memory cells in the memory array storing data in response to electrical signals applied to cause the second carrier movement process have a same cell structure.
8. The integrated circuit device of claim 1, wherein the first carrier movement process includes programming by hole injection.
9. The integrated circuit device of claim 1, wherein the first carrier movement process includes programming by band-to-band tunneling induced hole injection.
10. The integrated circuit device of claim 1, wherein the second carrier movement process includes programming by electron injection.
11. The integrated circuit device of claim 1, wherein the second carrier movement process includes programming by channel hot electron (CHE) injection.
12. The integrated circuit device of claim 1, wherein the second carrier movement process includes programming by channel initiated secondary electron injection (CHISEL).
13. The integrated circuit device of claim 1, wherein the first carrier movement process includes programming by hole injection, and the second carrier movement process includes programming by electron injection.
14. The integrated circuit device of claim 1, wherein the first carrier movement process includes programming by band-to-band tunneling induced hot hole (BTBTHH) injection, and the second carrier movement process includes programming by channel initiated secondary electron (CHISEL) injection.
15. The integrated circuit device of claim 1, wherein the controller circuitry is on the semiconductor substrate.
16. The integrated circuit device of claim 1, including an SRAM array and a user programmable processor on the semiconductor substrate coupled with the memory array.
17. The integrated circuit device of claim 1, wherein the first carrier movement raises a threshold voltage of at least one of the memory cells via channel hot electron injection.
18. The integrated circuit device of claim 1, wherein the first carrier movement raises a threshold voltage of at least one of the memory cells via channel initiated substrate hot electron injection.
19. The integrated circuit device of claim 1, wherein the second carrier movement lowers a threshold voltage of at least one of the memory cells via band to band hot hole injection.
20. The integrated circuit device of claim 1, wherein a threshold voltage of at least one of the memory cells is reset via a channel erase operation.
21. The integrated circuit device of claim 1, wherein the first carrier movement raises a threshold voltage of at least one of the memory cells via channel hot electron injection or channel initiated substrate hot electron injection, and the second carrier movement lowers the threshold voltage of said at least one of the memory cells via band to band hot hole injection, and the threshold voltage of said at least one of the memory cells is reset via a channel erase operation.
22. A method for program data in a memory array of an integrated circuit device with multiple carrier movement processes, comprising: applying electrical signals to the memory array of charge storage, nonvolatile memory cells to cause a first carrier movement process to program data in the memory array; and applying electrical signals to the memory array of charge storage, nonvolatile memory cells to cause a second carrier movement process to program data in the memory array.
23. A method for manufacturing an integrated circuit device, comprising: providing a semiconductor substrate; forming a memory array on the substrate comprising charge storage, nonvolatile memory cells configured to store data in response to electrical signals applied to cause at least one of a first carrier movement process to program data in the memory array and a second carrier movement process to program data in the memory array; and providing controller circuitry coupled to the memory array, including logic to apply electrical signals to cause the first carrier movement process to program data in the memory array and to apply electrical signals to cause the second carrier movement process to program data in the memory array.
The present invention relates to electrically programmable and erasable non-volatile memory and integrated circuits including such memory, and more particularly to architectures for such devices supporting multiple algorithms for programming, erasing, and reading such memory.
Electrically programmable and erasable non-volatile memory technologies, including flash memory, are being adapted to many applications. Technologies based upon floating gates like standard EEPROM, or localized charge trapping structures like oxide-nitride-oxide memory cells known in various architectures as SONOS cells and NROM, are typically programmable and erasable many times. Flash memory technologies can be differentiated according to their use for storing data or code. Thus, market segments for so-called data flash and so-called code flash have developed.
Data flash has several characteristics: (1) high density storage; (2) fast page program speed (for example: 16 k bit per page); (3) fast page read speed. Data flash often is used for mass storage applications, where the data stored may include image files produced using digital cameras, files and directory structures in flash cards, audio files like MP3 files, and files of digital samples from analog signals, and other storage applications in which a majority of the program, erase and read transactions involve patterns of data usage involving relatively large data sets. Three representative memory architectures that can serve the data flash market, include: NAND (Toshiba/Samsung), AG-AND (Renesas) and PHINES (Macronix; see Yeh, et al., PHINES: a Novel Low Power Program/Erase, Small Pitch, 2-Bit per Cell Flash Memory Cell, 2002 IEDM, p. 931-934; and U.S. Pat. No. 6,690,601). Among the just listed alternatives, the floating gate based NAND architecture might be considered the current mainstream architecture for data flash.
Code flash has several characteristics, including (1) fast byte (8 bits) program speed; and (2) fast random memory access time for single bit for sensing. Code flash is often used for storage of data like computer instructions and parameters for devices like personal computers and mobile phones, in which a majority of the program, erase and read transactions involve patterns of data usage involving relatively small data sets, like updates to instructions and subroutine segments within computer programs and setting and changing values in parameter sets. Three representative memory architectures that can serve the code flash market, include: NOR (Intel, AMD; see U.S. Pat. No. 6,370,062), DINOR, split-gate and NROM (See, U.S. Pat. No. 5,768,192). Among the just listed alternatives, the floating gate based NOR architecture might be considered the current mainstream architecture for code flash. Although it has been proposed to use NROM memory to store both code and data, the operation algorithm used for NROM is considered more suitable to use as code flash.
In general, data flash and code flash are differentiated by operation algorithms for programming, erasing and reading the data, and by the memory cell structures which are adapted to the operation algorithms. Thus, integration of conventional flash memory technology for both code and data flash purposes has not been practical. Accordingly, much existing technology relies upon two chips, one for code flash and one for data flash, to serve these functions. More recent technology relies upon one chip, with multiple arrays having different memory cell structures, one for code flash and one for data flash, to serve these functions. The cost of systems in terms of space on the board, the number of chips, and difficulty in design is high as a result.
Accordingly, it is desirable to provide systems and methods for providing integrated flash memory on the same memory array of a single chip for both code and data storage.
Another trend in flash memory technologies is the increasing density of data storage. Floating gates like standard EEPROM are generally highly conductive structures and thus each has a single region for storing data. Localized charge trapping structures like oxide-nitride-oxide memory cells, known in various architectures as SONOS cells and NROM, store bits in different parts of the charge trapping structure, and thus each charge trapping structure has multiple regions for storing data. Multi-level cell algorithms associate more than two threshold voltage states to each region for storing data. For example, a multi-level cell algorithm with four threshold voltage state stores two bits in region for storing data a multi-level cell algorithm with eight threshold voltage state stores three bits in region for storing data.
Accordingly, it is desirable to provide systems and methods for providing flash memory with a multi-level cell algorithm supporting higher densities of data storage.
Various embodiments store data in charge storage, nonvolatile memory cells of a memory array. The nonvolatile memory cells store data in response to electrical signals applied to cause various carrier movement processes to program data.
The different carrier movement processes are used for different patterns of data usage. For example, in one application, one carrier movement process can be optimal for code flash and another carrier movement process can be optimal for data flash. Another application implements multi-level cell memory, with a range of threshold voltages. Different carrier movement processes are applied over different parts of the range of threshold voltages.
The different non-volatile memory cells in the memory array that are programmed with different carrier movement processes have a same cell structure. When switching between different carrier movement processes in the same nonvolatile memory cells of the memory array, electrical signals are applied to cause a reset process to the nonvolatile memory cells. Alternatively, a particular memory cell once programmed with a particular carrier movement process can be consistently programmed with the same carrier movement process.
Each non-volatile memory cell in the memory array has a first channel terminal, a channel, and a second channel terminal in the substrate, a first dielectric layer, a charge trapping structure and a second dielectric layer overlying the channel, and a gate terminal. The charge trapping structure has silicon nitride, Al2O3, HfOx, ZrOx, or other metal oxide. In other embodiments the charge storage structure is a floating gate.
Various examples of carrier movement processes are programming by hole injection, band-to-band tunneling induced hot-hole injection (BTBTHH), electron injection, channel hot electron injection (CHE), and channel initiated secondary electron injection (CHISEL). Different carrier movement processes that are implemented in the same array are, for example, programming by hole injection and electron injection, or programming by band-to-band tunneling induced hot-hole injection) BTBTHH) and channel initiated secondary electron (CHISEL) injection.
Some embodiments have the controller circuitry on the semiconductor substrate. Some embodiments have an SRAM array and a user programmable processor on the semiconductor substrate coupled with the memory array.
One embodiment is an integrated circuit device with the memory array on a semiconductor substrate and controller circuitry with logic to apply electrical signals to cause the various carrier movement processes. Another embodiment is a method for manufacturing an integrated circuit device, by providing a semiconductor substrate, forming the memory array on the substrate, and providing the controller circuitry coupled to the memory array. A method embodiment includes applying electrical signals to the memory array to cause different carrier movement process to program data in the memory array.
Various embodiments raise, lower, and reset a threshold voltage of one or more cells via different carrier movement processes. For example, the threshold voltage is raised via channel hot electron (CHE) injection or channel initiated secondary electron (CHISEL) injection, the threshold voltage is lowered via band to band tunneling hot hole (BTBTHH) injection, and the threshold voltage is reset via a channel erase operation.
FIG. 1 is a block diagram of an integrated circuit having a memory array that stores data according to different patterns of data usage.
FIG. 2 is a block diagram of a system-on-a-chip integrated circuit having a memory array that stores data according to different patterns of data usage.
FIG. 3 is block diagram of a nonvolatile charge storage cell that programs data via different carrier movement processes.
FIG. 4 is a layout diagram for an array of flash memory cells that program data via different carrier movement processes.
FIGS. 5A and 5B illustrate programming a memory cell via one carrier movement process.
FIGS. 6A and 6B illustrate programming a memory cell via another carrier movement process.
FIG. 7 illustrates an erase procedure.
FIG. 8 is a graph showing the erase procedure of FIG. 7 being performed with different bias arrangements.
FIGS. 9 and 10 are graphs showing the programming of multiple charge storage regions of a memory cell with one carrier movement process.
FIGS. 11 and 12 are graphs showing the programming of multiple charge storage regions of a memory cell with another carrier movement process.
FIG. 13 is a graph showing the erase procedure that permits switching between programming a particular memory cell via different carrier movement processes.
FIG. 14A is a threshold voltage state illustration with two states.
FIGS. 14B-14D are threshold voltage state illustrations with at least four states.
FIG. 15 is amore detailed diagram of an integrated circuit, including a memory array that programs data via different carrier movement processes.
FIG. 1 illustrates an embodiment of the present technology, an integrated circuit 100 that comprises a memory array 102 adapted for code flash applications and for data flash applications. Thus, data for both code flash applications and for data flash applications can be stored in a single memory array, instead of different arrays or on different integrated circuits. The integrated circuit 100 may even have multiple such arrays that are each capable of storing data for both code flash applications and for data flash applications. Peripheral circuits 103 on the integrated circuit 100 include a code and data flash controller which execute first and second operation algorithms which are adapted for the patterns of data usage corresponding with code flash and data flash applications. The memory cells in the array 102 have substantially the same structure, regardless of whether the memory cells store data according to the first or second operation algorithms. The first and second operation algorithms differ to efficiently support different patterns of data usage within a single integrated circuit device.
The integrated circuit shown in FIG. 1 may include other components not shown in figure. For example, FIG. 2 illustrates a "system on a chip" (SOC) integrated circuit 200, having a memory array 202 adapted for code flash applications and for data flash applications, and peripheral circuits 203 including a code and data flash controller as described with respect to FIG. 1. The integrated circuit 200 also includes SRAM memory 204 and a user programmable processor 205, like a general-purpose processor or a digital signal processor. Additional components (not shown) such as data and instruction buses, input/output communication circuitry, field programmable logic arrays and so on can be formed on the same chip. In other embodiments, the controller for the memory array 202 can be implemented using the processor 205, special-purpose logic, or a combination of the two.
FIG. 3 illustrates a memory cell structure suitable for a memory array according in various embodiments. The memory cell structure, formed in a semiconductor substrate 300 includes a first channel terminal 301 which acts as a source or drain, a second channel terminal 302 which act as a drain or source, and a channel region between the first channel terminal 301 and a second channel terminal 302. A charge storage structure comprises a first dielectric layer 310, a localized charge trapping structure 311, and a second dielectric layer 312 which overlies the channel region, and partially overlaps the first channel terminal 301 and the second channel terminal 302. A gate structure 303 overlies charge storage structure. The first dielectric layer 310 in some embodiments has a thickness greater than about 1 nm and less than about 20 nm, and more preferably about 6 or 7 nm. The second dielectric layer 312 has similar dimensions in some embodiments. In one exemplary embodiment, the first dielectric layer 310, the localized charge trapping structure 311, and the second dielectric layer 312 have respective thicknesses of 55 Å, 60 Å, and 90 Å.
The first channel terminal 301 is coupled to a voltage VS via a bit line, the second channel terminal 302 is coupled to a voltage VD via another bit line, and the gate structure 303 is coupled to a voltage VG via a word line in typical array embodiments. The substrate in which the channel region is formed is coupled to a voltage VB. The operation algorithms for the memory array apply voltages or otherwise bias these terminals for program, erase, and read operations.
The charge storage structure comprises a layer of silicon nitride in the illustrated embodiment extending the width of the channel, which stores data by localized charge trapping. In other embodiments, charge trapping material other than silicon nitride may be used, such as Al2O3, HfOx, ZrOx, or other metal oxide can be used to form memory cells. Also, in other embodiments, the charge trapping material can be configured so that it does not extend the entire width of the channel, including for example a pocket of charge trapping material adjacent the first channel terminal 301, and a pocket of charge trapping material adjacent the second channel terminal 302.
As illustrated heuristically in FIG. 3, localized charge trapping results in storage of charge in one of region 305 and region 315 for a single charge storage region, and in both regions 305, 315 for storage at multiple charge storage regions per cell. Charge is moved into and out of the localized charge trapping regions in the memory cells of the memory array according to first and second operation algorithms adapted for different patterns of data usage or for multi-level cell operations. In other embodiments, the charge storage structure may comprise a floating gate.
FIG. 4 is a layout view of an array of memory cells, such as those illustrated FIG. 3. In layout, the memory array shown in FIG. 4 includes bit lines BL1-BL3 which comprise buried diffusion lines 401, 402, and 403 arranged substantially parallel to one another in a first direction. Charge storage structures (not shown) are formed over the substrate between the buried diffusion bitlines. Word lines WL1-WL3 comprising conductive strips 404, 405, 406, overlie the charge storage structures, and are arranged substantially parallel to one another in a second direction which is orthogonal to the first direction. The memory cells in the array are formed using triple well technology, or other technology, to allow biasing of the channel regions in the substrate, as required for operation algorithms in some embodiments. Thus for example, the memory array is divided into sets of cells, (word lines, sectors, etc.) having numbers and arrangements adapted to the operation algorithm selected. Each set is formed in an isolated p-type well. The isolated p-type well is formed within a deep n-type well in a p-type substrate. In this triple well configuration, the isolated p-type wells can be biased as needed for operation of the memory array. In some embodiments, the array layout comprises isolation structures, such as STI (shallow trench isolation) isolation. In some embodiments, the array layout comprises contacts and metal wires for interconnections.
Memory cells identified as CELL A, CELL B, CELL C and CELL D in FIG. 4, result from sets of process steps by which the bit lines, charge storage structures and word lines are formed. The memory cells are illustrated schematically with a vertical dividing line indicating two bits per cell storage. In other embodiments, one bit per cell might be stored. In yet other embodiments more than two bits per cell can be stored in nonvolatile memory cells.
A set of process steps is used to form the memory array, which results in formation of a plurality of bit lines for the memory array, and formation of a plurality of word lines for the memory array. While forming the bit lines and the word lines according to a set of process steps, the sizes of the bit lines and the word lines may be varied if desired with simple changes in layout dimensions of a mask, without changes in the set of process steps applied to form the array. In integrated circuit embodiments with multiple arrays, array isolation structures and array partitions are also formed by a set of process steps, in the multiple arrays. The array isolation structure and partitions can be varied between the multiple arrays, without changes in the set of process steps in some embodiments.
In embodiments with multiple arrays, a set of process steps also results in simultaneous formation of the charge storage structures in both the multiple memory arrays, such that the memory cells in the arrays can be substantially the same. In other embodiments, the charge storage structures may vary slightly in process steps, allowing formation of memory cells with different thicknesses or compositions of dielectric layers for example.
Controllers for an integrated circuit execute operation algorithms that are adapted for first and second patterns of data usage or for multi-level cell operations. In one embodiment of the invention, the first and second patterns of data usage correspond with data flash applications and code flash applications respectively. First and second operation algorithms which cause different carrier movement processes to program data are illustrated with respect to FIGS. 5A and 5B and FIGS. 6A and 6B. According to this embodiment, the memory cell structure is substantially identical regardless of the particular carrier movement process to program data that is used in the memory cell. A representative first operation algorithm, adapted for patterns of data usage such as encountered in data flash applications corresponds with the operation algorithms typically applied for PHINES architectures, but in various embodiments is used for architectures adapted for multiple carrier movement processes.
According to this first operation algorithm, programming is accomplished using band-to-band tunneling induced hot hole injection. Thus, as illustrated in FIG. 5A, a left bit is programmed by applying six volts to the source, zero volts to the drain, and minus five volts to the gate, while the substrate is grounded. This induces hot holes having sufficient energy to jump over the tunnel dielectric into the charge trapping structure on the left side of the memory cell. As illustrated in FIG. 5B, a right bit is programmed by applying six volts to the drain, zero volts to the source, and minus five volts to the gate, while the substrate is grounded. This induces hot holes having sufficient energy to jump over the tunnel dielectric into the charge trapping structure on the right side of the memory cell. The two bits are read according to this operation algorithm using reverse read operations. One example of reverse read is that when the left bit is read, a 1.6 V read voltage is applied to the right side. Similarly, when the right bit is read, a 1.6 V read voltage is applied to the left side. Other program and erase techniques can be used in operation algorithms applied to the PHINES type memory cell, as described for example in U.S. Pat. No. 6,690,601. Other memory cells and other operation algorithms might also be used.
A representative second operation algorithm, adapted for patterns of data usage such as encountered in code flash applications, corresponds with the operation algorithm typically applied for two-bit per cell NROM architectures, but in various embodiments is used for architectures adapted for multiple carrier movement processes.
According to this second operation algorithm, programming is accomplished using channel initiated secondary electron (CHISEL) injection. Thus, as illustrated in FIG. 6A, a left bit is programmed by applying five volts to the source, zero volts to the drain, ten volts to the gate, and minus three volts to the body. This induces secondary hot electrons in the substrate having sufficient energy to jump over the tunnel dielectric into the charge trapping structure on the left side of the memory cell. As shown in FIG. 6B, a right bit is programmed by applying five volts to the drain, zero volts to the source, ten volts to the gate, and minus three volts to the body. This induces hot electrons in the substrate having sufficient energy to jump over the tunnel dielectric into the charge trapping structure on the right side of the memory cell. The two bits in the memory cells are read using reverse read operations. One example of reverse read is that when the left bit is read, a 1.6 V read voltage is applied to the right side. Similarly, when the right bit is read, a 1.6 V read voltage is applied to the left side. Other program and erase techniques can be used in operation algorithms applied to the NROM type memory cell. Other types of memory cells and operation algorithms might also be applied.
An erase operation is accomplished using the negative gate voltage, E-field induced electron tunneling (also known as Fowler-Nordheim tunneling) which causes tunneling current from the gate to the charge trapping structure. The erase operation erases both bits simultaneously. Regardless of the carrier movement process that programmed the memory cell, this erase process resets the threshold voltage(s) of the memory cell. Thus, prior to switching between causing different carrier movement processes in particular nonvolatile memory cells of the memory array of the memory array, the logic of the controller circuitry applies electrical signals to cause an erase operation in the particular nonvolatile memory cells.
FIG. 7 illustrates E-field assisted electron tunneling used for erase induced by relatively high negative bias on the gate, and relatively high positive bias on the substrate. Both bits in the memory cell are simultaneously erased in the illustrated example by grounding the substrate, and applying minus twenty-one volts to the gate, while both the source and the drain are floating. Other possible biases include, for example, applying ten volts to the substrate, and minus eleven volts to the gate, while both the source and the drain are floating; and grounding the gate, and applying twenty-one volts to the substrate, while both the source and the drain are floating.
FIG. 8 is a graph showing the erase procedure of FIG. 7 with the substrate grounded, and both the source and the drain floating. The different curves on the graph correspond to different biases applied to the gate. As the magnitude of the negative bias on the gate is increased, the duration taken for the memory cell to reach an equilibrium decreases. Thus, as the gate bias is varied from minus eighteen volts to minus twenty-one volts, the threshold voltage rises more quickly from zero volts to the equilibrium threshold voltage. The beginning threshold voltage is zero volts for a fresh memory cell without any prior operations performed on the memory cell.
FIGS. 9 and 10 are graphs showing the programming procedure adding holes to the charge storage structure, according to the carrier movement processes shown in FIGS. 5A and 5B. FIG. 9 shows the programming of one part of a memory cell, and FIG. 10 shows the programming of another part of the memory cell. FIGS. 9 and 10 share a common voltage axis to more easily compare the processes of programming different parts of a memory cell. However, FIGS. 9 and 10 have different time axes to illustrate the different speeds of programming the first bit and programming the second bit. FIG. 9 has a time axis from 0 to 200 μsec, and FIG. 10 has a time axis from 0 to 100 μsec. FIGS. 9 and 10 refer to these different parts as bits, though each part may actually store multiple bits if a multi-level cell algorithm is used. FIG. 9 shows the curves for the first bit 901 and the second bit 902. FIG. 10 shows the curves for the first bit 1001 and the second bit 1002.
Both bits are initially in the erased state. In FIG. 9, the first bit is programmed. Due to the second bit effect of the reverse read process, the threshold voltage is decreased not only for the programmed bit, but also for the other bit which remains in the erased state. After programming the first bit, the threshold voltage associated with the first bit drops from three volts to about 1.6 volts, and the threshold voltage associated with the second bit drops from three volts to about 2.3 volts. In FIG. 10, the second bit is programmed. The threshold voltage associated with both the first and the second bits drop to about 1.2 volts. If programming of the second bit continues, both the threshold voltage associated with the first and the second bits continue to drop, though the threshold voltage associated with the second bit drops at a faster rate. As the different time scales of FIGS. 9 and 10 show, programming the second bit is a faster process than programming the first bit.
FIGS. 11 and 12 are graphs showing the programming procedure adding electrons to the charge storage structure, according to the carrier movement processes shown in FIGS. 6A and 6B. FIG. 11 shows the programming of one part of a memory cell, and FIG. 12 shows the programming of another part of the memory cell. FIGS. 11 and 12 also share a common voltage axis to more easily compare the processes of programming different parts of a memory cell. Both FIGS. 11 and 12 have a time axis from 0 to 0.5 μsec. FIGS. 11 and 12 refer to these different parts as bits, though each part may actually store multiple bits if a multi-level cell algorithm is used. FIG. 11 shows the curves for the first bit 1101 and the second bit 1102. FIG. 12 shows the curves for the first bit 1201 and the second bit 1202.
Both bits are initially in the erased state. In FIG. 11, the first bit is programmed. Due to the second bit effect of the reverse read process, the threshold voltage is increased not only for the programmed bit, but also for the other bit which remains in the erased state. After programming the first bit, the threshold voltage associated with the first bit rises from three volts to about 4.7 volts, and the threshold voltage associated with the second bit rises from three volts to about 3.5 volts. In FIG. 12, the second bit is programmed. The threshold voltage associated with both the first and the second bits rise to about 5.0 volts.
FIG. 13 is a graph showing the erase procedure similar to the erase procedure of FIG. 8. However, unlike the erase procedure of FIG. 8, the erase procedure of FIG. 13 is performed on memory cells that are programmed, either by holes or by electrons. Both the threshold voltages of cells programmed by holes and the threshold voltages of cells programmed by electrons converge to about 3 V after about one to ten seconds.
FIG. 15 is a simplified block diagram of an integrated circuit supporting different carrier movement processes for programming, such as for code and data flash, or multi-level cell applications. The integrated circuit includes a memory array 1500 implemented using localized charge trapping memory cells configured for code storage. A row decoder 1501 is coupled to a plurality of word lines 1502 arranged along rows in the memory array 1500. A column decoder 1503 is coupled to a plurality of bit lines 1504 arranged along columns in the memory array 1500. Addresses are supplied on bus 1505 to column decoder 1503 and row decoder 1501. Sense amplifiers and data-in structures in block 1506 are coupled to the column decoder 1503 via data bus 1507. Data is supplied via the data-in line 1511 from input/output ports on the integrated circuit, or from other data sources internal or external to the integrated circuit, to the data-in structures in block 1506. Data is supplied via the data-out line 1512 from the sense amplifiers in block 1506 to input/output ports on the integrated circuit, or to other data destinations internal or external to the integrated circuit.
Resources for controlling the reading, programming and erasing of memory cells in the array 1500 are included on the chip. These resources include read/erase/program supply voltage sources (including for example charge pump circuits, voltage regulators, voltage dividers and the like) represented by block 1509 coupled to the other circuitry on the integrated circuit, which participate in operation of the device. Supply voltage sources are implemented in various embodiments using charge pumps, voltage regulators, voltage dividers and the like as known in the art, for supplying various voltage levels, including negative voltages, used in the read, erase and program operations.
The state machine 1509 can be implemented using special-purpose logic circuitry as known in the art. In alternative embodiments, the controller comprises a general-purpose processor, which may be implemented on the same integrated circuit, which executes a computer program to control the operations of the device. In yet other embodiments, a combination of special-purpose logic circuitry and a general-purpose processor may be utilized for implementation of the state machine.
FIGS. 15A, 15B, 15C, and 15D are threshold state schematics corresponding to 1 bit, 2 bits, 3 bits, and 4 bits, respectively. FIG. 15A shows a schematic for two-level threshold state operation. There are two states, the 1 state 1501 and the 0 state 1502. FIG. 15B shows a schematic for four-level threshold state operation. There are 4 states, the 11 state 1511, the 10 state 1512, the 01 state 1513, and the 00 state 1514. FIG. 15C shows a schematic for 8-level threshold state operation. There are 8 states, of which 4 states are shown, the 111 state 1521, the 110 state 1522, the 001 state 1523, and the 000 state 1524. FIG. 15D shows a schematic for 15-level threshold state operation. There are 15 states, of which 4 states are shown, the 1111 state 1531, the 1110 state 1532, the 0001 state 1533, and the 0000 state 1534. The threshold state schematics of FIGS. 15B, 15C, and 15D show possible implementations of multi-level cell applications, applied to each charge storage region of a charge storage structure. Different carrier movement processes can be applied for different parts of the threshold voltage region. For example, carrier movement processes that program via hole injection can program the threshold states with lower threshold voltages, carrier movement processes that program via electron injection can program the threshold states with higher threshold voltages, and a reset process can program a threshold states with an intermediate threshold voltage.
While the present invention is disclosed by reference to the preferred embodiments and examples detailed above, it is to be understood that these examples are intended in an illustrative rather than in a limiting sense. It is contemplated that modifications and combinations will readily occur to those skilled in the art, which modifications and combinations will be within the spirit of the invention and the scope of the following claims. What is claimed is:
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Shutters are opened, dust sheets removed and fresh flowers put in vases. This blog is open again.
It is the Summer Holidays, although being in England that does not always guarantee summer weather. The end of June was blisteringly hot, but of course, as soon as school finished the weather became 'changeable'. Never mind. The roses have been brilliant this year, the skies are endlessly beautiful and interesting, and each day out is an adventure as long as you have both sunscreen and an umbrella.
I have lots to show you over the next few posts; experiments with gouache, sketches of colleagues and students, and my trip to beautiful Donegal in the north of Ireland. So let's get on!
Waiting room sketches are fun to do, you can never be sure how long you have to draw the victim model. The first two sketches were done with my Platinum Carbon pen with a fine nib. l love the fine line, but I find that it tends to leak ink over my fingers if it is shaken up in my bag too much. It is more of a desk pen.
It's weird, just looking at this drawing makes me want to yawn with them.
The trusty Uniball eye, always gives dependable waterproof results (on the right) but I must watch out for the occasional sketch done with a Lamy Safari using soluble ink (on the left).
or this one of one of my favourite students which captures him and pleases my heart.
It is tempting to post loads of images in one go, but I am shy of boring you… How soon would you like to see my next post? Tomorrow? Next week? Let me know your thoughts.
I love this Al! I know who the parents are in your speech day sketch too! Perfect resemblance of them and your star pupil too!! Enjoy the rest of the 'Summer' and keep the posts coming!!
Thanks John. When are we going to see some more of your prints and jewels?
I began the blog with the intention to post once or twice a week, I missed several months though when things got hectic, but am now back in the swing of things. I think scheduling some posts ahead of time is an excellent idea, so I shall do that. Thanks for your enthusiasm, you have boosted my confidence!


As the post-global financial crisis cycle enters its tenth year against a benign economic backdrop, the primary risk to investor optimism would seem to be the pace and scale of any shift from easing to tightening by central bankers. Market expectations of an extremely gradual approach to "normalization" may be tested by the emergence of inflationary pressures as many developed economies reach secular lows in unemployment rates. The recent period of extremely low market volatility will ultimately be challenged either by "internal" economic forces, including technological developments, or "external" political events. Increases in volatility will create both risks and opportunities for investors.
Success will mean very different things to different investors. For this reason, a clear articulation of an investor's beliefs, objectives, and constraints is essential to effective governance and decision-making. For long-term investors, beliefs should extend beyond traditional risk and return considerations to include stewardship and ESG issues. Mercer Global Investment Forums 2018 considers both the wider market forces as well as investor-specific issues that we think will help investors plot a course towards long-term success.
Mercer Global Investment Forums provide the setting for stimulating and informative discussions on the economy, institutional investments, pension plan management, and more. Over the years, we've had hundreds of institutional investors, asset and fund managers, and Mercer investment professionals come together to connect, learn, and share.
We look forward to seeing you at the Forums.


Here at GWKidz, our goal is to love each and every child, teach our children about Jesus and his love for each of them and to provide a safe learning environment.
Each week your child will leave GWKidz with excitement in their hearts. We make learning God's word simple.
We have a fantastic leadership team here at GWKidz. Your child will also develop a personal relationship with their small group leader. All of our children, ages 3 to 5th grade, meet upstairs in our big group room at 10:35am, where we will engage in worship and hearing God's word. Then they will move to their small group where they will dig deeper into that week's concept.
Be sure and check out our Events page to see what the GWKidz will be up to next!


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When you choose Janssen Law, you're choosing a firm that will stand up for your rights, and that will prepare and present the strongest case possible to help secure maximum compensation from the parties responsible for your injuries and losses. In fact, multiple attorneys at Janssen Law Firm have been named Wisconsin Super Lawyers, an honor awarded to no more than five percent of attorneys in the state.
When your future depends on it, you can depend on the team at Janssen Law Firm.
If you're wondering why you should choose to work with Janssen Law Firm, the reason is in the numbers.
Motorcycle accident litigated with settlement exceeding $2.1 million.
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The silica-based fiberglass belongs to the most commonly used reinforcements. Glass is resistant to fire and chemicals. It has high tensile strength and low modulus of elasticity. Fiberglass laminates are extremely stiff and they are lighter and cheaper in comparison to metal.


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Posted on June 25, 2017 | 8 comments
We were lingering over our caffeine this morning, and were discussing how quiet the Gulf has been – scarcely a boat have we seen this season – when Ron said: "What's that on the water?" I looked out at the Pag and saw three canoes, in fairly close proximity to each other, heading across in front of the house. Each canoe was escorting a swimmer.
"Must be some kind of training exercise," I suggested. "For the Olympics perhaps?" A fourth canoe appeared around the headland to our left, with its accompanying swimmer moving along at an impressive clip.
Before too long, more and more swimmers came by, each one with his or her helper in a brightly coloured canoe. Quite eye-catching. Some of the athletes were superb – scarcely rippling the water – and beautiful to watch. Others were perhaps a little less graceful in their strokes, but all were obviously very strong swimmers. We couldn't tell from where they'd come, but it was from some distance further down the Pelion Peninsula. Milina perhaps?
We watched for some time, moving from window to window to take photos. Raki, as you'll note, was bored with the whole thing, and made it quite clear.
Mythos watched our antics at the window from below, but showed no inclination to join us. I think he was keeping an eye on Grappa who was hiding under a bush – he torments her horribly. He's old and cranky and resents the youngsters.
Dolphins appeared a little further out, and kept pace for a while with the canoes and swimmers. I was expecting them to come closer – they often follow a boat – but they weren't as curious this morning as they usually are.
I checked the local newspapers online, but could find no reference to this rather fascinating exercise. The participants must be in very fine shape for they covered a considerable distance before disappearing beyond the headland into Afissos. Marathon swimmers, I would guess.
I wasn't asked to participate – they probably feared the competition.
Tagged Afissos, canoe, marathon, Milina, Pagasitic, Pelion Peninsula, Raki, swimmers
We spent a couple of days this week in the Pieria region of Central Macedonia with friend Dave and the indomitable Tex, a Greek sheepdog rescued here in Pelion. Central Macedonia is one of Greece's thirteen administrative regions; we are in Thessaly.
For those who might be interested in the ongoing row between Greece and the Former Yugoslav Republic of Macedonia (FYROM), which claims Alexander the Great and wishes to be called Macedonia, I offer the following links, picked randomly among the great many that a Google tour will suggest.
https://en.wikipedia.org/wiki/Macedonia_naming_dispute
http://www.mfa.gr/en/fyrom-name-issue/
Needless to say, I support the Greek view.
The castle, depending upon whose version of events one decides to follow, was built by the Crusaders at the beginning of the 13th century. Other sources maintain it was Byzantine, and built in the 1100s or perhaps even earlier.
Given its prominent position it was of strategic importance in controlling movement through the Vale of Tempe, which linked north and south, and in monitoring sea invasions. Pirates plundered the region repeatedly, as they did The Pelion.
Phillip 2nd, father of Alexander, marched his men along the Tempe valley on his way to Athens, and while no defensive castle existed at the time, there were certainly other structures. We don't know precisely what, but work continues on the site and evidence is mounting that the ancient city of Herakleion was sited here.
New Tempe Tunnel Entrance
Long before Phillip, Xerxes trotted his troops through Tempe during Persia's second invasion of Greece. Leonidas and his men fought to the death at Thermopylae in a vain attempt to stop him getting through the pass. Xerxes and his army then continued south to Athens where the Persians were decisively beaten at Salamis.
The castle was never destroyed, but has fallen into ruin over the centuries. It's a rather fine example of medieval fortifications with all the bits and pieces one usually associates with such structures: towers, crenellations, loopholes, cannons – the whole nine yards. (Ron points out that the cannons to be seen dotted about the castle grounds are later than anything that would have been used by Crusaders.)
Defence Tower
Water Cistern
The cistern for water storage would have served the defence tower – all protected by a high wall. Presumably for a last stand?
TAGS: FYROM, Macedonia, Phillip 2nd , Alexander, Platamonas, Thessaly, Pelion, Byzantine, Crusaders, Vale of Tempe, Athens, Xerxes, Persians, Salamis, Thermopylae
Tagged Alexander, Alexander the Great, Athens, Byzantine, Crusaders, FYROM, Leonidas, Macedonia, Pelion, Persians, Phillip 2nd, Phillip the Second, Platamonas, Salamis, Thermopylae, Thessaly, Vale of Tempe, Xerxes


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A struggling songwriter named Dave Seville finds success when he comes across a trio of singing chipmunks: mischievous leader Alvin, brainy Simon, and chubby, impressionable Theodore.
Movie Star Rating : 5.5 Read More
Pleasantly plump teenager, Tracy Turnblad and her best friend, Penny Pingleton audition to be on The Corny Collins Show – and Tracy wins. But when scheming Amber Von Tussle and her mother plot to destroy Tracy, it turns to chaos.
The Edge of Heaven
Nejat seems disapproving about his widower father Ali's choice of prostitute Yeter for a live-in girlfriend. But he grows fond of her when he discovers she sends money home to Turkey for her daughter's university studies. Yeter's sudden death distances father and son. Nejat travels to Istanbul to search for Yeter's daughter Ayten. Political activist Ayten has fled the Turkish police and is already in Germany. She is befriended by a young woman, Lotte, who invites rebellious Ayten to stay in her home, a gesture not particularly pleasing to her conservative mother Susanne. When Ayten is arrested and her asylum plea is denied, she is deported and imprisoned in Turkey. Lotte travels to Turkey,where she gets caught up in the seemingly hopeless situation of freeing Ayten.
An ex-tennis pro carries out a plot to have his wife murdered after discovering she is having an affair, and assumes she will soon leave him for the other man anyway. When things go wrong, he improvises a new plan - to frame her for murder instead.
Escape from Alcatraz tells the story of the only three men ever to escape from the infamous maximum security prison at Alcatraz. In 29 years, the seemingly impenetrable federal penitentiary, which housed Al Capone and "Birdman" Robert Stroud, was only broken once - by three men never heard of again.
A drama with fairy tale elements, where an orphaned musical prodigy uses his gift as a clue to finding his birth parents.
A Little Chaos
A landscape gardener is hired by famous architect Le Nôtre to construct the grand gardens at the palace of Versailles. As the two work on the palace, they find themselves drawn to each other and are thrown into rivalries within the court of King Louis XIV.
A young woman left her family for an unspecified reason. The husband determines to find out the truth and starts following his wife. At first, he suspects that a man is involved. But gradually, he finds out more and more strange behaviors and bizarre incidents that indicate something more than a possessed love affair.
Movie Star Rating : 7 Read More
When young dockworker Jude leaves Liverpool to find his estranged father in America, he is swept up by the waves of change that are re-shaping the nation. Jude falls in love with Lucy, a rich but sheltered American girl who joins the growing anti-war movement in New York's Greenwich Village. As the body count in Vietnam rises, political tensions at home spiral out of control and the star-crossed lovers find themselves in a psychedelic world gone mad.
When petty criminal Luke Jackson is sentenced to two years in a Florida prison farm, he doesn't play by the rules of either the sadistic warden or the yard's resident heavy, Dragline, who ends up admiring the new guy's unbreakable will. Luke's bravado, even in the face of repeated stints in the prison's dreaded solitary confinement cell, "the box," make him a rebel hero to his fellow convicts and a thorn in the side of the prison officers.


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Introducing the judges…
We are delighted to announce our brilliant panel of Judges for the 2019 Electrical Industry Awards. The judges will be meeting in the next couple of weeks to go over all the entries we have received and to decide who will become a finalist. Well done to everybody who sent over entries over the past few months – we wish you all the best! Decisions will be announced at a black tie event, held on Thursday 24 October at the Royal Gardens Hotel, Kensington.
Helen Atkinson – Director of Member Services, ECA
Helen Atkinson, ECA Director of Member Services, oversees ECA's regional and member services teams, as well as IT and Digital development. Previously, Helen worked for the Construction Skills Certification Scheme (CSCS) as Director of Strategy and Communications, and prior to that, she was Director of Client Services for CORGI. She is also a Trustee of the Gas Safety Trust and Chair of its Marketing Committee."I've judged the ET's Marketing Initiative, Electrical App and Distributor Awards for the last 5 years. When reviewing entries for these categories I look for innovative approaches, clear outlines of how customer experiences or sales have been improved and details of how their activity helped meet their organisation's objectives."
Darren Staniforth – Group senior technical presenter, NICEIC
Starting out as an apprentice electrician years ago before moving in to further education as a college lecture, Darren Staniforth is now group senior technical presenter for NICEIC & ELECSA. Darren leads the NICEIC & ELECSA events team and develops and delivers all technical content to those with a need to know how to be safe with electrical systems, across the UK. Darren also represents the group on a number of internal and external technical panels and committees ensuring compliance and safety are paramount. Darren says: In all the years I have been involved in the judging it has been great to see so many fantastic ideas that will make electricians lives easier. I only wish they were invented whilst I was on the tools!"
Simon Cook – Head of Sales, The Lighting Industry Association (LIA)
A new addition to the judging panel this year, Simon, head of sales at the LIA, supports manufacturers, importers, distributors and lighting professionals in training, compliance, testing, WEEE and all aspects of technical support. Having taken over the judging role from his colleague Peter Hunt, who was a valuable member of the panel for many years, Simon says: "The LIA is always keen to play it's part with the wider industry, so when Peter Hunt, COO was unable to join the judging panel I was over the moon to be presented with the opportunity to step in to his shoes. With this being my first judging role, I hope I can fill them. I'm looking forward to meeting my fellow judges and sharing in the experience."
Frank Bertie – Group technical officer, NAPIT
Frank Bertie, NAPIT chief technical officer and trade association chairman has been an integral part of the electrical industry for over three decades. Initially starting out in the Scottish electrical contracting business, Frank moved to London in the late 80s to specialise in inspection and testing. As one of the founding members of NAPIT, Frank sits on a wide range of influential industry committees including JPEL/64 BS 7671, Electrical Safety Roundtable, Electrical Industry Forum, IET, BSI. Frank says: "My time as a judge for the Electrical Times has been a rewarding experience where the wealth of innovation is encouraging for the bright future for all those within the electrical industry."
Steve Brawley – Chief executive, Joint Industry Board (JIB)
Steve Brawley became chief executive of JIB, an organisation that sets the standards for employment, welfare, grading and apprentice training in the electrical contracting industry, in 2009. He previously worked for the Electrical Contractors' Association as an Employee Relations Adviser and has over 40 years experience in the sector. Having been involved with the Electrical Industry Awards for a number of years, Steve is a key part of the judging panel. He says: "I always enjoy judging at the Electrical Industry Awards because our industry is so creative and positive, and it is a privilege to review high quality entries across the various categories."


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Most Asylum Seekers Are Not Cheaters
In the wake of the DSK case, stories of asylum cheats are spreading. But the reality is of honest, desperate people navigating a deeply flawed system.
By Anna Theofilopoulou, August 15, 2011 .
Allegations have surfaced that the Guinean woman who accused the former executive director of the IMF, Dominique Strauss-Kahn, of sexual assault had lied during her asylum proceedings. This story has fed into a larger narrative that desperate immigrants, assisted by unscrupulous enablers, cheat their way through the system to gain asylum. Some media outlets played their part to further advance this impression.
A front-page article by Sam Dolnick in The New York Times last month focused exclusively on false asylum claimants and their enablers who for money or misguided good intentions advise them to lie to gain asylum. Suketu Mehta followed with a piece in The New Yorker on the same subject and focusing on one specific such case. Both writers appeared to have interviewed only asylum cheaters and those who help them cheat. They didn't bother to talk to anyone who actually assists asylum seekers present a truthful and honest case. Neither piece makes any attempt at balance or even mentions the many pro bono organizations and individuals who work with asylum seekers to guide them the right way toward legalization.
Such pieces in the liberal media inevitably produced fodder for the many xenophobes who tend to consider most immigrants illegal. The majority of the comments left on the The New York Times article's blog, while registering satisfaction that the newspaper validated their point of view, demonstrated a complete ignorance of facts regarding asylum proceedings. The comments that called attention to the inaccuracies of the reporting and questioned the reporter's point of view generally came from individuals with direct experience with asylum claimants who were knowledgeable about asylum proceedings.
The U.S. asylum process is long and complicated, and the burden of proof falls solely on the claimant. Weaknesses in the asylum procedure that invite and allow this type of abuse can be fixed. Despite a hopeful start, however, the Obama administration and Congress have abandoned all efforts at immigration reform, and the millions of irregular immigrants who provide badly needed support to the U.S. economy continue to live in the underbelly of society.
Asylum Realities
In an excellent opinion piece in The New York Times on July 5, Mike McGovern of Yale University cautions against stereotyping of all asylum seekers and invites readers to show empathy before judging the woman from Guinea. He describes the dismal socio-economic and political situation in Guinea, which could apply equally to many additional African and other developing countries. Large numbers of the citizens in those countries find that the only way to escape prison or torture or death is to flee their country.
Although some claimants are driven or advised to lie in order to improve their chances of asylum, the bar is very high for asylum applicants. They have to show and substantiate their most horrendous experiences while locating their own legal advice to guide them through the complex process. The burden of proof for the claims falls on the applicants. As for the deciding judges, they rely not only on their experience and intuition but on forensic medical and psychological evaluations performed by accredited U.S. professionals.
Having direct experience in working with asylum seekers through my pro bono services to the Refugee and Immigrant Fund (RIF), a small non-profit organization operating in New York City, I have met many claimants. I have also interacted with several individuals and organizations that help and guide asylum seekers on their way to legalization. The process runs as follows:
The Fund conducts a thorough in-take interview involving detailed questioning to establish the validity of an asylum seeker's claim. There follows research of facts for the drafting of a legal affidavit that will be sent to the immigration authorities or courts on behalf of the applicant. Next comes the desperate search to find a pro bono legal provider to prepare the legal affidavit and submit the application before the one-year deadline. Once an attorney takes up the case, the applicant will be thoroughly questioned to tie up any loose ends in the narrative and if necessary, he or she will be directed to a mental health professional and medical centers and hospitals in New York to verify their mental and physical wounds and scars. The psychological evaluations prepared by health care professionals attesting to severe mental traumas of many of these claimants are submitted together with the legal affidavit and sometimes the mental health professional might be asked to also testify.
Finally the hearing by an immigration officer or judge involves detailed and meticulous questioning searching for veracity and consistency in the claim. When a case comes in front of a judge, the government's lawyer role is to question and second-guess the claimant trying to prove that he/she could safely be deported to their country. After the hearing comes the anxious waiting for the decision. This can result in a celebration when the result is positive or heartbreak when despite all the valiant and honest efforts the decision is negative.
Based on the above process, Frank, a gay man from Cameroon, which has a penal code against homosexuality, won his asylum. Florence, a lesbian from the same country who had been imprisoned and raped by police before her family managed to scrape together the money to send her out of Cameroon, did not. Bushra and Abeer, two Iraqi women who are a Christian and a Shi'ite with one dependent child each and both fleeing abusive husbands and sectarian violence, also won their cases. However Madi, a former World Bank employee and opposition activist in Guinea who was imprisoned and severely tortured in jail and was hospitalized in New York while also suffering from PTSD, was denied asylum at the first hearing. He now has to wait another two years for a court hearing.
At RIF, if the first intake interview conducted by the head of the organization and the senior advisor raises validity questions, the claimant is referred to RIF's legal advisor. He conducts a separate legal evaluation of the case. If he is not satisfied either, the claimant is told that RIF cannot assist. So, for instance, RIF turned down two missionaries from a worn-torn African country living and working in a neighboring country who claimed that security agents from both countries were after them because they had managed to get mineral extraction multinational corporations to invest in their country of origin. Their story had several gaps that could not be satisfactorily answered. RIF denies approximately 30 percent of claimants yearly, based on such reasons.
A Flawed System
In 2010, the number of asylum claims in the United States reached 55,530, a 13 percent increase from 2009, compared to a 5 percent decrease by all industrialized countries together. In fact, the United States was the single largest recipient of asylum claims among industralized countries in 2010. Of those, 21,113 asylum cases were approved, a decrease from the 22,119 granted asylum in 2009 and a further decrease from the 22,838 accepted in 2008.
According to information from the Department of Homeland Security and the UN High Commissioner for Refugees in 2010, the United States approved 38 percent of asylum claims (not 51 percent as reported by The New York Times). A large number of these individuals have fled political violence or gender or religion-based abuse in their countries. Not knowing how to start the asylum process and who to turn to, not surprisingly, many of these asylum seekers fall into the hands of unscrupulous individuals who will seek to profit from their desperation by providing false or at best questionable legal assistance that more often than not derails their efforts toward asylum.
In the United States, no assistance is provided to asylum seekers before their hearings by the federal government, states and most local communities. In New York City, which gets more asylum seekers than anywhere else in the country, the number of reputable non-governmental organizations that provide pro bono legal assistance to asylum seekers is very small. Some individual attorneys provide pro bono or low bono assistance, however the overall numbers are nowhere near enough to cover the high demand. As would be expected, these providers are inundated with cases and have no option but turn down the more complicated claims that require a lot of time and effort on the part of the attorney.
The flaws in the system are many. There are a limited number of attorneys to represent asylum cases. Applicants have a one-year deadline within which to apply for asylum. Because of the high work loads of immigration judges and officers, there are long delays for hearings. Last but not least, few organizations are available to assist asylum seekers. Such organizations could address the innate fear of traumatized people toward authorities as well as their distrust and even shame of needing psychological or psychiatric help. At the same time they would guide them to find legal help and provide them with a warm and humane environment during the difficult time of adjustment in a new country.
An Asylum Model
Such an example is the Asylum Seeker Resource Centre (ASRC), Australia's largest asylum-seeker organization which provides legal aid, advocacy, food, health services, and psychological counseling in a one-stop facility to address all immediate needs of freshly arrived asylum seekers. ASRC is independent and receives its funding from philanthropy, local communities, and state governments that recognize the value of the services for the asylum seekers and the states themselves.
Considering what the United States represents for the rest of the world, it is not surprising that it receives and will continue to receive the largest number of refugees in the developed world. However political extremism has recently been encouraging intolerance and xenophobia, and the country that was created by immigrants and welcomed the "huddled masses yearning to breathe free" has resorted to increased deportations and building fences along its southern border to deal with its immigration problems.
The majority of politicians seem to have forgotten that immigrants, refugees and asylum seekers have contributed to this country's greatness and exceptionalism and that this country was built on the very simple idea that "we all aren't here yet," as MSNBC's Laurence O'Donnell very aptly puts it.
Anna Theofilopoulou is a contributor to Foreign Policy In Focus and a former UN official with background in the Middle East, Africa, and Latin America. She is currently senior advisor to the Refugee and Immigrant Fund, a New York-based non-profit organization providing asylum seekers with legal and psycho-social support on their way to legalization in the United States.
Issues: Human Rights
Regions: North America, United States
Tags: asylum, Illegal Immigrants, immigration, Refugees
View more in North America:
Trump's Send-Them-Back Doctrine
Climate Change Is a Poor People's Issue
Pyongyang on the Potomac
American Concentration Camps, Then and Now
military spending development drug war Donald Trump climate change IMF Benjamin Netanyahu Refugees World Bank Gaza Vladimir Putin Military Intervention Islamic State racism immigration Iraq War United Nations Terrorism nuclear weapons torture
An Eritrean in Israel
No Happy Ending to the Child Refugee Crisis
Child Migrants Are Refugees the U.S. Helped Create
Blowback on the Border: America's Child Refugee Crisis
Afghanistan's Forgotten Refugees


Get Off That Hamster Wheel!
Mental Health Awareness Week is taking place from 8th to 14th May 2017 and IP Inclusive is running events during this week. Wynne-Jones IP and the UK Intellectual Property Office (UK IPO), both supporters of IP Inclusive and signatories of the IP Inclusive Charter for Equality, Diversity and Inclusion, are jointly running an event on mental health at the UK IPO in Newport (Wales) on 11th May 2017. For more information, see the event poster below, and head here to book your space at the event. We hope many of you will be able to join this event to explore this important topic.Check this blog regularly to hear about other events in this series. (See here for the event taking place in Leeds). If you are organising your own event for Mental Health Awareness Week, please let us know and we'll add it to this blog.


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