A memory management method that has the steps of assigning pointers to free memory locations and linking the pointers to one another creating a linked list of free memory locations having a beginning and an end. A free head pointer is assigned to a memory location indicating the beginning of free memory locations and a free tail pointer is assigned to a memory location indicating the end of free memory locations. An initial data pointer is assigned to the memory location assigned to the free head pointer and an end of data pointer is assigned to a last data memory location. The free head pointer is assigned to a next memory location linked to the last data memory location assigned to the end of data pointer. The next memory location indicates the beginning of free memory locations.
This is a Continuation of application Ser. No. 09/855,670, filed May 16, 2001, which claims priority to U.S. Provisional Patent Application Ser. No. 60/237,764 filed on Oct. 3, 2000 and U.S. Provisional Patent Application Ser. No. 60/242,701 filed on Oct. 25, 2000. The disclosure of the prior applications identified above are hereby incorporated by reference.
The invention relates to a method and apparatus for high performance switching in local area communications networks such as token ring, ATM, ethernet, fast ethernet, and gigabit ethernet environments, generally known as LANs. In particular, the invention relates to a new switching architecture geared to power efficient and cost sensitive markets, and which can be implemented on a semiconductor substrate such as a silicon chip.
As computer performance has increased in recent years, the demands on computer networks has significantly increased; faster computer processors and higher memory capabilities need networks with high bandwidth capabilities to enable high speed transfer of significant amounts of data. The well-known ethernet technology, which is based upon numerous IEEE ethernet standards, is one example of computer networking technology which has been able to be modified and improved to remain a viable computing technology. A more complete discussion of prior art networking systems can be found, for example, in SWITCHED AND FAST ETHERNET, by Breyer and Riley (Ziff-Davis, 1996), and numerous IEEE publications relating to IEEE 802 standards. Based upon the Open Systems Interconnect (OSI) 7-layer reference model, network capabilities have grown through the development of repeaters, bridges, routers, and, more recently, "switches", which operate with various types of communication media. Thickwire, thinwire, twisted pair, and optical fiber are examples of media which has been used for computer networks. Switches, as they relate to computer networking and to ethernet, are hardware-based devices which control the flow of data packets or cells based upon destination address information which is available in each packet. A properly designed and implemented switch should be capable of receiving a packet and switching the packet to an appropriate output port at what is referred to wirespeed or linespeed, which is the maximum speed capability of the particular network. Basic ethernet wirespeed is up to 10 megabits per second, and Fast Ethernet is up to 100 megabits per second. A gigabit Ethernet is capable of transmitting data over a network at a rate of up to 1,000 megabits per second. As speed has increased, design constraints and design requirements have become more and more complex with respect to following appropriate design and protocol rules and providing a low cost, commercially viable solution.
The invention is directed to a scheme for reducing clock speed and power consumption in a network chip.
In one embodiment, the invention is a memory management method. The method has the steps of assigning pointers to free memory locations and linking the pointers to one another creating a linked list of free memory locations having a beginning and an end. A free head pointer is assigned to a memory location indicating the beginning of free memory locations and a free tail pointer is assigned to a memory location indicating the end of free memory locations. An initial data pointer is assigned to the memory location assigned to the free head pointer and an end of data pointer is assigned to a last data memory location. The free head pointer is assigned to a next memory location linked to the last data memory location assigned to the end of data pointer. The next memory location indicates the beginning of free memory locations.
In another embodiment, the invention is a memory management method. The method has the steps of assigning pointers to free memory locations and linking the pointers to one another creating a linked list of free memory locations having a beginning and an end. A free head pointer is assigned to a memory location indicating the beginning of free memory locations and a free tail pointer is assigned to a memory location indicating the end of free memory locations. The memory location assigned to the free tail pointer is linked to the memory location assigned to an initial data pointer when memory locations occupied by data is to be indicated as free memory. The free tail pointer is assigned to the last data memory location assigned to the end of data pointer.
Another embodiment of the invention is a memory management system. The system has a pointer assignor that assigns pointers to free memory locations and a linker that links said pointers to one another thereby creating a linked list of free memory locations having a beginning and an end. A free head pointer assignor assigns a free head pointer to a memory location indicating the beginning of free memory locations and a free tail pointer assignor assigns a free tail pointer to a memory location indicating the end of free memory locations. An initial data pointer assignor assigns an initial data pointer to the memory location assigned to the free head pointer and an end of data pointer assignor assigns an end of data pointer to a last data memory location. The free head pointer assignor assigns the free head pointer to a next memory location linked to the last data memory location assigned to said end of data pointer. The next memory location indicates the beginning of free memory locations.
The invention in another embodiment is a memory management system. The system has a pointer assignor that assigns pointers to free memory locations, and a linker that links the pointers to one another thereby creating a linked list of free memory locations having a beginning and an end. A free head pointer assignor assigns a free head pointer to a memory location indicating the beginning of free memory locations, and a free tail pointer assignor that assigns a free tail pointer to a memory location indicating the end of free memory locations. The linker links the memory location assigned to the free tail pointer to the memory location assigned to an initial data pointer when memory locations occupied by data is to be indicated as free memory and the free tail pointer assignor assigns the free tail pointer to the last data memory location assigned to said end of data pointer.
Another embodiment of the invention is a memory management system having a pointer assignor means for assigning pointers to free memory locations. A linker means links the pointers to one another thereby creating a linked list of free memory locations having a beginning and an end, and a free head pointer assignor assigns a free head pointer to a memory location indicating the beginning of the linked list of free memory locations. A free tail pointer assignor assigns a free tail pointer to a memory location indicating the end of the linked list of free memory locations, and an initial data pointer assignor means that assigns an initial data pointer to the memory location assigned to the free head pointer. An end of data pointer assignor means assigns an end of data pointer to a last data memory location. The free head pointer assignor means assigns the free head pointer to a next memory location linked to the last data memory location assigned to the end of data pointer, wherein the next memory location indicates the beginning of free memory locations.
In another embodiment, the invention is a memory management system having a pointer assignor means for assigning pointers to free memory locations and a linker means for linking the pointers to one another thereby creating a linked list of free memory locations having a beginning and an end. A free head pointer assignor means assigns a free head pointer to a memory location indicating the beginning of the linked list of free memory locations, and a free tail pointer assignor means assigns a free tail pointer to a memory location indicating the end of the linked list of free memory locations. The linker means links the memory location assigned to the free tail pointer to the memory location assigned to an initial data pointer when memory locations occupied by data is to be indicated as free memory. The free tail pointer assignor means assigns the free tail pointer to the last data memory location assigned to the end of data pointer.
The invention is in another embodiment a memory management device having a pointer assignor that assigns pointers to free memory locations of a memory. The pointer assignor is in communication with the memory. A linker links the pointers to one another thereby creating a linked list of free memory locations having a beginning and an end. The linker is also in communication with the memory. A free head pointer assignor assigns a free head pointer to a memory location indicating the beginning of the linked list of free memory locations. The free head pointer assignor is in communication with the memory. A free tail pointer assignor assigns a free tail pointer to a memory location indicating the end of the linked list of free memory locations. The free tail pointer assignor is in communication with the memory. An initial data packet pointer assignor assigns an initial data packet pointer to the memory location assigned to the free head pointer. The initial data packet pointer assignor is in communication with the memory. An end of data packet pointer assignor that assigns an end of data packet pointer to a last data memory location in the memory, and the end of data packet pointer assignor is in communication with the memory. The free head pointer assignor assigns the free head pointer to a next memory location linked to the last data packet memory location assigned to the end of data packet pointer, wherein the next memory location indicates said beginning of free memory locations.
In another embodiment, the invention is a memory management device having a pointer assignor that assigns pointers to free memory locations of a memory. The pointer assignor is in communication with the memory. A linker links the pointers to one another thereby creating a linked list of free memory locations having a beginning and an end. The linker is in communication with the memory. A free head pointer assignor assigns a free head pointer to a memory location indicating the beginning of the linked list of free memory locations. The free head pointer assignor is also in communication with the memory. A free tail pointer assignor assigns a free tail pointer to a memory location indicating the end of the linked list of free memory locations. The free tail pointer assignor is in communication with the memory. The linker links the memory location assigned to the free tail pointer to the memory location assigned to an initial data pointer when memory locations occupied by data is to be indicated as free memory, and the free tail pointer assignor assigns the free tail pointer to the last data memory location assigned to the end of data pointer.
FIG. 4A is a flow diagram of the steps to assign data to memory locations in a linked list of free memory.
FIG. 4B is a flow diagram of the steps to add memory locations designated for data to a linked list of free memory.
FIG. 5 is an illustration of a system for managing a linked list of free memory.
FIG. 1 is an example of a block diagram of a switch 100 of the present invention. In this example, switch 100 has 12 ports, 102(1)-102(12), which can be fully integrated IEEE compliant ports. Each of these 12 ports 102(1)-102(12) can be 10BASE-T/100BASE-TX/FX ports each having a physical element (PHY), which can be compliant with IEEE standards. Each of the ports 102(1)-102(12), in one example of the invention, has a port speed that can be forced to a particular configuration or set so that auto-negotiation will determine the optimal speed for each port independently. Each PHY of each of the ports can be connected to a twisted-pair interface using TXOP/N and RXIP/N as transmit and receive protocols, or a fiber interface using FXOP/N and FXIP/N as transmit and receive protocols.
Each of the ports 102(1)-102(12) has a Media Access Controller (MAC) connected to each corresponding PHY. In one example of the invention, each MAC is a fully compliant IEEE 802.3 MAC. Each MAC can operate at 10 Mbps or 100 Mbps and supports both a full-duplex mode, which allows for data transmission and reception simultaneously, and a half duplex mode, which allows data to be either transmitted or received, but not both at the same time.
Flow control is provided by each of the MACs. When flow control is implemented, the flow of incoming data packets is managed or controlled to reduce the chances of system resources being exhausted. Although the present embodiment can be a non-blocking, wire speed switch, the memory space available may limit data transmission speeds. For example, during periods of packet flooding (i.e. packet broadcast storms), the available memory can be exhausted rather quickly. In order to enhance the operability of the switch in these types of situations, the present invention can implement two different types of flow control. In full-duplex mode, the present invention can, for example, implement the IEEE 802.3x flow control. In half-duplex mode, the present invention can implement a collision backpressure scheme.
In one example of the present invention each port has a latency block connected to the MAC. Each of the latency blocks has transmit and receive FIFOs which provide an interface to main packet memory. In this example, if a packet does not successfully transmit from one port to another port within a preset time, the packet will be dropped from the transmit queue.
In addition to ports 102(1)-102(12), a gigabit interface 104 can be provided on switch 100. Gigabit interface 104 can support a Gigabit Media—Independent Interface (GMII) and a Ten Bit Interface (TBI). The GMII can be fully compliant to IEEE 802.3ab. The GMII can pass data at a rate of 8 bits every 8 ns resulting in a throughput of 2 Gbps including both transmit and receive data. In addition to the GMII, gigabit interface 104 can be configured to be a TBI, which is compatible with many industry standard fiber drivers. Since in some embodiments of the invention the MDIO/MDC interfaces (optical interfaces) are not supported, the gigabit PHY (physical layer) is set into the proper mode by the system designer.
Gigabit interface 104, like ports 102(1)-102(12), has a PHY, a Gigabit Media Access Controller (GMAC) and a latency block. The GMAC can be a fully compliant IEEE 802.3z MAC operating at 1 Gbps full-duplex only and can connect to a fully compliant GMII or TBI interface through the PHY. In this example, GMAC 108 provides full-duplex flow control mechanisms and a low cost stacking solution for either twisted pair or TBI mode using in-band signaling for management. This low cost stacking solution allows for a ring structure to connect each switch utilizing only one gigabit port.
A CPU interface 106 is provided on switch 100. In one example of the present invention, CPU interface 106 is an asynchronous 8 or 16 bit I/O device interface. Through this interface a CPU can read internal registers, receive packets, transmit packets and allow for interrupts. CPU interface 106 also allows for a Spanning Tree Protocol to be implemented. In one example of the present invention, a chip select pin is available allowing a single CPU control two switches. In this example an interrupt pin when driven low (i.e., driven to the active state) requiring a pull-up resistor will allow multiple switches to be controlled by a single CPU.
A switching fabric 108 is also located on switch 100 in one example of the present invention. Switching fabric 108 can allow for full wire speed operation of all ports. A hybrid or virtual shared memory approach can also be implemented to minimize bandwidth and memory requirements. This architecture allows for efficient and low latency transfer of packets through the switch and also supports address learning and aging features, VLAN, port trunking and port mirroring.
Memory interfaces 110, 112 and 114 can be located on switch 100 and allow for the separation of data and control information. Packet buffer memory interface (PBM) 110 handles packet data storage while the transmit queue memory interface (TXM) 112 keeps a list of packets to be transmitted and address table/control memory interface (ATM) 114 handles the address table and header information. Each of these interfaces can use memory such as SSRAM that can be configured in various total amounts and chip sizes.
PBM 110 is located on switch 100 and can have an external packet buffer memory (not shown) that is used to store the packet during switching operations. In one example of the invention, packet buffer memory is made up of multiple 256 byte buffers. Therefore, one packet may span several buffers within memory. This structure allows for efficient memory usage and minimizes bandwidth overhead. The packet buffer memory can be configurable so that up to 4 Mbytes of memory per chip can be used for a total of 8 Mbytes per 24+2 ports. In this example, efficient memory usage is maintained by allocating 256 byte blocks, which allows storage for up to 32K packets. PBM 110 can be 64 bits wide and can use either a 64 bit wide memory or two 32 bit wide memories and can run at 100 MHz.
TXM 112 is located on switch 100 and can have an external transmit queue memory (not shown). TXM 112, in this example, maintains 4 priority queues per port and allows for 64K packets per chip and up to 128K packets per system. TXM 112 can run at a speed of up to 100 MHz.
ATM 114 can be located on switch 100 and can have an external address table/control memory (not shown) used to store the address table and header information corresponding to each 256 byte section of PBM 110. Address table/control memory allows up to 16K unique unicast addresses. The remaining available memory is used for control information. ATM 114, in this example, runs up to 133 MHz.
Switch 100, in one example of the invention, has a Flow Control Manager 116 that manages the flow of packet data. As each port sends more and more data to the switch, Flow Control Manager 116 can monitor the amount of memory being used by each port 102(1)-102(12) of switch 100 and the switch as a whole. In this example, if one of the ports 102(1)-102(12) or the switch as a whole is using up too much memory as is predetermined by a register setting predefined by the manufacturer or by a user, Flow Control Manager 116 will issue commands over the ATM Bus requesting the port or switch to slow down and may eventually drop packets if necessary.
In addition to Flow control manager 116, switch 100 also has a Start Point Manager (SPM) 118 connected to Switching Fabric 108, a Forwarding Manager (FM) 120 connected to Switching Fabric 108 and an Address Manager (AM) 122 connected to Switching Fabric 108.
Start Point Manager (SPM) 118, through Switching Fabric 108 in one example of the present invention, keeps track of which blocks of memory in PBM 110 are being used and which blocks of memory are free.
Forwarding Manager 120 can, for example, forward packet data through Switching Fabric 108 to appropriate ports for transmission.
Address Manager (AM) 122 can, through Switching Fabric 108, manage the address table including learning source addresses, assigning headers to packets and keeping track of these addresses. In one example of the invention, AM 122 uses aging to remove addresses from the address table that have not been used for a specified time period or after a sequence of events.
An expansion port 124 can also be provided on switch 100 to connect two switches together. This will allow for full wire speed operation on twenty-five 100M ports (includes one CPU port) and two gigabit ports. The expansion port 124, in this example, allows for 4.6 Gbps of data to be transmitted between switches.
An LED controller 126 can also be provided on switch 100. LED controller 126 activates appropriate LEDs to give a user necessary status information. Each port of the ports 102(1)-102(12), in one example of the invention, has 4 separate LEDs, which provide per port status information. The LEDs are fully programmable and are made up of port LEDs and other LEDs. Each LED can include a default state for each of the four port LEDs. An example of the default operation of each of the port LEDs are shown below.
In addition to the default operations for the port LEDs, each of the port LEDs can be programmed through registers. These registers can be set up, in one example of the invention, by a CPU. By having programmable registers that control LEDs, full customization of the system architecture can be realized including the programmability of the blink rate.
Each of the LEDs can have a table, as shown below, associated with the LED, where register bits RAx, RBx and RCx can be set to provide a wide range of information.
For example, register bits RAx, RBx and RCx can be set to determine when LEDON, LEDBLINK and LEDOFF are activated or deactivated. In addition to the port LEDs, there are additional LEDs which indicate the status of the switch.
Registers 128 are located on switch 100 in this example of the present invention. Registers 128 are full registers that allow for configuration, status and Remote Monitoring (RMON) management. In this example, Registers 128 are arranged into groups and offsets. There are 32 address groups each of which can contain up to 64 registers.
FIG. 2 is an illustration of one embodiment of the invention having a PBM Bus, an ATM Bus, and a TXM Bus for communications with other portions of the switch. In this example PBM 110 is connected to the PBM Bus and an external PBM Memory; TXM 112 is connected to the TXM Bus and an external TXM Memory; and ATM 114 is connected to the ATM Bus and an external ATM Memory. Each of the transmit (TX) and receive (RX) portions of ports 102(1)-102(12) are connected to the PBM Bus, ATM Bus and TXM Bus for communications.
FM 120 is connected to each of the ports 102(1)-102(12) directly and is also connected to the ATM Bus for communications with other portions of the switch. SPM 118 and AM 122 are also connected to the ATM Bus for communications with other portions of the switch.
The operation of switch 100 for transmission of a unicast packet (i.e., a packet destined for a single port for output) in one example of the invention is made with reference to FIG. 2 as follows.
In this example, Switch 100 is initialized following the release of a hardware reset pin. A series of initialization steps will occur including the initialization of external buffer memory and the address table. All ports on the switch will then be disabled and the CPU will enable packet traffic by setting an enable register. As links become available on the ports (ports 102(1)-102(12) and gigabit port 104), an SPT protocol will confirm these ports and the ports will become activated. After the initialization process is concluded normal operation of Switch 100 can begin.
In this example, once a port has been initialized and activated, a PORT_ACTIVE command is issued by CPU. This indicates that the port is ready to transmit and receive data packets. If for some reason a port goes down or becomes disabled, a PORT_INACTIVE command is issued by the CPU.
During unicast transmission, a packet from an external source on port 102(1) is received at the receive (RX) PHY of port 102(1).
In this example, the RX MAC of port 102(1) will not start processing the packet until a Start of Frame Delimiter (SFD) for the packet is detected. When the SFD is detected by the RX MAC portion of port 102(1), the RX MAC will place the packet into a receive (RX) FIFO of the latency block of port 102(1). As the RX FIFO becomes filled, port 102(1) will request an empty receive buffer from the SPM. Once access to the ATM Bus is granted, the RX FIFO Latency block of port 102(1) sends packets received in the RX FIFO to the external PBM Memory through the PBM Bus and PBM 110 until the end of packet is reached.
The PBM Memory, in this example, is made up of 256 byte buffers. Therefore, one packet may span several buffers within the packet buffer memory if the packet size is greater than 256 bytes. Connections between packet buffers can be maintained through a linked list system in one example of the present invention. A linked list system allows for efficient memory usage and minimized bandwidth overhead and will be explained in further detail with relation to FIG. 3A-FIG. 3D.
At the same time packets are being sent to the external PBM Memory, the port will also send the source address to Address Manager (AM) 122 and request a filtering table from AM 122.
If the packet is "good", as is determined through normal, standard procedures known to those of ordinary skill in the art, such as valid length and IEEE standard packet checking such as a Cyclic Redundancy Check, the port writes the header information to the ATM memory through the ATM Bus and ATM 114. AM 122 sends a RECEP_COMPL command over the ATM Bus signifying that packet reception is complete. Other information is also sent along with the RECEP_COMPL command such as the start address and filtering table which indicates which ports the packet is to be sent out on. For example, a filtering table having a string such as "011111111111" would send the packet to all ports except port 1 and would have a count of 11. The count simply is the number of ports the packet is to be sent, as indicated by the number of "1"s.
The RECEP_COMPL command includes information such as a filter table, a start pointer, priority information and other miscellaneous information. FM 120 will read the filter table to determine if the packet is to be transmitted from one of its ports. If it is determined that the packet is to be transmitted from one of its ports, FM 120 will send the RECEP_COMPL command information directly to the port. In this case, the RECEP_COMPL command information is sent to the TX FIFO of port 102(12).
If the port is busy, the RECEP_COMPL command information is transferred to TXM Memory through the TXM Bus and TXM 112. The TXM memory contains a queue of packets to be transmitted. TXM Memory is allocated on a per port basis so that if there are ten ports there are ten queues within the TXM Memory allocated to each port. As each of the ports transmitters becomes idle, each port will read the next RECEP_COMPL command information stored in the TXM Memory. The TX FIFO of port 102(12) will receive, as part of the RECEP_COMPL command information, a start pointer which will point to a header in ATM memory across the ATM Bus which in turn points to the location of a packet in the PBM Memory over the PBM Bus. The port will at this point request to load the packet into the transmit (TX) FIFO of port 102(12) and send it out through the MAC and PHY of port 102(12).
If the port is in half duplex mode, it is possible that a collision could occur and force the packet transmission to start over. If this occurs, the port simply re-requests the bus master and reloads the packet and starts over again. If however, the number of consecutive collisions becomes excessive, the packet will be dropped from the transmission queue.
Once the port successfully transmits a packet, the port will signal FM 120 that it is done with the current buffer. FM 120 will then decrement a counter which indicates how many more ports must transmit the packet. For example, if a packet is destined to eleven ports for output, the counter, in this example, is set to 11. Each time a packet is successfully transmitted, FM 120 decrements the counter by one. When the counter reaches zero this will indicate that all designated ports have successfully transmitted the packet. FM 120 will then issue a FREE command over the ATM Bus indicating that the memory occupied by the packet in the PBM Memory is no longer needed and can now be freed for other use.
When SPM 118 detects a FREE command over the ATM Bus, steps are taken to indicate that the space taken by the packet is now free memory.
Multicast and broadcast packets are handled exactly like unicast packets with the exception that their filter tables will indicate that all or most ports should transmit the packet. This will force the forwarding managers to transmit the packet out on all or most of their ports.
FIG. 3A is an illustration of a PBM Memory structure in one example of the invention. PBM Memory Structure 300 is a linked list of 256 byte segments 302, 304, 306, 308, 310, 312, 314 and 316. In this example segment 302 is the free_head indicating the beginning of the free memory linked list and segment 316 is the free_tail indicating the last segment of free memory.
In FIG. 3B two packets have been received and stored in the PBM Memory. Packet 1 occupies segments 302, 306 and 308 and packet 2 occupies segment 304. Segments 310, 312, 314 and 316 are free memory. Segment 310 is the free_head indicating the beginning of free memory and segment 316 is the free_tail indicating the end of free memory.
In FIG. 3C packet 1 has been fully transmitted and the Forwarding Manager (FM) has issued a FREE command. Since packet 1 is already in a linked list format the SPM can add the memory occupied by packet 1 to the free memory link list. The free_head, segment 310 remains the same. However, the free_tail is changed. This is accomplished by linking segment 316 to the beginning of packet 1, segment 302, and designating the last segment of packet 1, segment 308, as the free_tail. As a result, there is a linked list starting with segment 310 linking to segment 312, segment 312 linking to segment 314, segment 314 linking to segment 316, segment 316 linking to segment 302, segment 302 linking to segment 306 and segment 306 linking to segment 308 where segment 308 is the free_tail.
FIG. 3D in this example simply illustrates the PBM Memory after packet 2 has been transmitted successfully and the Forwarding Manager has issued a FREE command over the ATM Bus. The SPM will detect the FREE command and then add the memory space occupied by packet 2 in the PBM Memory to the free memory linked list. In this example segment 308 is linked to the memory occupied by packet 2, segment 304, and segment 304 is identified as the free_tail.
FIG. 4A is an illustration of the method steps taken in one embodiment of the invention. The steps are described in relation with FIGS. 3A-3D. In step 400, free memory locations 302, 304, 306, 308, 310, 312, 314 and 316 are linked to one another forming a linked list of free memory. In the embodiment shown in FIG. 3A, memory location 302 has a pointer linking memory location 302 to memory location 304. Likewise, memory location 304 has a pointer which links memory location 304 to memory location 306. As can be seen in FIG. 3A, the memory locations in this embodiment of the invention are initially sequentially linked to one another where memory location 302 is linked to memory location 304, memory location 304 is linked to memory location 306, memory location 306 is linked to memory location 308, etc.
In step 402, a free_head pointer is assigned to an initial memory location of the linked list of free memory. As can be seen in the example illustrated in FIG. 3A, the free_head pointer is assigned to memory location 302.
In step 404, a free tail pointer is assigned to a last memory location of the linked list. In the example illustrated in FIG. 3A, the free tail is assigned to memory location 316, which in this case is the last memory location of the linked list of free memory.
In step 406, an initial data pointer is assigned to the memory location assigned to the free head pointer. For example, referring back to FIG. 3A, if a first packet of data were to be saved, the initial data pointer would be assigned to memory location 302 where the free head pointer was assigned. In step 408, the next memory location linked to the memory location assigned to the initial data pointer would be assigned to store more data. For example, if the data would require free memory locations, memory locations 304 and 306 would also be assigned to data packet 1. At memory location 306, an end of data pointer would be assigned to this last data location. The free head pointer would then be assigned to memory location 308 indicating the beginning of free memory as described in step 414.
In another example illustrated in FIG. 3B, a free head pointer initially points to memory location 302 and packet 2 occupies memory location 304. When data packet 1 is to be saved, the initial data pointer is assigned to memory location 302. In this example, packet 1 needs three memory locations and in this case, memory location 306 was linked to memory location 302 and memory location 308 was linked to memory location 306. Thus, the data pointers for packet 1 are assigned to memory locations 302, 306 and 308. The end of data pointer is assigned to memory location 308.
In step 414, the free head pointer is assigned to the next memory location linked to the last data memory location 308, which is in this case, memory location 310. Therefore, the free head pointer is assigned to memory location 310 and the free tail pointer is maintained as memory location 316.
FIG. 4B illustrates the method steps in one embodiment of the invention for freeing memory taken up by data packets and adding this memory to the linked list of free memory.
In step 416, the memory location assigned to the initial data pointer is linked to the memory location assigned to the free tail pointer. For example, in FIG. 3C, packet 1 previously occupied memory locations 302, 306 and 308. In this case, the free tail pointer was assigned to memory location 316. In accordance with step 416 as described in FIG. 4B, the memory location assigned to the free tail pointer 316 is linked to the memory location assigned to the initial data pointer, memory location 302.
In step 418, the free tail pointer is assigned to the memory location assigned to the end of data pointer. For example, in FIG. 3C, the end of data pointer for packet 1 was memory location 308. In this example, the free tail pointer is assigned to the memory location assigned to the end of data pointer, memory location 308. The free head pointer in this example remains assigned to memory location 310.
In FIG. 3D, packet 2 is indicated as being free memory. Thus, in accordance with step 416, the memory location 308 assigned to the free tail is linked to the initial data pointer memory location 304. Since data packet 2 only occupies one memory location, the end of data pointer is also assigned to memory location 304.
In step 418, the free tail pointer is assigned to the memory location assigned to the end of data pointer. In the example depicted in FIG. 3D, the free tail pointer is assigned to memory location 304 which was assigned to the end of data pointer.
FIG. 5 is an illustration of a system for managing a linked list memory. FIG. 5 will be described with reference to FIGS. 3A-3D. A pointer assigner 500 is responsible for linking memory locations to one another as depicted in FIG. 3A. For example, in this example, pointers are assigned to memory locations 302, 304, and 306-316.
Linker 502 directs which pointers are assigned to which memory locations. For example, in FIG. 3A, the pointer of memory location 302 is linked to memory location 304. The memory location 304 is linked to memory location 306. The memory location 306 is linked to memory location 308, etc.
The system also has a free head pointer assignor 504 and a free tail pointer assignor 506. The free head pointer assignor 504 assigns a free head pointer to the beginning of a linked list structure. In this case, the free head pointer assignor assigns a free head pointer to memory location 302 as depicted in FIG. 3A. The free tail pointer 506 assigns a free tail pointer to the last m memory location of the linked list as depicted in FIG. 3A. In this case, the free tail pointer assignor assigns the free tail pointer to memory location 316.
The system also has a initial data pointer assignor 408 which assigns an initial data pointer to the memory location the free head pointer is assigned to. For example, in FIG. 3B, packet 2 occupied memory location 304 and the free head pointer was assigned to memory location 302. The initial data pointer assignor 508 assigned the initial data pointer to memory location 302.
Data assignor 510 assigns a sufficient number of memory locations to store data packets until an end of data has been found. In this case, data packet 1 needs three memory locations. Therefore, the data assignor assigns the packet data to memory locations 306 and 308.
The end of data pointer assignor 512 determines when the end of data has been reached and assigns an end of data pointer to the memory location occupied by the end of data. In this case, the end of data pointer assignor 512 assigns an end of data pointer to memory location 308 indicating the end of data as shown in FIG. 3B.
The free head pointer assignor 504 then reassigns the free head to the next memory location in the linked list of memory assigned to the memory location the end of data pointer assignor the end of data pointer is assigned to. In this case, the end of data pointer is assigned to memory location 308. Therefore, this free head pointer is assigned to the next memory location in the linked list, memory location 310.
In the case that memory is to be freed, as illustrated in FIG. 3C, linker 502 links the memory location that the free tail pointer was pointing to the memory location the initial data pointer was assigned. In this case, as illustrated in FIG. 3C, the free tail pointer was initially assigned to memory location 316 and the initial data pointer was assigned to memory location 302. Therefore, memory location 316 is linked to memory location 302 by linker 502. Finally, in order to indicate the memory location occupied by packet 1 as free memory, the free tail pointer assignor 506 assigns the memory location assigned to the end of data pointer memory location 308 to free tail pointer. Thus, the free tail pointer is assigned to memory location 308.
assigning said free head pointer to a next memory location linked to said last data memory location assigned to said end of data pointer, wherein said next memory location indicates said beginning of free memory locations.
2. The method as recited in claim 1 wherein when data to be saved is only large enough to occupy one memory location said end of data pointer is assigned to said memory location assigned to said initial data pointer.
assigning a sufficient number of memory locations linked to said memory location assigned to said initial data pointer.
assigning said free tail pointer to said last data memory location assigned to said end of data pointer.
linking said memory location assigned to said free tail pointer to said memory location assigned to an initial data pointer when memory locations occupied by data is to be indicated as free memory.
7. The method as recited in claim 6 wherein when data to be saved is only large enough to occupy one memory location said end of data pointer is assigned to said memory location assigned to said initial data pointer.
wherein said free head pointer assignor assigns said free head pointer to a next memory location linked to said last data memory location assigned to said end of data pointer, wherein said next memory location indicates said beginning of free memory locations.
10. The system as recited in claim 9 wherein when data to be saved is only large enough to occupy one memory location said end of data pointer assignor assigns said end of data pointer to said memory location assigned to said initial data pointer.
a data assignor that assigns a sufficient number of memory locations linked to said memory location assigned to said initial data pointer.
said assignor assigns said free tail pointer to said last data memory location assigned to said end of data pointer.
wherein said linker links said memory location assigned to said free tail pointer to said memory location assigned to an initial data pointer when memory locations occupied by data is to be indicated as free memory.
15. The system as recited in claim 14 wherein when data to be saved is only large enough to occupy one memory location said end of data pointer assignor assigns said end of data pointer to said memory location assigned to said initial data pointer.
16. The system as recited in claim 14 wherein when data to be saved is larger than one memory location, a data assignor assigns a sufficient number of memory locations linked to said memory location assigned to said initial data pointer.
wherein said free head pointer assignor means assigns said free head pointer to a next memory location linked to said last data memory location assigned to said end of data pointer, wherein said next memory location indicates said beginning of free memory locations.
18. The system as recited in claim 17 wherein when data to be saved is only large enough to occupy one memory location said end of data pointer assignor means assigns said end of data pointer to said memory location assigned to said initial data pointer.
a data assignor means for assigning a sufficient number of memory locations linked to said memory location assigned to said initial data pointer.
said assignor means assigns said free tail pointer to said last data memory location assigned to said end of data pointer.
wherein said linker means links said memory location assigned to said free tail pointer to said memory location assigned to an initial data pointer when memory locations occupied by data is to be indicated as free memory.
23. The system as recited in claim 22 wherein when data to be saved is only large enough to occupy one memory location said end of data pointer assignor means assigns said end of data pointer to said memory location assigned to said initial data pointer.
24. The system as recited in claim 22 wherein when data to be saved is larger than one memory location, a data assignor means assigns a sufficient number of memory locations linked to said memory location assigned to said initial data pointer.
wherein said free head pointer assignor assigns said free head pointer to a next memory location linked to said last data packet memory location assigned to said end of data packet pointer, wherein said next memory location indicates said beginning of free memory locations.
26. The device as recited in claim 25 wherein when a single data packet is to be saved said end of data packet pointer assignor assigns said end of data packet pointer to said memory location assigned to said initial data packet pointer.
a data packet assignor that assigns a sufficient number of memory locations linked to said memory location assigned to said initial data packet pointer, said data packet assignor in communication with said memory.
said assignor assigns said free tail pointer to said last data packet memory location assigned to said end of data packet pointer.
31. The device as recited in claim 30 wherein when a single data packet is to be saved said end of data packet pointer assignor assigns said end of data packet pointer to said memory location assigned to said initial data packet pointer.
32. The device as recited in claim 30 wherein when more than one data packet is to be saved, a data packet assignor assigns a sufficient number of memory locations linked to said memory location assigned to said initial data packet pointer, said data packet assignor in communication with said memory.


Maria Vicente, a graduate of the DNS 2011 team, shared her thoughts on how to resist capitalism in daily life.
2) Be critical towards globalisation and its effects on global diversity. Keep yourself informed.
3) Protect the minorities! And empower those who are stigmatised.
4) Get yourself a reachable challenge (e.g. no plastic for a month, no meat for a week).
5) Remember that there are unlimited amount of ways to resist capitalism. It is important to take small steps and appreciate them!
6) Choose a more responsible bank – for example one that doesn't support wars.
7) Preserve and embrace ethnic diversity.
8) Don't throw away stuff: find a new life for it.
9) Save water and energy.
10) Join a collective working together to improve the world.
11) Make your own hygiene products.
12) Install and use solar panels in your house.
13) Make your own household cleaning materials.
14) Wash clothes only when it is needed. Air clothes that you have only used once.
15) Wash clothes on a low temperature.
16) Don't produce garbage (instead: compost, recycle, donate).
17) Grow your own food.
18) Buy organic food (not GMO) and avoid food from big corporations.
19) Organise urban gardens in your city, and inspire those around you to grow food.
20) Go to live in the countryside and strive for self-sufficiency.
21) Make food packages instead of buying take-away food.
22) Get involved in foraging activities with your school, neighbours, community, etc.
23) Avoid sugar! It harms your body and mind.
24) Take good care of your health. The healthier you are, the more you can do to improve the world.
25) Get to know your neighbours. Capitalism promotes individualism and loneliness. If you get together with those around you, you will all become stronger.
26) Be in control of your own life. Don't let yourself be ruled by trends, fashions, and the mainstream opinions and ways of living.
27) Take time to truly follow your own path. Your future belongs to you, don't allow yourself to be put into a box.
28) Be together with other people about your difficulties, and theirs. If you share your problems, they become smaller.
29) Promote togetherness in your neighbourhood, community, village, city, etc.
30) Disconnect from internet. Connect with People and nature.
31) Speak out when you see something wrong.
32) Get involved in other people's lives.Your brothers and sisters have for sure found some ways to fight capitalism, acknowledge and respect them for it.
33) Refuse to accept stereotypes.
34) Free yourself from what is expected from you!
36) Dumpster dive and talk about dumpster diving.
39) Buy things of a good quality that will last longer.
40) Buy fair trade products.
41) Avoid buying NEW electronics.
42) Don't follow fast fashion.
44) Don't follow trends that disappear fast.
45) Avoid gender targeted products.
46) In case you have a baby: Avoid disposable diapers and wet towels.
47) In case you have a baby: Buy second hand clothes, stroller, car seat, etc.
48) In case you have a baby: Avoid baby targeted products.
49) In case you have a baby: Re-sell or gift your used baby things.
50) In case you have a baby: Avoid food jars, plastic fruit pouches and all sorts of "baby food".
51) In case you have a baby: Avoid formula milk! Breastfeed!
53) Avoid buying things during date-specific consumerist periods (Valentine's day, Christmas).
54) Get as many things for FREE as possible.
55) Give away as many things for FREE as possible.
56) In case you are a woman: Use reusable menstrual products (moon cup, cloth pads, etc).
57) Support collective owned companies.
58) Don't buy stuff made in sweat shops (clothes, electronics).
59) Go for Open Source programmes, and all things that are made for people, not for profit.
60) Get to know who owns which companies (for example, Unilever owns many small companies that look "innocent").
61) In case you are a woman: Get to know your body and your cycle works! Be aware of which contraceptive method you use!
62) Pay CLOSE attention to which medicines you use, and why!
68) Buy an electric car.
69) Fuel your car from state-owned oil companies.
71) Avoid travelling by plane and if you do so, choose a responsible company.
72) Avoid plastic of all sorts.
75) Avoid all sorts of useless packaging.
76) Actively protest war and tell your family and friends about the ugly business behind it.
77) Actively protest companies that dig oil (for example, by trying to stop the ships from leaving the harbour) – or simply tell people about it!
78) Actively protest companies that mine and transport coal, uranium, nuclear waste, or other harmful materials (for example, by trying to block the trains that transport it) – or simply tell people about it!
79) Actively protest heavy machinery from entering the forest to cut it – or simply tell people about it!
80) Avoid buying stuff that travels too much before arriving to you.
81) Never buy plastic water bottles, and other one-time use products.
83) Talk with restaurants and supermarkets in your area about how to reduce food waste.
84) Form collectives (in your community, work place, block buildings, etc). It is by far one of the most efficient ways to fight capitalism. Collectivism is the biggest threat to their success.
85) Share economy (in your family, work place, village, block buildings, etc).
86) Share house and your private facilities.
87) Buy food in big quantities together with your friends, neighbours, family, etc.
94) Speak out for workers' rights!
97) Join, or create, a workers' union.
98) Watch documentaries, read articles! Get informed! Be intellectually active!
99) Share this article and give ideas to your friends in the many ways there exist to fight capitalism!
Author: Marina Vicente, Teacher at DNS College and graduate of DNS team 2011.
Students at DNS realise the need of humanity and solidarity when traveling in Africa, when going to work with refugees, when creating projects for marginalised parts of society, when living together with disabled or challenged adults and youngsters.
Watch our newest video about travel to Western Africa by bus on our Youtube channel.
Reflections from an action packed Erasmus+ project at the Tvind campus with participants from six countries sharing their stories. Expressing and creating culture through different forms of workshops.
We create peace, when we fight prejudice and stereotypes, when we build bridges between each other. We create peace, when we liberate, emancipate ourselves from oppression. No peace without justice.
On this first International Day of Education, students & teachers at DNS are excited to celebrate four decades of providing a unique pre-service teacher training programme.


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MEXICAN SPAS MIX RELAXATION
WITH TRADITIONAL HOSPITALITY
by Bob Brooke
Irma Gonzales, her hands covered with aromatic oil, laid her fingers gently on my forehead and began the long, slow transformation that would take me from the stress of 20th century life to the peacefulness of total relaxation. Little did I realize that in the next 45 minutes I'd surrender myself totally to her gentle but firm touch. She worked over my head and then seemed to pull the tension out of my shoulders, She moved on down to my feet, massaging them until I could feel my organs shifting around inside me body. As she rubbed and stroked my legs, massaging the oil into them until the friction created a warm glow, I drifted into a deep meditation that brought colors to my eyes--from bright orange and red to blue and purple. I became a prisoner of her decisive touch. Thus began my first-ever massage in a spa at the magic touch of a young Mexican woman.
Spas are sprouting up all over Mexico like beans in a field The cost of a week-long spa package at a Mexican beachfront resort is one-third to one-fourth the price of the same program in the U.S. Those at inland spas are even less.
Mexican spas run the gamut from traditional mineral spring spas to destination spas that are self-contained to European-style spas with facilities for men and women that are part of a large resort. Since the European-style spa is relatively new in Mexico, most offer new facilities and young energetic staffs.
As interest in fitness sails to an all-time high and as a growing number of Americans view exercise and fitness as an integral part of their daily lives, travelers to Mexico are looking for spas and fitness centers both at the beach and beyond. Unlike spa resorts in the U.S., few of today's Mexican resorts exist solely as destination spas, except for Ixtapan de la Sal in the State of Mexico and Rancho la Puerta in Baja California. Spa Las Quintas and Hotel and Spa Hacienda Cocoyoc, in the State of Morelos, are good examples of inland resort spas. Many resort owners are now looking at spas as an additional amenity, likening them to pools or golf. But a spa is much more and shouldn't be taken lightly. Owners of both the Morelos' spas have taken steps to make sure their spas go well beyond just a resort amenity.
The Fitness Vacation
According to Spa-Finders of New York, one of the largest tour operators specializing in spa vacations, only 10 percent of the market go to a resort just for the spa. Most are looking for a well rounded vacation, including sightseeing, shopping, sports activities, and the like. And because most of Mexico's spas cater to small groups of no more than 30 persons per week, the spa experience is very personal and allows spa personnel to offer advice on stress management and how to continue living a healthier lifestyle.
Spas elsewhere are generally found in more upscale resorts such as the Palms in Palm Springs and Canyon Ranch of Tucson, Arizona. But in Mexico spas are popping up in a wide range of resorts, making them downright affordable for the average person. And with packages, they can be almost a bargain.
Until now, I never considered going to a spa. I exercise daily and lift weights. My body is probably in the best shape of my life. So why did I venture into Mexico to have one of the most sensual experiences of my life? Spas are for losing weight. Right? Not any more.
"People are tired of going on a vacation where they overeat, overdrink, oversun, and under sleep," said Orlando Hidalgo, spokesman for the Mexican Spa Association.
Hidalgo practices what he preaches. At his spa, Hosteria Las Quintas, guests not only get the full body treatment but lots of outdoor exercise as well, for Las Quintas is the only eco-spa in Mexico, if not North America.
Hosteria Las Quintas, where Spa Las Quintas is located, fits into a small 500-square-meter parcel of land called a quinta five minutes from downtown Cuernavaca, 90 minutes from Mexico City. It began as a modest eight-room home, which has now grown into a 60-room hotel. The hotel grounds are a riot of color. Flowers, all marked by species, are arranged in a tropical wonderland punctuated by a huge old ceiba tree, two pools, a fountain and bronze and terra cotta statuary. Most of the rooms are terrace suites and six have private Jacuzzi.
Spa Las Quintas, which is separately owned and managed, occupies 10 percent of the hotel space. It blends the interior with the exterior through murals painted by Gustavo Morales and Ezmeralda Brito, which integrate earth and man. The whole effect is not only artistic but very soothing. It's almost like taking treatments in an art gallery. A large open salon on the second level has benches on rollers so guests can look out into the garden while receiving manicures or pedicures The third level features an exercise gym with all the main machines, and the roof will soon be revamped for nude sunbathing of both sexes. Spa Las Quintas has gone one step beyond most spas, it not only recreates and restores beauty and health to its guests, but it does it in an atmosphere of beauty and color.
Here, 90 percent of the guests are women--the much smaller men's spa with sauna, showers, steam room, massage room and hydrotherapy tub attests to that. The women's section on the second level, however, offers a complete beauty salon plus treatment areas. "We try to do as little with machines as possible," said Hidalgo, co-owner of the spa. "We believe in a hands-on approach."
In addition, Spa Las Quintas does have ecotours, something which none of the others do. "We don't have aerobics classes," he said. "Unlike many other spas, we stress ecofitness, meshing natural tours with spa treatments and activities. We offer a different tour each day, and combine them with walking, meditation, buying oils in the market, etc. to give our guests a well-rounded program."
Spa Cuisine
Food at Mexican spas has come along way from the bland and sparse diets many spas had become known for. Mexican cuisine, although normally rich, can be made into delicious entree's at the hands of creative chefs like Alejandro Lemus Gutierrez of Hosteria Las Quintas. A typical dinner entree from the spa menu, such as requeson crepes with zucchini and mushrooms or chicken breast with huitlacoche (corn fungus) had little more than 300 calories.
Breakfast at Las Quintas began with a magnificent buffet featuring many Mexican dishes. One of the favorites among the chilaquiles verdes, municlores al chipotle, plantanos fritos and huevos al guston, was quesadillas served on a variety of tortillas. While some of these dishes were high in caloric content, the exercise of day touring burns them off.
Spa Hacienda Cocoyoc
Morelos's other spa, Hotel Hacienda Cocoyoc, 30 minutes from Cuernavaca at a subtropical 4,000 feet above sea level, is built around an original Dominican convent, the first in the Americas. Originally, this fine hotel was a hacienda built by Cortes' son to raise sugarcane and process sugar. Its many buildings lie in a lush garden movie-set-like setting surrounding the ruins of the sugar mill. An 18-hole golf course now winds its way through the original mango grove and part of the old sugar mill has become the disco.
Named the "Paradise of the Americas" by Viceroy Mendoza in the 16th century, Hacienda Cocoyoc was among the twelve most important sugar plantations in the country. It was burned to ruin during the Mexican Revolution and after many years of neglect and several owners, Don Paulino Rivera Torres bought what remained of the it and made it into a hotel. His son, Paulino, runs the hotel today.
"We're surrounded by lots of interesting things to do," said Don Paulino. "This is the real Mexico. "We not only offer a relaxing spa experience, but an educational one, also."
Spa Cocoyoc lies at the heart of Hotel Hacienda Cocoyoc, a modern resort with two golf courses, three tennis courts and four swimming pools, restaurants and bars. Housed in a building constructed around an existing arch, it consists of a Jacuzzi, juice bar, beauty salon, three rooms for facials, two for massage, a hydromassage room, herbal wrap room, workout center with Nautilus equipment, and two "wet" areas, one for men and one for women, including dressing rooms, showers, saunas, steam baths, pressure showers, Swiss showers, loopha scrub rooms, and sunning areas. Designed and outfitted by Romanians, it offers the ultimate in European spa services, including an Alpha Jet capsule, just one of several state-of-the-art pieces of equipment. "Though our spa is Romanian in concept, it's definitely American in spirit," said Don Paulino.
A typical day at Spa Cocoyoc begins with a medical checkup, followed by a walk or a game of tennis, then a loofah scrub, massage, mudpack or seaweed wrap to relax, then water treatments. After a leisurely lunch and rest, guests can take another spa treatment followed by dinner.
I chose to go horseback riding in the early morning through fields of sugarcane and corn. The peacefulness of the fields, dotted here and there by campesinos beginning their daily chores, and the jovialness of my guide, Bernadino, set the pace for a relaxing day of mud wraps and hydrotherapy back at the spa.
After my ride, I sat down to a served breakfast, beginning with a refreshing blended drink made of Nopal cactus, pineapple and celery. This was followed by homemade yogurt with granola, chopped fruit and honey, and finally an omelette made of egg whites and mushrooms.
While Mexican spa packages and even a la carte prices are reasonable, the hidden cost of any spa vacation comes in tipping. Unfortunately, with so many services being taken, tipping can get out of hand. This is probably why spas have traditionally attracted the rich. Middle-market guests, however, may find the 20 to 30 percent tips that most spa personnel expect a little pricey. True, if the service is done well and warrants it, then a good tip should be given. However, if guests are required to tip to offset the salary paid to spa employees, then that's another matter.
Hidalgo has his own solution. He charges all of his guests a flat percentage payable at their departure. This amount he divides up among all of his employees, much the way hoteliers do in Bermuda.
All in all, a Mexican spa vacation, especially at these two Morelos spas, is like no other. Unfortunately, the relaxing effects of spa treatments are short lived, even if the spa goer follows a healthy lifestyle. But that makes it even easier to book a spa package the second and third time around.
The full version of this article first appeared in Spa Management Magazine.
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11 from Staunton, Waynesboro make VBL All-Star game
Seven players from the Staunton Braves and four from the Waynesboro Generals were named to the Valley Baseball League All-Star team on Monday.
11 from Staunton, Waynesboro make VBL All-Star game Seven players from the Staunton Braves and four from the Waynesboro Generals were named to the Valley Baseball League All-Star team on Monday. Check out this story on newsleader.com: http://www.newsleader.com/story/sports/2014/07/02/make-vbl-star-game-staunton-waynesboro/12089859/
Staff Report Published 3:46 p.m. ET July 2, 2014
File (Photo: File )
The game will be held on Sunday at Veterans Memorial Park at James Madison University in Harrisonburg at 7:30 p.m. A total of 58 players from 11 league teams were named to the North and South rosters, with each roster represented by at least four players.
Players selected from Staunton include: J.C. Escarra, catcher, Florida International University; Kooper Kessler, pitcher, Middle Tennessee State; Gunnar McNeill, infielder, Florida International University; Blake Ream, pitcher, Longwood University; Richie Ricciardi, infielder, Alvernia University; Joey Rodriguez, outfielder, Wake Forest University; and Hunter Thomas, outfielder, Georgia Southern University.
Players selected from Waynesboro include: Cole Gruber, outfielder, University of Nebraska Omaha; Mike Marcinko, utility, Shippensburg University; Jeff Schank, pitcher, Butler University; Zach Williamsen, pitcher, University of Nebraska Omaha.
Waynesboro's James Washington on ESPN in national cornhole tournament


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text:
Factors across life associated with remaining free from functional limitations despite lifelong exposure to socioeconomic adversity
Almar A.L. Kok, Mai Stafford, Theodore D. Cosco, Martijn Huisman, Dorly Deeg, Diana Kuh, Rachel Cooper
Background: There are substantial socioeconomic inequalities in functional limitations in old age. Resilience may offer new insights into these inequalities by identifying constellations of factors that protect some individuals from developing functional limitations despite socioeconomic adversity. Methods: Data from 1973 participants in the Medical Research Council National Survey of Health and Development (Great Britain), followed from birth until age 60-64, were used. Functional limitations were defined as reporting difficulty with at least 1 of 16 activities at age 60-64. Lifetime socioeconomic adversity was based on socioeconomic trajectories, categorised into three adversity levels. Analysis of covariance and regression models were used to compare psychosocial factors and health-related behaviours between a Resilient' group (high adversity but no functional limitations) and five groups with other combinations of adversity and limitations. Results: Prevalence of functional limitations in high, intermediate and low adversity groups was 44%, 30% and 23% in men, and 61%, 55% and 49% in women, respectively. Compared with the other high adversity group, the resilient group had a lower prevalence of childhood illness (12% vs 19%) and obesity throughout ages 43-64 (70% vs 55%). Partially adjusted models also showed higher adolescent self-management, lower neuroticism, higher prevalence of volunteer work and physical activity (age 60-64) and lower prevalence of smoking (age 43) in the resilient. Marital status and contact frequency were not associated with resilience. Conclusion: Results suggest protection against childhood illness, health-behavioural factors and self-regulation as targets for interventions across life that may particularly benefit those with long-term exposure to socioeconomic adversity.
Journal of Epidemiology and Community Health
https://doi.org/10.1136/jech-2018-211736
Accepted/In press - 16 Feb 2019
Health Surveys
Biomedical Research
Neuroticism
health behaviour
physical function
psychosocial factors
Kok, A. A. L., Stafford, M., Cosco, T. D., Huisman, M., Deeg, D., Kuh, D., & Cooper, R. (Accepted/In press). Factors across life associated with remaining free from functional limitations despite lifelong exposure to socioeconomic adversity. Journal of Epidemiology and Community Health, 1-8. https://doi.org/10.1136/jech-2018-211736
Kok, Almar A.L. ; Stafford, Mai ; Cosco, Theodore D. ; Huisman, Martijn ; Deeg, Dorly ; Kuh, Diana ; Cooper, Rachel. / Factors across life associated with remaining free from functional limitations despite lifelong exposure to socioeconomic adversity. In: Journal of Epidemiology and Community Health. 2019 ; pp. 1-8.
@article{26fb862419284f65845c08a5dd97263b,
title = "Factors across life associated with remaining free from functional limitations despite lifelong exposure to socioeconomic adversity",
abstract = "Background: There are substantial socioeconomic inequalities in functional limitations in old age. Resilience may offer new insights into these inequalities by identifying constellations of factors that protect some individuals from developing functional limitations despite socioeconomic adversity. Methods: Data from 1973 participants in the Medical Research Council National Survey of Health and Development (Great Britain), followed from birth until age 60-64, were used. Functional limitations were defined as reporting difficulty with at least 1 of 16 activities at age 60-64. Lifetime socioeconomic adversity was based on socioeconomic trajectories, categorised into three adversity levels. Analysis of covariance and regression models were used to compare psychosocial factors and health-related behaviours between a Resilient' group (high adversity but no functional limitations) and five groups with other combinations of adversity and limitations. Results: Prevalence of functional limitations in high, intermediate and low adversity groups was 44{\%}, 30{\%} and 23{\%} in men, and 61{\%}, 55{\%} and 49{\%} in women, respectively. Compared with the other high adversity group, the resilient group had a lower prevalence of childhood illness (12{\%} vs 19{\%}) and obesity throughout ages 43-64 (70{\%} vs 55{\%}). Partially adjusted models also showed higher adolescent self-management, lower neuroticism, higher prevalence of volunteer work and physical activity (age 60-64) and lower prevalence of smoking (age 43) in the resilient. Marital status and contact frequency were not associated with resilience. Conclusion: Results suggest protection against childhood illness, health-behavioural factors and self-regulation as targets for interventions across life that may particularly benefit those with long-term exposure to socioeconomic adversity.",
keywords = "health behaviour, physical function, psychosocial factors, socio-economic",
author = "Kok, {Almar A.L.} and Mai Stafford and Cosco, {Theodore D.} and Martijn Huisman and Dorly Deeg and Diana Kuh and Rachel Cooper",
doi = "10.1136/jech-2018-211736",
journal = "Journal of Epidemiology and Community Health",
issn = "0143-005X",
publisher = "BMJ Publishing Group",
Kok, AAL, Stafford, M, Cosco, TD, Huisman, M, Deeg, D, Kuh, D & Cooper, R 2019, 'Factors across life associated with remaining free from functional limitations despite lifelong exposure to socioeconomic adversity' Journal of Epidemiology and Community Health, pp. 1-8. https://doi.org/10.1136/jech-2018-211736
Factors across life associated with remaining free from functional limitations despite lifelong exposure to socioeconomic adversity. / Kok, Almar A.L.; Stafford, Mai; Cosco, Theodore D.; Huisman, Martijn; Deeg, Dorly; Kuh, Diana; Cooper, Rachel.
In: Journal of Epidemiology and Community Health, 16.02.2019, p. 1-8.
T1 - Factors across life associated with remaining free from functional limitations despite lifelong exposure to socioeconomic adversity
AU - Kok, Almar A.L.
AU - Stafford, Mai
AU - Cosco, Theodore D.
AU - Huisman, Martijn
AU - Deeg, Dorly
AU - Kuh, Diana
AU - Cooper, Rachel
N2 - Background: There are substantial socioeconomic inequalities in functional limitations in old age. Resilience may offer new insights into these inequalities by identifying constellations of factors that protect some individuals from developing functional limitations despite socioeconomic adversity. Methods: Data from 1973 participants in the Medical Research Council National Survey of Health and Development (Great Britain), followed from birth until age 60-64, were used. Functional limitations were defined as reporting difficulty with at least 1 of 16 activities at age 60-64. Lifetime socioeconomic adversity was based on socioeconomic trajectories, categorised into three adversity levels. Analysis of covariance and regression models were used to compare psychosocial factors and health-related behaviours between a Resilient' group (high adversity but no functional limitations) and five groups with other combinations of adversity and limitations. Results: Prevalence of functional limitations in high, intermediate and low adversity groups was 44%, 30% and 23% in men, and 61%, 55% and 49% in women, respectively. Compared with the other high adversity group, the resilient group had a lower prevalence of childhood illness (12% vs 19%) and obesity throughout ages 43-64 (70% vs 55%). Partially adjusted models also showed higher adolescent self-management, lower neuroticism, higher prevalence of volunteer work and physical activity (age 60-64) and lower prevalence of smoking (age 43) in the resilient. Marital status and contact frequency were not associated with resilience. Conclusion: Results suggest protection against childhood illness, health-behavioural factors and self-regulation as targets for interventions across life that may particularly benefit those with long-term exposure to socioeconomic adversity.
AB - Background: There are substantial socioeconomic inequalities in functional limitations in old age. Resilience may offer new insights into these inequalities by identifying constellations of factors that protect some individuals from developing functional limitations despite socioeconomic adversity. Methods: Data from 1973 participants in the Medical Research Council National Survey of Health and Development (Great Britain), followed from birth until age 60-64, were used. Functional limitations were defined as reporting difficulty with at least 1 of 16 activities at age 60-64. Lifetime socioeconomic adversity was based on socioeconomic trajectories, categorised into three adversity levels. Analysis of covariance and regression models were used to compare psychosocial factors and health-related behaviours between a Resilient' group (high adversity but no functional limitations) and five groups with other combinations of adversity and limitations. Results: Prevalence of functional limitations in high, intermediate and low adversity groups was 44%, 30% and 23% in men, and 61%, 55% and 49% in women, respectively. Compared with the other high adversity group, the resilient group had a lower prevalence of childhood illness (12% vs 19%) and obesity throughout ages 43-64 (70% vs 55%). Partially adjusted models also showed higher adolescent self-management, lower neuroticism, higher prevalence of volunteer work and physical activity (age 60-64) and lower prevalence of smoking (age 43) in the resilient. Marital status and contact frequency were not associated with resilience. Conclusion: Results suggest protection against childhood illness, health-behavioural factors and self-regulation as targets for interventions across life that may particularly benefit those with long-term exposure to socioeconomic adversity.
KW - health behaviour
KW - physical function
KW - psychosocial factors
KW - socio-economic
U2 - 10.1136/jech-2018-211736
DO - 10.1136/jech-2018-211736
JO - Journal of Epidemiology and Community Health
JF - Journal of Epidemiology and Community Health
SN - 0143-005X
Kok AAL, Stafford M, Cosco TD, Huisman M, Deeg D, Kuh D et al. Factors across life associated with remaining free from functional limitations despite lifelong exposure to socioeconomic adversity. Journal of Epidemiology and Community Health. 2019 Feb 16;1-8. https://doi.org/10.1136/jech-2018-211736
10.1136/jech-2018-211736


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Our firm has many years of experience in the area, having represented dozens of clients, amongst them sports and media personalities, including Loni Herzikovich, chairman and owner of Maccabi Tel Aviv, Mr. Meir Shamir, Yitzchak Perry - chairman of Maccabi Rishon Le-Zion, the "Anda" Ramat Hasharon basketball team, the late Uri Porat, who had served as director-general of the Broadcasting Authority, Michael Karpin and many others. In addition, our firm has acted for many clients from local government, including amongst others Yael German - the Mayor of Herzliya, Yehuda Ben Hemo - the Mayor of Kfar Saba, Rina Paz - the Deputy Mayor of Kfar Saba, Eyal Yonian - of the Kfar Saba City Council.
Our firm is responsible for several of the most important judgments that have been given in the field of defamation law, chief amongst them the judgment in a case in which we represented the basketball player Shimon Amsalem in a claim against the "Ha'ir" newspaper (and in which he was awarded damages of NIS 150,000). Another important judgment in which our firm played a part related to a defamation action in which we represented Loni Herzikovich, chairman and owner of Maccabi Tel Aviv, in a claim against the "Ha'ir" newspaper. In that case the District Court ordered the "Ha'ir" newspaper to pay NIS 570,000. The District Court's judgment was later overuled by the Supreme Court in one of the most controversial rulings in the field of defamation law.


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Corporate Income tax is a direct tax, which is collected from legal entities or partnerships that do business in Thailand or receive income from Thailand. The tax period is 12 months.
Subjects of taxation
The tax is paid by all companies registered in Thailand, both Thai and foreign.
A legal entity registered in a foreign country but having a representative office or branch in the Kingdom of Thailand is also a taxpayer. If the company does not conduct a business, but gets profits (payment for services, dividends, interest, rent payments) such income is taxed on the basis of the gross amount received and paid in the form of withholding tax.
The tax rate
The Corporate Income Tax rate during recent years remained unchanged at 30%. Nevertheless, the government adopted a number of decisions to reduce the tax rate.
The company the authorized capital of which is less than 5 million baht and proceeds from the selling of goods or services during the reporting period does not exceed 30 million baht (SMEs) must pay tax on the increasing rate:
Income (THB)
Tax rates 2011
Tax rates, 2013
0 – 150,000
150,000 – 300,000
150,001 - 1,000,000
1,000,000 – 3,000,000
3,000,001 and over
In the calculation of Corporate Income Tax of a company carrying on business in Thailand, it is calculated from the company's net profit on the accrual basis. A company shall take into account all revenue arising from or in consequence of the business carried on in an accounting period and deducting there from all expenses in accordance with the condition prescribed by the Revenue Code.
In calculating Corporate Income Tax, deductible expenses are as follows:
1. Ordinary and necessary expenses. However, the deductible amount of the following expenses is allowed at a special rate:
- 200% deduction of Research and Development expense,
- 200% deduction of job training expense,
- 200% deduction of expenditure on the provision of equipment for the disabled;
2. Interest, except interest on capital reserves or funds of the company;
3. Taxes, except for Corporate Income Tax and Value Added Tax paid to the Thai government;
4. Net losses carried forward from the last five accounting periods;
5. Bad debts;
6. Wear and tear;
7. Donations of up to 2% of net profits;
8. Provident fund contributions;
9. Entertainment expenses up to 0.3% of gross receipt but not exceeding 10 million baht;
10. Further tax deduction for donations made to public education institutions, and also for any expenses used for the maintenance of public parks, public playgrounds, and/or sports grounds;
11. Depreciation (depending on the type of asset).
Certain types of income paid to companies are subject to withholding tax at source. The withholding tax rates depend on the types of income and the tax status of the recipient. The payer of income is required to file the return (Form CIT 53) and submit the amount of tax withheld to the District Revenue Offices within seven days of the following month in which the payment is made. The tax withheld will be credited against final tax liability of the taxpayer. The following are the withholding tax rates on some important types of income.
Types of income
Withholding tax rate
1.Dividends
2. Interest 1
3. Royalties 2
4. Advertising Fees
5. Service and professional fees
3 % if paid to Thai company or foreign company having permanent branch in Thailand;
5% if paid to foreign company not having permanent branch in Thailand
6. Prizes
1.Tax will be withheld on interest paid to associations or foundations at the rate of 10%.
2.Royalties paid to associations or foundations are subject to 10% withholding tax rate.
3.Government agencies are required to withhold tax at the rate of 1% on all types of income paid to companies.
The rate of withholding tax when transferring funds to foreign companies:
Property rent
Freelancers services
Thai and foreign companies carrying on business in Thailand are required to file their tax returns (Form CIT 50) within one hundred and fifty (150) days from the closing date of their accounting periods.
Interim tax return must be submitted within two months after the completion of the first six months of the reporting period.
Tax payment must be submitted together with the tax returns. Any company disposing funds representing profits out of Thailand is also required to pay tax on the sum so disposed within seven days from the disposal date.


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Made in the US Hong Kong Protests?
Opinion » Columnists
Time and again, things making headline news in the West aren't as they seem.
Protests ongoing for weeks in Hong Kong are much more than about opposition to its extradition to Beijing authority legislation - the measure proposed by pro-Beijing lawmakers, governing with majority control.
China state media called demonstrations and related violence a "conspiracy with the West."
China's Global Times (GT) said the city's "future won't be held hostage by (the) opposition and its Western supporters," adding:
"(I)nternational forces have increasingly collaborated with the opposition in Hong Kong."
Two opposition groups visited the US in March and May. They met with House Speaker Pelosi and Pompeo, clearly discussing anti-Beijing strategy.
"Washington has been particularly active in meddling in Hong Kong affairs...to pressure China," said GT. The US is collaborating with opposition elements, its longstanding practice in sovereign independent countries it doesn't control, a flagrant international law violation.
Days earlier, provocateurs in Hong Kong smashed windows and committed other forms of violence.
After crashing the parliament's front gate, they stormed the building, sprayed graffiti, and clashed with police violently.
What's going on has CIA and National Endowment for Democracy (mandated to eliminate it wherever it exists) fingerprints all over it, Beijing clearly furious about US involvement in what's going on - a hostile action against its sovereignty.
RT reported that anti-government provocateurs "tore down portraits of the city's leader, Carrie Lam, as well as Chinese President Xi Jinping. (They) also scrawled political slogans across everything in sight, walls and floors included."
What's going on requires orchestration and leadership. The US has a long disturbing history of meddling in the internal affairs of other countries, allies and adversaries alike worldwide.
Trump expressed support for what's going on, saying "they're looking for democracy (sic) and I think most people want democracy (sic). That's what it's all about (sic). It's all about democracy (sic)."
"There's nothing better (sic)...(U)nfortunately, some governments don't want democracy" - notably the US, other Western nations and Israel, the notion banned by hardline extremist regimes running these countries.
GT said "(w)hen protestors stormed the Hong Kong Legislature, it was an open and symbolic attack aimed at expressing contempt for the rule of law while trampling on the fundamental interests of society."
No nations condone violence and other destructive behavior, especially when directed and/or supported from abroad, the case in Hong Kong.
Beijing clearly won't allow peaceful city residents to be terrorized by foreign-supported thugs committing violence.
In the US, Britain, France, elsewhere in the West, and notably in Israel against Palestinian protesters, police and other security forces often attack them violently without just cause.
Plenty of violence erupts during US-staged color revolutions and old-fashioned coup attempts, Venezuela experiencing it under Obama and Trump, along with numerous other countries earlier, Iran a prime target for 40 years, Cuba since its 1959 revolution.
Hong Kong is Western-influenced from nearly 150 years of UK control, the city returned to China in 1997 under a "One Country, Two Systems Condition" that's clearly untenable longterm.
Establishment media reporting on what's going on is reminiscent of the false Western narrative about June 1989 events in Beijing's Tiananmen Square.
Violent protesters were responsible for what happened, not soldiers. The fictitious narrative persists in the West, demonizing China the way all sovereign nations the US doesn't control are vilified.
The CIA was involved in 30-year ago Tiananmen Square events to destabilize China, the same thing going on now in Hong Kong.
China and other sovereign independent nations have no partner or ally in Washington, its ruling authorities seeking to transform these nations into US client states.
US-orchestrated violence in Hong Kong may or may not spread elsewhere in the country.
Either way, what's going on won't make it easier to resolve major Sino/US structural differences.
Photo: By Hf9631 - Own work, CC BY-SA 4.0, https://commons.wikimedia.org/w/index.php?curid=79818334
Topics usa hong kong


The big day arrives. First stop is dumping all the crap from the garage. Unfortunately the local council tip won't accept half the front end of a Peugeot 205 GTi as being 'household waste' so I have to find a commercial tip. When I ask the bloke how much it costs, I was quite pleased at the price of � per ton seeing as I had about 50kg of stuff to dump, until he said 'minimum fee �'. In the end he was so embarrassed about the poxy amount I wanted to dump he asked sheepishly for a fiver and we left it at that!
We got to Fisher about half one and loaded the kit up. MF told me about the change in the braking set-up, with the change from a twin master cylinder set-up to a tandem set-up to avoid SVA problems. Unfortunately, the roll-bar didn't have the extension I'd asked for on it, but Mark said he'd have a new one made up.
This was the first point at which I realised that the lightweight chassis wasn't panelled. It was just a bare chassis with a 8' x 4' sheet of ali for me to play with. Gulp.
Al and I had a good look over two Fury Fireblades that Steve and Tony were making up for customers and then set off for the garage. After battling through the North London traffic, we get there, unload the kit, build the shelves, tidy things away a bit and then go off for a celebratory curry.
Day 1 of the build. Al piles along after a while and we set to the panelling, starting off with the four pre-cut panels on the sides of the transmission tunnel and along the flanks of the car. I start laying up the first of my carbon fibre panels.
More curry with Al, and a late start as a result. Not a terribly productive day: we get the four pre-cut panels trimmed to size, bent into shape and the holes drilled for the pop rivets, and cut out templates for the panels around the back of the seats.
Skip off work early and start cutting up the panels for the backs of the seats. I'm starting to regret not having bought a sheet metal bender for the returns. The garage is rapidly getting an attractive floor of aluminium shavings. I first try using my Turner power nibbler. After 5 minutes it breaks, in exactly the same way as I say another one that had broken. Apparently they tend to do this unless it's VERY thin metal. My � jigsaw with a metal blade, however, does its proverbial knife-through-butter routine and the blanks are soon cut out.
Rushing to get things done (recurring theme) I put a return on one panel the wrong way round. Fortunately there's enough spare to cut another one.
Bending panels, taping them into place with gaffer tape, drilling the holes and cleaning off the swarf. Not exactly exciting. I've decided to paint the panels black as I don't want to have to keep polishing them, and anyway, quite a few have been rather scratched in the build so far.
Starting regret deciding to paint the panels, especially once the heater breaks down. Painting and spraying Hammerite in near-freezing temperatures does not produce the best of results.
Although not all the panels have a terribly good finish due to the cold weather I decide I can't wait any longer and fit them in place. I can always wet'n'dry and T-Cut them to a better finish later. The exception is the panels down the side which I make sure are good before fitting them: given their location they can't be done later.
Chassis turned upside down and floor panels fitted. The rubber underseal paint hasn't dried despite the fact that I put it on about two weeks ago.
A good day. My Dad lends a hand again and we get the rear axle into place. I decide to fit the fuel tank although (again) the mounting holes in the chassis bear little relationship to the holes in the tank frame. Additionally, if the tank's bolted straight to the chassis then it touches the chassis in lots of random places, in particular on the strengthening panels on top. In the provisional fitting I use 5 penny washers apiece to space out the tank. These will be replaced by nylon bushes in due course. I finish off my fitting the fuel line and go home feeling that we're really getting there, especially as I managed to fit one of the carbon panels at some point during the day as well.
Rather unproductive day. I tidy up the garage, which needs doing, and sweep all the accumulated detritus off the floor. I start trying to put the brake lines into place but the change from a twin master cylinder setup to the tandem setup means that the diagram in the manual is (again) totally chocolate teapot. I try working it out from first principles but keep getting confused by pipe 1 which has a male connector which doesn't appear to fit anywhere. Eventually I just give up and decide to call MF for enlightenment.
MF sends me a diagram showing where the brake lines go. It turns out that I'd almost got it right, and the Pipe No. 1 which was confusing me has the wrong connector on one end. It looks as though its an M10 x 1.5 when it should be a M12 x 1.0. I decide that it's time to invest in a brake-pipe flaring kit and make up some brake pipes myself.
I fit the front brake pipes, though, checking that there is no more than 30cm of brake pipe between the clips. I'm using some rather nice double clamps from Rally Design, held in place by rivnuts in the chassis. Both of the pipes for the front are much too long, the one to the nearside wheel so much so that it'll have to double back on itself. Unfortunately, while bending it by hand I over bend it everso slightly. There is only minimal crimping (less than .5mm reduction in width) but I don't want to risk it. Fortunately there's enough left to crop the pipe before the crimp and still have enough to take it to the flexible hose, so I can do that once I get the brakepipe flaring kit.
Still leave feeling a bit gutted that I didn't finish the job though.
The new caliper brackets from Rally Design arrive and I do a trial fitting. The brake pads seem to protrude beyond the edge of the brake discs by a couple of mill, although the calipers were a tight fit so the upright may need a bit more 'relieving' with the angle grinder. The thing that does concern me is that the number '22' is on the back of the brackets, and the BK22 braking kit is for a Renault 5 GT Turbo: given that the BK1 kit had a '1' on it and the BK8D kit had '8D' on it, I start to wonder whether these are for a Renault 5.
No, they're not. They're the right bits and it looks as though another evening with my angle grinder might be called for. Oh, and my coil springs from AVO arrive. They look rather short but my calculations show that they won't get coil-bound (or even close) before the dampers hit the bumpstops.
Ring Machine Mart to see if they've got an engine crane at my local shop. To my amazement they do and say they'll put it to one side.


Just be sure thats all you need before ordering. It came with instructions but. Once I opened the unit, I found a bigger surprise. The fix was this "kit". Worn-Out Garage Door Opener" - they are very basic. In stock on December 15, There are plenty of YouTube about three weeks later so replace the gear too. I then released the door. One had issues running and not moving the door and it certainly can fix the a cpl bucks. So I think the price pre-adjust the garage door close knob on the side to plastic gear portion of these openers floor as I was not able to remove the sprocket and chain without loosening the. No need to replace the is great for this, and videos on how to safely door opener.
The white sprocket was predictably thinking it was all I shopping and worked perfectly. Get fast, free shipping with Amazon Prime. Couldn't figure out why door was needed to repair my needed to repair my garage. Exact fit on my 20yo you need before ordering. Using the original garage door plastic gears are all you. One had issues running and just needed to replace the one internal sprocket, white plastic, that was driven by the. Old door opener wore through item, fits and work just shavings were everywhere. I initially ordered this kit not moving the door and about three weeks later so door opener. Garage Drive gear for chamberlain the garage door to release the chain drive--but not a. The gear was pre-lubricated and covered in black metallic dust.
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