Almost every smartphone uses a processor based on the ARM1 chip created in 1985. The Visual ARM1 simulator shows what happens inside the ARM1 chip as it runs; the result (below) is fascinating but mysterious. In this article, I reverse engineer key parts of the chip and explain how they work, bridging the gap between the puzzling flashing lines in the simulator and what the chip is actually doing. I describethe overall structure of the chip and then descend to the individual transistors, showing how they are built out of silicon and work together to store and process data. After reading this article, you can look at the chip's circuits and understand the data they store.
Screenshot of the Visual ARM1 simulator, showing the activity inside the ARM1 chip as it executes a program.
The diagram below shows the most important functional blocks of the ARM chip. The actual processing happens in the bottom half of the chip, which implements the data path. The chip operates on 32 bits at a time so it is structured as 32 horizontal layers: bit 31 at the top, down to bit 0 at the bottom. Several data buses run horizontally to connect different sections of the chip. The large register file, with 25 registers, stands out in the image. The Program Counter (register 15) is on the left of the register file and register 0 is on the right.
The main components of the ARM1 chip. Most of the pins are used for address and data lines; unlabeled pins are various control signals.
Computation takes place in the ALU (arithmetic-logic unit), which is to the right of the registers. The ALU performs 16 different operations (add, add with carry, subtract, logical AND, logical OR, etc.) It takes two 32-bit inputs and produces a 32-bit output. The ALU is described in detail here. To the right of the ALU is the 32-bit barrel shifter. This large component performs a binary shift or rotate operation on its input, and is described in more detail below. At the left is the address circuitry which provides an address to memory through the address pins. At the right data circuitry reads and writes data values to memory.
Above the datapath circuitry is the control circuitry. The control lines run vertically from the control section to the data path circuits below. These signals select registers, tell the ALU what operation to perform, and so forth. The instruction decode circuitry processes each instruction and generates the necessary control signals. The register decode block processes the register select bits in an instruction and generates the control signals to select the desired registers.
The squares around the outside of the image above are the pads that connect the processor to the outside world. The photo below shows the 84-pin package for the ARM1 processor chip. The gold-plated pins are wired to the pads on the silicon chip inside the package.
The ARM1 processor chip installed in the Acorn ARM Evaluation System. Full photo by Flibble, CC BY-SA 3.0.
Most of the pads are used for the address and data lines to memory. The chip has 26 address lines, allowing it to access 64MB of memory, and has 32 data lines, allowing it to read or write 32 bits at a time. The address lines are in the lower left and the data lines are in the lower right. As the simulator runs, you can see the address pins step through memory and the data pins read data from memory. The right hand side of the simulator shows the address and data values in hex, e.g. "A:00000020 D:e1a00271". If you know hex, you can easily match these values to the pin states.
Each corner of the chip has a power pin (+) and a ground pin (-), providing 5 volts to run the chip. Various control signals are at the top of the chip. In the simulator, it is easy to spot the the two clock signals that step the chip through its operations (below). The phase 1 and phase 2 clocks alternate, providing a tick-tock rhythm to the chip. In the simulator, the clock runs at a couple cycles per second, while the real chip has a 8MHz clock, more than a million times faster. Finally, note below the manufacturer's name "ACORN" on the chip in place of pin 82.
The two clock signals for the ARM1 processor chip.
The ARM1 was designed in 1985 by engineers Sophie Wilson (formerly Roger Wilson) and Steve Furber of Acorn Computers. The chip was originally named the Acorn RISC Machine and intended as a coprocessor for the BBC Micro home/educational computer to improve its performance. Only a few hundred ARM1 processors were fabricated, so you might expect ARM to be a forgotten microprocessor, a historical footnote of the 1980s. However, the original ARM1 chip led to the amazingly successful ARM architecture with more than 50 billion ARM chips produced. What happened?
In the early 1980s, academic research suggested that instead of making processor instruction sets more complex, designers would get better performance from a processor that was simple but fast: the Reduced Instruction Set Computer or RISC. The Berkeley and Stanford research papers on RISC inspired the ARM designers to choose a RISC design. In addition, given the small size of the design team at Acorn, a simple RISC chip was a practical choice.
Die photos of the ARM1 processor and the Intel 386 processor to the same scale. The ARM1 is much smaller and contained 25,000 transistors compared to 275,000 in the 386. The 386 was higher density, with a 1.5 micron process compared to 3 micron for the ARM1. ARM1 photo courtesy of Computer History Museum. Intel A80386DX-20 by Pdesousa359, CC BY-SA 3.0.
Because of the ARM1's small transistor count, the chip used very little power: about 1/10 Watt, compared to nearly 2 Watts for the 386. The combination of high performance and low power consumption made later versions of ARM chip very popular for embedded systems. Apple chose the ARM processor for its ill-fated Newton handheld system and in 1990, Acorn Computers, Apple, and chip manufacturer VLSI Technology formed the company Advanced RISC Machines to continue ARM development.
In the years since then, ARM has become the world's most-used instruction set with more than 50 billion ARM processors manufactured. The majority of mobile devices use an ARM processor; for instance, the Apple A8 processor inside iPhone 6 uses the 64-bit ARMv8-A. Despite its humble beginnings, the ARM1 made IEEE Spectrum's list of 25 microchips that shook the world and PC World's 11 most influential microprocessors of all time.
Getting back to the chip itself, the ARM1 chip is constructed from five layers. If you zoom in on the chip in the simulator, you can see the components of the chip, built from these layers. As seen below, the simulator uses a different color for each layer, and highlights circuits that are turned on. The bottom layer is the silicon that makes up the transistors of the chip. During manufacturing, regions of the silicon are modified (doped) by applying different impurities. Silicon can be doped positive to form a PMOS transistor (blue) or doped negative for an NMOS transistor (red). Undoped silicon is basically an insulator (black).
The ARM1 simulator uses different colors to represent the different layers of the chip.
Polysilicon wires (green) are deposited on top of the silicon. When polysilicon crosses doped silicon, it forms the gate of a transistor (yellow). Finally, two layers of metal (gray) are on top of the polysilicon and provide wiring. Black squares are contacts that form connections between the different layers.
For our purposes, a MOS transistor can be thought of as a switch, controlled by the gate. When it is on (closed), the source and drain silicon regions are connected. When it is off (open), the source and drain are disconnected. The diagram below shows the three-dimensional structure of a MOS transistor.
Structure of a MOS transistor.
Like most modern processors, the ARM1 was built using CMOS technology, which uses two types of transistors: NMOS and PMOS. NMOS transistors turn on when the gate is high, and pull their output towards ground. PMOS transistors turn on when the gate is low, and pull their output towards +5 volts.
The register file is a key component of the ARM1, storing information inside the chip. (As a RISC chip, the ARM1 makes heavy use of its registers.) The register file consists of 25 registers, each holding 32 bits. This section describes step-by-step how the register file is built out of individual transistors.
The diagram below shows two transistors forming an inverter. If the input is high (as below), the NMOS transistor (red) turns on, connecting ground to the output so the output is low. If the input is low, the PMOS transistor (blue) turns on, connecting power to the output so the output is high. Thus, the output is the opposite of the input, making an inverter.
An inverter in the ARM1 chip, as displayed by the simulator.
Combining two inverters into a loop forms a simple storage circuit. If the first inverter outputs 1, the second inverter outputs 0, causing the first inverter to output 1, and the circuit is stable. Likewise, if the first inverter outputs 0, the second outputs 1, and the circuit is again stable. Thus, the circuit will remain in either state indefinitely, "remembering" one bit until forced into a different state.
Two inverters in the ARM1 chip form one bit of register storage.
To make this circuit into a useful register cell, read and write bus lines are added, along with select lines to connect the cell to the bus lines. When the write select line is activated, the pass connector connects the write bus to the inverter, allowing a new value to be overwrite the current bit. Likewise, pass transistors connect the bit to a read bus when activated by the corresponding select line, allowing the stored value to be read out.
Schematic of one bit in the ARM1 processor's register file.
To create the register file, the register cell above is repeated 32 times vertically for each bit, and 25 times horizontally to form each register. Each bit has three horizontal bus lines — the write bus and the two read buses — so there are 32 triples of bus lines. Each register has three vertical control lines — the write select line and two read select lines — so there are 25 triples of control lines. By activating the desired control lines, two registers can be read and one register can be written at a time. When the simulator is running, you can see the vertical control lines activated to select registers, and you can see the data bits flowing on the horizontal bus lines.
By looking at a memory cell in the simulator, you can see which inverter is on and determine if the bit is a 0 or a 1. The diagram below shows a few register bits. If the upper inverter input is active, the bit is 0; if the lower inverter input is active, the bit is 1. (Look at the green lines above or below the bit values.) Thus, you can read register values right out of the simulator if you look closely.
By looking at the ARM1 register file, you can determine the value of each bit. For a 0 bit, the input to the top inverter is active (green/yellow); for a 1 bit, the input to the bottom inverter is active.
The barrel shifter, which performs binary shifts, is another interesting component of the ARM1. Most instructions use the barrel shifter, allowing a binary argument to be shifted left, shifted right, or rotated by any amount (0 to 31 bits). While running the simulator, you can see diagonal lines jumping back and forth in the barrel shifter.
The diagram below shows the structure of the barrel shifter. Bits flows into the shifter vertically with bit 0 on the left and bit 31 on the right. Output bits leave the shifter horizontally with bit 0 on the bottom and bit 31 on top. The diagonal lines visible in the barrel shifter show where the vertical lines are connected to the horizontal lines, generating a shifted output. Different positions of the diagonals result in different shifts. The upper diagonal line shifts bits to the left, and the lower diagonal line shifts bits to the right. For a rotation, both diagonals are active; it may not be immediately obvious but in a rotation part of the word is shifted left and part is shifted right.
Structure of the barrel shifter in the ARM1 chip.
Zooming in on the barrel shifter shows exactly how it works. It contains a 32 by 32 crossbar grid of transistors, each connecting one vertical line to one horizontal line. The transistor gates are connected by diagonal control lines; transistors along the active diagonal connect the appropriate vertical and horizontal lines. Thus, by activating the appropriate diagonals, the output lines are connected to the input lines, shifted by the desired amounts. Since the chip's input lines all run horizontally, there are 32 connections between input lines and the corresponding vertical bit lines.
Details of the barrel shifter in the ARM1 chip. Transistors along a specific diagonal are activated to connect the vertical bit lines and output lines. Each input line is connected to a vertical bit line through the indicated connections.
Inside the loop, register r1 (0x000f) is rotated to the right by r2 bit positions and the result is stored in register r0. Then r2 is incremented and the shift result written to memory. As the simulator runs, watch as r2 is incremented and as r0 goes through the various values of 4 bits rotated. The A and D values show the address and data pins as instructions are read from memory.
The changing shift values are clearly visible in the barrel shifter, as the diagonal line shifts position. If you zoom in on the register file, you can read out the values of the registers, as described earlier.
The ARM1 processor led to the amazingly successful ARM processor architecture that powers your smart phone. The simple RISC architecture of the ARM1 makes the circuitry of the processor easy to understand, at least compared to a chip such as the 386. The ARM1 simulator provides a fascinating look at what happens inside a processor, and hopefully this article has helped explain what you see in the simulator.
 I should make it clear that I am not part of the Visual 6502 team that built the ARM1 simulator. More information on the simulator is in the Visual 6502 team's blog post The Visual ARM1.
 The block diagram below shows the components of the chip in more detail. See the ARM Evaluation System manual for an explanation of each part.
 You may have noticed that the ARM architecture describes 16 registers, but the chip has 25 physical registers. There are 9 "extra" registers because there are extra copies of some registers for use while handling interrupts.
Another interesting thing about the register file is the PC register is missing a few bits. Since the ARM1 uses 26-bit addresses, the top 6 bits are not used. Because all instructions are aligned on a 32-bit boundary, the bottom two address bits in the PC are always zero. These 8 bits are not only unused, they are omitted from the chip entirely.
 The ALU doesn't support multiplication (added in ARM 2) or division (added in ARMv7).
 A bit more detail on the decode circuitry. Instruction decoding is done through three separate PLAs. The ALU decode PLA generates control signals for the ALU based on the four operation bits in the instruction. The shift decode PLA generates control signals for the barrel shifter. The instruction decode PLA performs the overall decoding of the instruction. The register decode block consists of three layers. Each layer takes a 4-bit register id and activates the corresponding register. There are three layers because ARM operations use two registers for inputs and a third register for output.
 In a RISC computer, the instruction set is restricted to the most-used instructions, which are optimized for high performance and can typically execute in a single clock cycle. Instructions are a fixed size, simplifying the instruction decoding logic. A RISC processor requires much less circuitry for control and instruction decoding, leaving more space on the chip for registers. Most instructions operate on registers, and only load and store instructions access memory. For more information on RISC vs CISC, see RISC architecture.
 For details on the history of the ARM1, see Conversation with Steve Furber: The designer of the ARM chip shares lessons on energy-efficient computing.
See the Intel 80386 Programmer's Reference Manual and 80386 Hardware Reference Manual for more details on the 386 architecture.
 Interestingly the ARM company doesn't manufacture chips. Instead, the ARM intellectual property is licensed to hundreds of different companies that build chips that use the ARM architecture. See The ARM Diaries: How ARM's business model works for information on how ARM makes money from licensing the chip to other companies.
 The first metal layer in the chip runs largely top-to-bottom, while the second metal layer runs predominantly horizontally. Having two layers of metal makes the layout much simpler than single-layer processors such as the 6502 or Z-80.
 In the register file, alternating bits are mirrored to simplify the layout. This allows neighboring bits to share power and ground lines. The ARM1's register file is triple-ported, so two register can be read and one register written at the same time. This is in contrast to chips such as the 6502 or Z-80, which can only access registers one at a time.
 For more information on the ARM1 internals, the book VLSI Risc Architecture and Organization by ARM chip designer Steven Furber has a hundred pages of information on the ARM chip internals. An interesting slide deck is A Brief History of ARM by Lee Smith, ARM Fellow.
Interesting read - as always.
I'm curious about the clocking scheme. Apparently two-phase clocks are common in ICs from this era. What's the reason for this though? The first thing that came to my mind was to overcome pad speed limitations, although this could be solved by a XOR combining both phi1 and 2 signals inside the chip - which is not the case here.
Sven: two-phase clocks are used internally because the circuits are level-triggered, not edge-triggered. So you need one clock phase to let data flow from A to B, and then another to let data flow from B to A. (Hopefully that makes sense.) The timing of the phases is tricky - they can't overlap or else you get a cycle. Some chips (e..g. 6502) generate the two phases internally, but others take the easy way of using two clock pins and having the clock logic externally.
Also, thanks for mentioning the broken link - apparently bitsavers doesn't support https.
I just wanted to thank you for all the articles you write. I make my living on the software side of things (web development), but coming of age in the 80s, I always had an interest in how the hardware works -- practically a necessity in the 8-bit computing world (I cut my teeth on a Radio Shack Color Computer). I can still remember how there were these mysterious PEEK and POKE commands, and for the longest time, I wondered how/why they worked, and how people figured out what values to poke into which addresses. Then I started learning assembly language. disassembling ROMs, and learning more about the hardware beyond the CPU. And one day, I guess I saw an extended memory map of the computer, and how some of the addresses corresponded to hardware functions, and things finally *snapped* into place. I started college as a EE, but quickly changed to CompSci. But I've always kept an interest in what's going on in the hardware underneath, even down to the silicon. So all of the time you spend on your tear-downs and explanations is greatly appreciated -- I always finish up knowing a little bit more than I did before!
>> "Since the ARM uses 26-bit addresses"
Perhaps it would be better stated as "Since early ARM processors used 26-bit addresses".
It might be helpful to readers to note that ARM processors moved to full 32-bit addressing in around 1991 with the release of ARM6, ARM600, ARM610 (The Apple Newton was released with an ARM610 with full 32-bit addressing in 1993).
ARM has also released a 64-bit architecture named AArch64 as part of the ARMv8-A architecture, with the first volume shipments being in the Apple iPhone 5S released in 2013.
I like to think that the design was a judicious mix of custom and standard cell layout.
If a chip looks good it probably is good.
Very interesting, but I really wonder how it's possible to write this article without even stating Acorn successfully used its ARM processors in the Archimedes (the world fastest computer under €1500 at the time) and RISC PC range, and also manufactured the A4 laptop.
You name the U.S. Apple Newton, though. Strange.
Is it possible to get the markings from under the sticker on the chip?
RISC systems are very much alive and active. ALl of the IBM POWER (Performance Optimized With enhanced RISC) servers running AIX and Linux (including WATSON which won "Jeopardy!"), the PowerPC (made by Apple, IBM, and Motorola and used in the Apple PowerBooks and PowerMacs), the IBM RISC processor in the Mars Pathfinder spacecraft (the first on Mars!), and the Xbox 360 processor made by IBM are just a few of the large scale that RISC processors have in the home, business, and scientific computing world.
If you want to buy a piece of history!


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text:
#pragma once
#include <aws/sagemaker/SageMaker_EXPORTS.h>
#include <aws/sagemaker/SageMakerRequest.h>
#include <aws/core/utils/memory/stl/AWSString.h>
#include <aws/core/utils/DateTime.h>
#include <aws/sagemaker/model/SortPipelineExecutionsBy.h>
#include <aws/sagemaker/model/SortOrder.h>
#include <utility>

namespace Aws
{
namespace SageMaker
{
namespace Model
{

  /**
   */
  class AWS_SAGEMAKER_API ListPipelineExecutionsRequest : public SageMakerRequest
  {
  public:
    ListPipelineExecutionsRequest();

    // Service request name is the Operation name which will send this request out,
    // each operation should has unique request name, so that we can get operation's name from this request.
    // Note: this is not true for response, multiple operations may have the same response name,
    // so we can not get operation's name from response.
    inline virtual const char* GetServiceRequestName() const override { return "ListPipelineExecutions"; }

    Aws::String SerializePayload() const override;

    Aws::Http::HeaderValueCollection GetRequestSpecificHeaders() const override;

    /**
     *
The name of the pipeline.

     */
    inline const Aws::String& GetPipelineName() const{ return m_pipelineName; }

    /**
     *
The name of the pipeline.

     */
    inline bool PipelineNameHasBeenSet() const { return m_pipelineNameHasBeenSet; }

    /**
     *
The name of the pipeline.

     */
    inline void SetPipelineName(const Aws::String& value) { m_pipelineNameHasBeenSet = true; m_pipelineName = value; }

    /**
     *
The name of the pipeline.

     */
    inline void SetPipelineName(Aws::String&& value) { m_pipelineNameHasBeenSet = true; m_pipelineName = std::move(value); }

    /**
     *
The name of the pipeline.

     */
    inline void SetPipelineName(const char* value) { m_pipelineNameHasBeenSet = true; m_pipelineName.assign(value); }

    /**
     *
The name of the pipeline.

     */
    inline ListPipelineExecutionsRequest& WithPipelineName(const Aws::String& value) { SetPipelineName(value); return *this;}

    /**
     *
The name of the pipeline.

     */
    inline ListPipelineExecutionsRequest& WithPipelineName(Aws::String&& value) { SetPipelineName(std::move(value)); return *this;}

    /**
     *
The name of the pipeline.

     */
    inline ListPipelineExecutionsRequest& WithPipelineName(const char* value) { SetPipelineName(value); return *this;}

    /**
     *
A filter that returns the pipeline executions that were created after a
     * specified time.

     */
    inline const Aws::Utils::DateTime& GetCreatedAfter() const{ return m_createdAfter; }

    /**
     *
A filter that returns the pipeline executions that were created after a
     * specified time.

     */
    inline bool CreatedAfterHasBeenSet() const { return m_createdAfterHasBeenSet; }

    /**
     *
A filter that returns the pipeline executions that were created after a
     * specified time.

     */
    inline void SetCreatedAfter(const Aws::Utils::DateTime& value) { m_createdAfterHasBeenSet = true; m_createdAfter = value; }

    /**
     *
A filter that returns the pipeline executions that were created after a
     * specified time.

     */
    inline void SetCreatedAfter(Aws::Utils::DateTime&& value) { m_createdAfterHasBeenSet = true; m_createdAfter = std::move(value); }

    /**
     *
A filter that returns the pipeline executions that were created after a
     * specified time.

     */
    inline ListPipelineExecutionsRequest& WithCreatedAfter(const Aws::Utils::DateTime& value) { SetCreatedAfter(value); return *this;}

    /**
     *
A filter that returns the pipeline executions that were created after a
     * specified time.

     */
    inline ListPipelineExecutionsRequest& WithCreatedAfter(Aws::Utils::DateTime&& value) { SetCreatedAfter(std::move(value)); return *this;}

    /**
     *
A filter that returns the pipeline executions that were created before a
     * specified time.

     */
    inline const Aws::Utils::DateTime& GetCreatedBefore() const{ return m_createdBefore; }

    /**
     *
A filter that returns the pipeline executions that were created before a
     * specified time.

     */
    inline bool CreatedBeforeHasBeenSet() const { return m_createdBeforeHasBeenSet; }

    /**
     *
A filter that returns the pipeline executions that were created before a
     * specified time.

     */
    inline void SetCreatedBefore(const Aws::Utils::DateTime& value) { m_createdBeforeHasBeenSet = true; m_createdBefore = value; }

    /**
     *
A filter that returns the pipeline executions that were created before a
     * specified time.

     */
    inline void SetCreatedBefore(Aws::Utils::DateTime&& value) { m_createdBeforeHasBeenSet = true; m_createdBefore = std::move(value); }

    /**
     *
A filter that returns the pipeline executions that were created before a
     * specified time.

     */
    inline ListPipelineExecutionsRequest& WithCreatedBefore(const Aws::Utils::DateTime& value) { SetCreatedBefore(value); return *this;}

    /**
     *
A filter that returns the pipeline executions that were created before a
     * specified time.

     */
    inline ListPipelineExecutionsRequest& WithCreatedBefore(Aws::Utils::DateTime&& value) { SetCreatedBefore(std::move(value)); return *this;}

    /**
     *
The field by which to sort results. The default is
     * CreatedTime.

     */
    inline const SortPipelineExecutionsBy& GetSortBy() const{ return m_sortBy; }

    /**
     *
The field by which to sort results. The default is
     * CreatedTime.

     */
    inline bool SortByHasBeenSet() const { return m_sortByHasBeenSet; }

    /**
     *
The field by which to sort results. The default is
     * CreatedTime.

     */
    inline void SetSortBy(const SortPipelineExecutionsBy& value) { m_sortByHasBeenSet = true; m_sortBy = value; }

    /**
     *
The field by which to sort results. The default is
     * CreatedTime.

     */
    inline void SetSortBy(SortPipelineExecutionsBy&& value) { m_sortByHasBeenSet = true; m_sortBy = std::move(value); }

    /**
     *
The field by which to sort results. The default is
     * CreatedTime.

     */
    inline ListPipelineExecutionsRequest& WithSortBy(const SortPipelineExecutionsBy& value) { SetSortBy(value); return *this;}

    /**
     *
The field by which to sort results. The default is
     * CreatedTime.

     */
    inline ListPipelineExecutionsRequest& WithSortBy(SortPipelineExecutionsBy&& value) { SetSortBy(std::move(value)); return *this;}

    /**
     *
The sort order for results.

     */
    inline const SortOrder& GetSortOrder() const{ return m_sortOrder; }

    /**
     *
The sort order for results.

     */
    inline bool SortOrderHasBeenSet() const { return m_sortOrderHasBeenSet; }

    /**
     *
The sort order for results.

     */
    inline void SetSortOrder(const SortOrder& value) { m_sortOrderHasBeenSet = true; m_sortOrder = value; }

    /**
     *
The sort order for results.

     */
    inline void SetSortOrder(SortOrder&& value) { m_sortOrderHasBeenSet = true; m_sortOrder = std::move(value); }

    /**
     *
The sort order for results.

     */
    inline ListPipelineExecutionsRequest& WithSortOrder(const SortOrder& value) { SetSortOrder(value); return *this;}

    /**
     *
The sort order for results.

     */
    inline ListPipelineExecutionsRequest& WithSortOrder(SortOrder&& value) { SetSortOrder(std::move(value)); return *this;}

    /**
     *
If the result of the previous ListPipelineExecutions request was
     * truncated, the response includes a NextToken. To retrieve the next
     * set of pipeline executions, use the token in the next request.

     */
    inline const Aws::String& GetNextToken() const{ return m_nextToken; }

    /**
     *
If the result of the previous ListPipelineExecutions request was
     * truncated, the response includes a NextToken. To retrieve the next
     * set of pipeline executions, use the token in the next request.

     */
    inline bool NextTokenHasBeenSet() const { return m_nextTokenHasBeenSet; }

    /**
     *
If the result of the previous ListPipelineExecutions request was
     * truncated, the response includes a NextToken. To retrieve the next
     * set of pipeline executions, use the token in the next request.

     */
    inline void SetNextToken(const Aws::String& value) { m_nextTokenHasBeenSet = true; m_nextToken = value; }

    /**
     *
If the result of the previous ListPipelineExecutions request was
     * truncated, the response includes a NextToken. To retrieve the next
     * set of pipeline executions, use the token in the next request.

     */
    inline void SetNextToken(Aws::String&& value) { m_nextTokenHasBeenSet = true; m_nextToken = std::move(value); }

    /**
     *
If the result of the previous ListPipelineExecutions request was
     * truncated, the response includes a NextToken. To retrieve the next
     * set of pipeline executions, use the token in the next request.

     */
    inline void SetNextToken(const char* value) { m_nextTokenHasBeenSet = true; m_nextToken.assign(value); }

    /**
     *
If the result of the previous ListPipelineExecutions request was
     * truncated, the response includes a NextToken. To retrieve the next
     * set of pipeline executions, use the token in the next request.

     */
    inline ListPipelineExecutionsRequest& WithNextToken(const Aws::String& value) { SetNextToken(value); return *this;}

    /**
     *
If the result of the previous ListPipelineExecutions request was
     * truncated, the response includes a NextToken. To retrieve the next
     * set of pipeline executions, use the token in the next request.

     */
    inline ListPipelineExecutionsRequest& WithNextToken(Aws::String&& value) { SetNextToken(std::move(value)); return *this;}

    /**
     *
If the result of the previous ListPipelineExecutions request was
     * truncated, the response includes a NextToken. To retrieve the next
     * set of pipeline executions, use the token in the next request.

     */
    inline ListPipelineExecutionsRequest& WithNextToken(const char* value) { SetNextToken(value); return *this;}

    /**
     *
The maximum number of pipeline executions to return in the response.

     */
    inline int GetMaxResults() const{ return m_maxResults; }

    /**
     *
The maximum number of pipeline executions to return in the response.

     */
    inline bool MaxResultsHasBeenSet() const { return m_maxResultsHasBeenSet; }

    /**
     *
The maximum number of pipeline executions to return in the response.

     */
    inline void SetMaxResults(int value) { m_maxResultsHasBeenSet = true; m_maxResults = value; }

    /**
     *
The maximum number of pipeline executions to return in the response.

     */
    inline ListPipelineExecutionsRequest& WithMaxResults(int value) { SetMaxResults(value); return *this;}

  private:

    Aws::String m_pipelineName;
    bool m_pipelineNameHasBeenSet = false;

    Aws::Utils::DateTime m_createdAfter;
    bool m_createdAfterHasBeenSet = false;

    Aws::Utils::DateTime m_createdBefore;
    bool m_createdBeforeHasBeenSet = false;

    SortPipelineExecutionsBy m_sortBy;
    bool m_sortByHasBeenSet = false;

    SortOrder m_sortOrder;
    bool m_sortOrderHasBeenSet = false;

    Aws::String m_nextToken;
    bool m_nextTokenHasBeenSet = false;

    int m_maxResults;
    bool m_maxResultsHasBeenSet = false;
  };

} // namespace Model
} // namespace SageMaker
} // namespace Aws

redpajama_set_name: RedPajamaGithub


The most successful and robust fundraising programs are ones that: 1) create an engaging experience through multiple channels and 2) build a relationship with donors both online and offline.
With many direct mail donors turning to online channels that offer fast and secure payment processors, direct mail is considered one of the largest drivers for online donations. Most studies show that one of the top five reasons a donor gives an online gift is because they are prompted by a direct mail appeal. We have also found that donors who receive communications across multiple touch-points respond with more gifts throughout the year and contribute more revenue overall than donors who only receive siloed communications.
Let's take a look at how to most effectively engage your donors with multichannel, consistent messaging.
In order to effectively engage your donors and pool of prospects, it is necessary to integrate these channels with consistent messaging. Today, fundraisers need to always work on improving the donation interface online, methods for collecting email addresses, and strategies to integrate messaging alongside a robust and thoughtful direct mail program.
The direct mail and digital departments need to work side-by-side to develop annual strategies that integrate the direct mail theme, style, design, and messaging with a corresponding email to a list of donors with email addresses.
For example, a direct mail appeal launches in August with a matching gift theme. A corresponding email should be sent to direct mail donors so it hits inboxes around the same time the direct mail hits mailboxes.
Most campaigns would also incorporate website components, such as tailored donation forms, landing pages, and website lightboxes, social media organic posts and paid ads, and displayed ads retargeting your audience. This allows for consistent branding and messaging across all platforms, emphasizing your mission and campaign goal.
In addition, you should always integrate the online fundraising messaging with internal marketing campaigns. Your audience may not notice the difference between a fundraising appeal, cultivation email, or marketing email — all they see is the your brand name in their inbox — so it's important to work closely with internal teams to keep designs, copywriting style, and stories consistent.
History: Inner-City has partnered with FNY for over 8 years, integrating and enhancing their fundraising programs across mail and online. We have identified campaigns that perform well in each channel to integrate communications, convert new donors, upgrade current donors, grow their monthly donor program, and engage their online audiences.
Campaign Samples: In February, we mailed a certificate of appreciation to thank donors. We also wanted to cultivate donors online and thank online-only donors who didn't receive the mail. We brainstormed unique online premiums that will encourage engagement, such as desktop wallpapers, quizzes, etc.
We designed shareable social media graphics that were then embedded on a landing page with a donation form. The email drove donors to the site where they could share their support of Inner-City on social channels, and include a gift if they'd like.
Following Up: At year-end, we also integrated emails with the mail messaging and drove further engagement and re-marketing with paid advertising on Facebook, Twitter, Google, and other channels like Pandora and the New York Times. We often test different creative, messaging, and audiences to drive the best results with the end goals of conversions, email acquisition, and social engagement.
September 15-18 in Chicago, IL.
Founder and president of Faircom New York. She provides strategic guidance for every client—based on decades of experience in the fundraising industry. Her successes have led to her being recognized as the sixth best fundraising consultant in the US. Beginning with the establishment of Doctors Without Borders' US fundraising program, her expertise in supporting overseas organizations entering the US market has made her a highly sought after authority in the fundraising world. Corinne has been the keynote speaker at many fundraising conferences, including the King Baudouin Foundation Conference in New York, the Swiss Fundraiser's Conference in Geneva, and the Association of Fundraising Professionals in Paris.


text:
Hockey team back on form
In a season that has been marred all too often by frustration and set backs Glasgow University hockey managed to haul their campaign back on track with an emphatic victory over a beleaguered Ayr side at the Garscube.
Glasgow's intensity however soon paid off. They were awarded a short corner and after some intelligent interplay between Euan Miller and Finlay Horn, the captain was on hand to lash in past the helpless keeper.
Ayr offered little in the way of attacking strength, and were guilty of far too regularly turning to the optimistic long ball as they attempted to penetrate the resolute University defence. The Glasgow back four were largely spectators throughout the match, as any potential danger was invariably mopped up by the experienced centre half pairing of Craig Sinclair and Alastair Claxon.
One moment of defensive sloppiness almost cost Glasgow dearly — An overly ambitious pass saw Ayr able to burst into the box yet the ever alert Louis Alwood was able to save smartly at the feet of the attacker whilst the resulting ricochet was narrowly slashed wide.
Glasgow had perhaps been guilty of merely going through the motions, yet this scare soon saw a significant increase in the university intensity. Captain Finlay Horn, at the heart of midfield, began to orchestrate proceedings. A clever through ball saw Rory McCann unleashed through the middle, and although the Northern Irishman was able to round the goalkeeper his effort was desperately cleared off the line by a scrambling Ayr defence.
The visitors reprieve however was to be short lived. Another well worked short corner saw Horn thread the ball through to McCann, and the striker was on hand to delicately poke it under the quickly advancing goalkeeper.
McCann began to cause havoc at the heart of the Ayr defence, and was unlucky on several occasions not to double his tally. At times the ball seemed glued to his stick, and time after time he was able to effortlessly tear through the mesmerised opposition back line.
Glasgow's third and decisive goal came again from a set piece, and again it was the captain's ingenuity around the edge of the box which saw him again able to fire home. A series of clever passes around the box confounded a sprawling Ayr defence, and a slip pass from McCann saw Horn free in the 'D' able to smash home from five yards.
Glasgow continued to press and probe at a dispirited Ayr side, and perhaps the only concern will be that they were not able boost their goal difference on a day when there was a notable gulf in class. Yet the University team were forced to settle for three, and will be desperate to see that they continue this momentum into the business end of the season.
Speaking afterwards Horn seemed pleased with the performance "I'm obviously delighted with the victory, it's been a frustrating season, and that victory has really been a very long time in coming."
He went on to speak about how the Glasgow University team are fast becoming regarded as set piece specialists:
"We've been practising a lot of short corners recently, so it's great to see the effort put in by the lads on the training ground pay off so well.We have this team again in the cup,so we feel we have a great chance of progress"

redpajama_set_name: RedPajamaCommonCrawl


text:
layout: post
title: Yoomee.com
date: '2014-03-14T16:31:00+00:00'
body-class: 'blog'
tags:
- ux
- yoomee
- web
- work
img: yoomee-site.jpg
---

One of the frustrations of having so much work on at the moment is that we have little time to update our site. The other week we had a small window in between projects and managed to push a few changes. More to come!

Visit yoomee.com

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text:
HomeNewsSports NewsVikings' Patrick Peterson clarifies comments that Cardinals' Kyler Murray only cares about...
Vikings' Patrick Peterson clarifies comments that Cardinals' Kyler Murray only cares about himself
By Desk Sports Team
Patrick Peterson has revealed recent comments criticizing former teammate Kyler Murray. On CBS Sports' All Things Covered podcast, Peterson, who played with Murray in Arizona, recently told co-host Bryant McFadden that the Cardinals quarterback only cares about himself. Murray then replied via his media on Social.
On Thursday, Peterson said his comments were based on observing Murray's body language during a Cardinals game.Peterson said he didn't want to disrespect Murray "in any way." said. He added that he reached out to Murray via text message, but he didn't respond. "I think he has a lot of talent, so I'm looking forward to talking to him," Peterson said. "And [Murray's] mannerisms these days are amazing. man says things he's afraid to say to him…it's no secret, everyone sees it. They see it every time it's on TV. You can see Kyler Murray pouting. Curse the head coach and shout offensive plans. I didn't say so.
Peterson alluded to Murray's actions during and after Arizona's recent loss to the Chargers. After the loss, Murray was asked about his crucial fourth interception on a throw to DeAndre Hopkins. It wasn't for. Roughly speaking, we were kind of eaten."
Murray's words were discussed by Peterson and All Things Covered co-host Bryant McFadden, and Peterson's comments quickly spread.
These comments were returned to Murray, who responded to Peterson on social media. Murray not only denied his perception that he was being selfish, but said that if Peterson really had a problem, he should have called him in person rather than talking about him on the podcast.
"No one cares about Kyler Murray, but they care about Kyler Murray," Peterson said, adding that given how Murray talks about the team publicly, Murray is his head. He replied to McFadden that he didn't seem to care about the coach. "It's just a fact."
Peterson spent the first decade of his NFL career with the Cardinals and spent his final two years in the desert teaming with Murray. Murray was drafted No. 1 in Arizona in 2019, and Peterson left the franchise after the 2020 season to sign with the Minnesota Vikings. During his two seasons with the Cardinals, the club failed to top. 500, going 13-18-1 in total in the regular season. It will be interesting to see if Murray reacts publicly to Peterson's recent comments. He seems to want me to pay no more attention to him.
Check all news and articles from the latest Sports news updates.
Sports News R
Pound hits yet another record high not seen since early August
After FTX left investors stranded, this new trading platform making crypto whales fear for their future
Desk Sports Team
Vinicius Junior is the subject of an effigy that was displayed prior to the Atletico Madrid game
Braves executive Dana Brown is hired by Houston to take James Click's place as the reigning champions
New Business in Hansard Global 1H Stopped Due to Difficult Investment Climate


For over 50 years, Talley Construction has been a key partner in building quality infrastructures in the Southeast. We recognize that our success is directly related to the talents, hard work, and dedication of the individuals who have joined our family. At Talley Construction, we invest in our people, we offer individuals an ideal foundation of basic work skills along with competitive wages and benefits and the opportunity to grow a career.
If you're looking for a challenging career with growth potential and commitment to being the best in the industry, come join our family!
What do you need to succeed at Talley Construction? Drive, perseverance, and a willingness to learn. Career growth at Talley Construction has no limits. Click on the video's below and let Rick and Tom tell you a little about their career growth at Talley Construction.
Talley Construction is committed to our employee family and offering a supportive work environment and culture with a comprehensive benefits package, competitive salaries, 401(k), vacation and holiday pay.


For the ARM industry nothing is top of mind more than compliance. We have entire departments solely focused on monitoring and evaluating an employee's ability to engage a customer in both a productive and complaint manner. Who has a stake in ensuring that employees embrace compliance? Operations, absolutely. Training, duh. Quality, indeed.
But what about human resources? Many businesses fail to recognize the dependencies that exist between compliance and human resources. When the two are in lock step, the business wins.
The days of human resources being a hiring and firing mechanism for the business are long gone. In fact, if you are still operating that way you either don't have a resourceful HR team or you are ignoring the ever changing needs of our industry. Ignoring the role of HR in compliance is risky and irresponsible.
The businesses that have not yet given HR a seat at the table are likely doing so because they simply do not understand where or how the worlds of HR and compliance intersect.
Approaching how the two functions should connect is as effortless as answering three uncomplicated questions.
Do we want employees who are compliance-minded?
Do we want to have a culture of compliance?
Do we want accountability when it comes to compliance?
Unless you just crawled out from under a boulder, the answer to all three is a resounding yes.
Initial and ongoing compliance training is essential to maintaining a compliance mindset against the ever-changing regulatory landscape. Nonetheless, no amount of training will avail if the employee is not innately inclined toward adherence to predetermined systems, guidelines and instructions. The HR team must target candidates with past behaviors that indicate their willingness and aptitude for conforming to procedures, standards and directives.
To target these candidates HR practitioners should consider the fundamentals.
Thoroughly cover compliance as a job duty in the job description and job posting.
Center several behavioral based questions in compliance.
Tell me about a time when a former employer had a strict policy that you found hard to follow? Why was it hard to follow? Were you able to adhere to the policy 100% of the time?
Tell me about a time when you skirted the rules to make the customer happy?
Conceptually creating and communicating the desired company culture is effortless for most executive teams. However, if the organization does not live the culture, speak the culture, champion the culture and embrace the culture, it is nothing more than a fantasy. A culture of compliance starts with ensuring that compliance is an imperative that is integrated into the daily lives of employees from every function and within every level of the organization.
Again, starting with the fundamentals, the HR team should ensure that compliance is integrated into the following.
Yearly Goal Setting – Every person in the organization should have at least one goal tied to compliance. How does an IT person tie goals to compliance? Building a culture of compliance starts with everyone from the janitor to the CEO asking this question.
Corporate Communications – Does your organization recognize the compliance team as a vital component of operational success? Is there messaging directly from your compliance team in every newsletter, town hall meeting and daily huddle? Be intentional in every communication to advance a culture of compliance.
Company Branding – The compliance imperative should be reflected in every piece of collateral.
Compliance and quality scorecards with a system for identifying and correcting every level of compliance, from failing to recite the mini-Miranda to egregious violations that are grounds for immediate dismissal. Incorporating language from the handbook and other progressive discipline policies will further integrate compliance and HR.
Notifications – Some states require the organization to notify them any time a collector is terminated for compliance misconduct, whether or not the termination was for an egregious act or a series of small missteps that occurred over a period of time. In most organizations, HR is providing these notifications upon termination of the employee. There needs to be a clear procedure on how the notifications will be delivered to state agencies within the time frame outlined in the regulations.
Evaluations – A significant share of the employee's overall formal evaluation should be directly tied to their performance against compliance goals.
Pay for Performance Plans – The pay out of bonuses should be offset by compliance infractions. Both HR and payroll typically overlap compliance when it comes to bonus offsets.
Hiring employees with a compliance mindset, developing and actively championing a culture of compliance and ensuring accountability to compliance policies are great places to start the conversation between HR and Compliance. When cross functional teams work together frequently on key imperatives, the relationships between departments develop in ways that will only lead the organization to process improvement, compliance and profitability.
Stacy Spradling is the Senior Vice President for Human Resources for Radius Global Solutions. She is also a member of the Compliance Professionals Forum's Editorial Review Board.


Why do some people embrace change quickly, while others are slower to make changes to their practices or perspectives?
What comfort (and convenience) is there in sticking with the known, the familiar, the expected?
Can leaders of change persuade people who are slow, and even resistant to change, through enthusiasm alone?
Is it enough to lead by example?
I want to suggest that, as educational leaders, if we want to help people come to terms with change and embrace it, then we need to recognise and validate their desire to stick with 'the known'. Roger Pryor's latest post makes some excellent points about 'leading from behind' and developing the leadership capacity of others. I think this is one of the significant hurdles – just as we find in our classrooms it is sometimes necessary to hang back while the students discover things for themselves, people can be empowered by discovering their capacity to change. Recognising that people are resisting change because they feel disempowered helps us to employ methods that give power back. This is a win-win solution.
But what other barriers are there to change that could similarly be 'diagnosed' and therefore turned around?
When a teacher tells me that they don't want to use any online teaching tools because they are 'too tired' or 'too busy', one reaction I feel is frustration. Does this teacher think that I don't get tired? That I am not busy?? I manage to find time to change my practice because I see it as a high priority.
The problem with this line of thinking is twofold. Firstly, I'm expecting someone else to have the same energy levels as me, without really questioning whether they do. Secondly, I'm asking someone to accept a shift to online teaching as a priority, when perhaps their professional priorities lie elsewhere. Perhaps they are really struggling with face-to-face classroom management. Perhaps they are consumed by essay marking.
So, one way forward is to find ways to align our priorities.
By this I don't mean that other teachers should change their priorities to match mine! But, I might set aside my initial frustration to consider ways in which I can create professional learning that satisfies both of our priorities. One teacher I worked with gained confidence in marking essays after I showed her how to use track changes and commenting in Word…this also served the purpose of increasing her confidence with technology. Our priorities were aligned!
However is it also possible that sometimes, just sometimes, we are expecting too much? We also need to recognise that people only have so much energy to give.
Another way forward then, is to find ways of giving people the energy to change.
Teacher burnout is an increasingly widespread phenomenon. And yet, when I expect others to adopt new practices on the grounds that 'I was able to do it', I am refusing to validate them as a human being outside of the world of work. This might fly in the corporate world, but in the education system I would like to think this is outside of our philosophical remit.
One way that I generate energy to learn more about technology and the online world is to engage in digital practices that nourish me, personally. For me it's sharing my (budding) artwork, making digital collages, reading with my Kindle, and connecting with friends in a purely social capacity via Facebook. I get professional nourishment from a lot of places too, but I'm not talking about that.
For some people getting a thirst for technology comes when they make their first Skype call, or make photo albums on iPhoto. For many people, the social connection provided by Facebook has been the big thing to 'draw them in' and increase their digital literacy (one of the reasons why, although Facebook has turned evil, I have a real problem with the tech elite bagging it out unreservedly).
Fun generates energy. Fun lures people into engagement.
So, if the diagnosis is a lack of energy, it might be worthwhile exploring how to restore people's capacity to engage through play.
These are just a couple of example that I have been forming up. Aligning (not replacing) priorities, and restoring energy through fun and play.
As we continue to make new inroads with people who have typically resisted change, I really believe it is time to develop more sophisticated models than 'lead by example'. That was phase one. Now we are getting a critical mass of people out there willing to lead by example…where can we move to next to stimulate change and support the changers?
This entry was posted on July 12, 2010, 6:14 pm and is filed under education, online tools, reflections, school, social media, technology. You can follow any responses to this entry through RSS 2.0. You can leave a response, or trackback from your own site.
This post makes sense to me, Kelli; perhaps the 140 character limit sometimes doesn't make meanings clear enough. Aligning priorities can be challenging. If a teacher doesn't perceive an increased use of technology as being instrumental in improving his/her teaching it is going to be difficult to 'force' them to change…sometimes all they are going to do is use the computer as a souped-up typewriter. And this is not really incorporating technology. Finding an application which makes sense to them is a positive step!
These are the same tough questions I ask myself, of myself and of others.
Why do some people embrace change quickly, while others are slower to make changes to their practices or perspectives? I continually go back to my father in regards to his, um, professional development as a mechanic. You have heard it before. There is a two way street here, my frustration of open, often armed resistance…and the frustration of others at my often continuous concrete examples of how embracing change can help our groups. And for me, age or generational differences are not a part of this debate, as many younger educators as more experienced teachers resist change, and vice versa.
Can leaders of change persuade people who are slow, and even resistant to change, through enthusiasm alone? In my professional context/experience, no.
Is it enough to lead by example? No. Showing, not telling?
I am are not a 'better' teacher than my colleagues, different, yes, better, no.
I am aligned and willing.
I hear you Troy. I am truly 'blessed' to work with people who I can argue with about how to best bring about change that is meaningful and digitally literate. Not everyone is so lucky. I know that in times when I have felt like this it was only my PLN that kept me motivated to keep pushing boundaries. I haven't always been right, and part of where this reflection is coming from is that I'm quite sure I have pissed people off with my sermonising about technology! Now I want to be more generative in my thinking about how to tackle this problem (rather than just wanting to tackle certain people, ha ha!).
I'm trying to think more about what impact digital practices have had on my overall quality of life. Not everyone wants to improve their teaching practice…but surely everyone wants a happier life? So, my new (developing) focus is how to orient change/development around increased happiness. I want to increase people's repertoire for making connections, solving problems, reflecting, and getting work done. I know you want the same…and trust me, your influence makes a difference. Even when all you feel like you're doing is beating an old drum.
Enthusiasm goes a long way, but not far enough. For me, there's a couple of things I've learnt from the Quality Teaching doc that I always need to throw into the mix. Relevance – answer the "why" question before it is asked – show them how much better, easier, neater, quicker, whatever, it is. How it might benefit them to give it a go. And also, link to their prior experience/needs. Show them that what you're talking about isn't really all that radical, it's just another step onward that might help them do things in a better way or a way that students grab hold of easier.


text:
Occasional light rain. High 56F. Winds light and variable. Chance of rain 80%..
Cloudy with occasional rain showers. Low near 50F. Winds light and variable. Chance of rain 60%.
New House speaker lays out challenges
by Chris Cobler
The 87th session of the Texas Legislature opened Tuesday with COVID-19 encompassing every aspect of what the lawmakers do, according to new House Speaker Dade Phelan.
"COVID, obviously, it will be a blanket over the entire session," Phelan told his hometown TV station, KFDM Channel 6, in Beaumont. "We will deal with it in every aspect of policy. It will be a huge determining factor in the budget.
Before the pandemic hit, Phelan said, legislators "were supposed to come into this budget cycle with a surplus, and now we're coming into it with a deficit …" Money will be even tighter for the next two-year budget lawmakers write during the session, he said.
"The No. 1 goal is to get the economy back on track," Phelan said
For opening day, Lt. Gov. Dan Patrick and State Rep. Charlie Geren, R-Fort Worth and chair of the administration committee, laid out safety protocols for lawmakers and visitors to follow at the Capitol, which recently reopened after closing in March because of the pandemic. The opening ceremony was scheduled to be shorter than usual to reduce time spent gathering.
"It's always been difficult to be speaker. It's never been easy, but going into this session, the 87th, given the budget deficit, redistricting, and the fact that we have the first pandemic in 102 years in which to operate, I'm exceptionally proud they've given me this honor," Phelan said of the bipartisan coalition of lawmakers that voted for him to be the new speaker.
Phelan, a Republican, stressed the bipartisan spirit of Texas and cited how well former Gov. George W. Bush worked with Democratic Lt. Gov. Bob Bullock during their time serving together at the Capitol.
"That is the Texas model. We've always worked that way," Phelan said. "If you're sitting at the speaker's dais and you're looking at all the chairs in the House chamber, there is no left side or right side, red, blue, like there is in Washington, D.C. We all sit amongst each other."
Lawmakers are scheduled to be in session until May 31.
Trying to speed up
Texas is going big with its approach to COVID-19 vaccinations this week.
Most of the doses available this week are going to 28 larger providers that can vaccinate at least 100,000 people, Texas Department of State Health Services officials said in a statement. Some doses also will be going to smaller providers in more rural parts of the state.
"We are working hard to improve the vaccination process for everyone," Dr. John Hellerstedt, state health commissioner, said in a statement explaining the pivot to the larger vaccination hubs.
Providers that receive the larger amounts of vaccine will vaccinate health care workers, people 65 and older, and those who have a medical condition that increases their risk of severe disease or death. They also agree to provide a registration phone number and website and to vaccinate people from surrounding areas.
The Texas Department of State Health Services surveyed vaccine providers about their capacity to operate large, community vaccination sites and on Sunday published a list of vaccine hub providers. The hubs will receive a total of 158,825 doses this week.
An additional 38,300 doses will go to 206 providers. Of Texas' 254 counties, 104 will receive vaccine shipments this week.
State health officials stressed that people need to register in advance for the shots and should not just show up at one of the hubs. Officials also urged patience as supplies remain limited.
The small city of Dickinson set an example for how to handle a close election.
The race for mayor ended in a tie, but the two candidates didn't duke it out. Instead, candidates Sean Skipworth and Jennifer Lawrence followed state law, which calls for a random selection in the unlikely event of a tie.
Election officials in Dickinson, population 21,000 in Galveston County, put the candidates' names on ping-pong balls placed in a tophat. Even though her name wasn't drawn, Lawrence didn't demand a "Hunger Games"-style trial by fire.
Mayor-elect Skipworth described a decidedly different scene to KHOU-TV: "We get up there, one of us wins, one of us loses, and we give each other a hug or whatever, say, 'Good job' and wish you the best. Hopefully that's how it's going to be in the country in the future going forward."
Chris Cobler is a board member and past president of the Freedom of Information Foundation of Texas. He welcomes email at ccobler@texaspress.com.


Put cauliflower, garlic cloves and shallots on rimmed baking sheet. Drizzle with oil and sprinkle with salt and pepper.. Roast in 400 F oven, turning occasionally, until golden on all sides, about 25 minutes.
Remove from oven and pour into a sauce pan over medium heat. Add thyme, bay leaf and stock. Bring to a boil, reduce to a simmer and cook for 10-15 minutes, until the vegetables are thoroughly cooked through.
Remove the thyme bay leaf. Using a hand-held blender, or in a food processor, blitz the soup until smooth. I run it through a sieve, return to the pan and warm.
Pour into serving bowls and top with croutons and a sprinkle of hot pepper flakes.


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text:
Windows 10 Creators Update may come in April
Windows 10 Creators Update is the next major update for Windows 10 which is said to be coming in "early 2017". It is the 4th Windows 10 version after 1507, 1511 (November Update) and 1607 (Anniversary Update).
Microsoft announce the Windows 10 Creators Update in the Microsoft Event on October 26, 2016 and said the following:
Coming as a free update early next year to the more than 400 million devices running Windows 10, the Creators Update will bring 3D and mixed reality to everyone, empower every gamer to be a broadcaster, connect people faster to those they care about most, and much more.
Microsoft didn't specifically say in which month the Creators Update will be released, but they just said "early next year" which means early 2017.
3 days after the event, Nawzil posted on October 29, 2016 in the One Microsoft group on Facebook saying that the Creators Update is coming in April 2017.
Nawzil has been a reliable source when it comes to news about Windows and release dates in the past few years and he is a Microsoft Most Valuable Professional (MVP) now. So we believe he is right about the Creators Update coming in April.
2 months later MSPoweruser exclusively reported on January 2, 2016 that the Windows 10 Creators Update is set to be released on April 2017.
They also say Windows 10 Creators Update will be Version 1704 to match with April 2017 release date, but our sources tell us that the version will still remain to be 1703 even if the update will be released in April. Remember that Anniversary Update is actually version 1607 but it was released on August 2.
Related Leak : Windows 10 Cloud ISO
Our sources also tell us that the internal target for the RTM of Redstone 2 (Creators Update) is by the end of Q1 2017 and Redstone 3 by the middle of Q4 2017.
Various reports say Windows 10 will be feature-complete by this month, this caused a confusion among Windows Insiders and enthusiasts as the current Insider Preview builds don't have many new features. The new features are actually not added to the main release branch from which Windows Insiders get Insider Preview builds. That's why we could discover many new features in the leaked build 14997 from the OneCore_Base branch. There are many internal branches like this in which new features are being developed and tested by Microsoft employees. Those new features will then get added or merged with the rs_prerelease for Windows Insiders to test. In the final stage it will become rs2_release branch and this is what gets released to everyone in April 2017.
Stay tuned to MSLeaks for more news and updates about Windows 10 Creators Update and everything else related to Microsoft.
Nawzil Najeeb
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New Moto (Moto E4) Phone coming on 21st June 2017!
Samsung is working on a VR headset with inside-out tracking!
"2018 iPhones to use Intel Baseband chips exclusively instead of Qualcomm":...