A system and method are provided for switching from one phase-locked loop feedback source to another in a radio frequency (RF) transmitter. The RF transmitter includes a phase-locked loop (PLL) that provides a phase-modulated RF input signal and power amplifier circuitry that amplifies the RF input signal to provide an RF output signal. The PLL includes switching circuitry that couples a feedback path of the PLL to an output of the PLL for open loop operation and couples the feedback path of the PLL to an output of the power amplifier circuitry for closed loop operation. Prior to switching the feedback path from the output of the PLL to the output of the power amplifier circuitry, time alignment circuitry operates to time-align feedback signals from the outputs of the PLL and the power amplifier circuitry such that switching from open loop operation to closed loop operation causes minimal phase disturbance.
The present invention relates to phase-locked loops (PLLs) and more particularly to a method for transitioning from one PLL feedback source to another with minimal phase disturbance.
The Global System for Mobile Communication (GSM) cellular system has recently begun service using a new modulation standard referred to as Enhanced Data rates for GSM Evolution (EDGE). This standard uses 8-Level Phase Shift Keying (8PSK) modulation. Transmitters operating according to the EDGE standard must include a modulator providing both amplitude modulation and phase modulation. To efficiently amplify such modulation, a polar system is desirable.
Polar transmitters may be classified as either open loop or closed loop. In an open loop polar transmitter, a transmit signal is broken into amplitude and phase components. The phase component is provided to the radio frequency (RF) input of a power amplifier. The amplitude component may be used to vary the supply voltage, or collector voltage, of the power amplifier such that the output power of the power amplifier follows the instantaneous amplitude of the modulation envelope, thereby providing amplitude modulation.
One issue for an open loop polar transmitter is that amplitude modulation to phase modulation (AM/PM) distortion of the power amplifier varies as the supply voltage varies. One solution to this problem is to pre-distort the phase component prior to amplification in order to compensate for the AM/PM distortion of the power amplifier. However, if the Voltage Standing Wave Ratio (VSWR) at the output of the power amplifier changes due to variations in load impedance, then the AM/PM distortion also changes. As a result, the pre-distortion no longer aligns with the AM/PM distortion of the power amplifier. At low output power levels, this is generally not an issue because the spectrum and Error Vector Magnitude (EVM) requirements of the EDGE standard are less stringent for low output power levels. At higher output power levels, this may become more of an issue because the spectrum and EVM requirements are more stringent.
A closed loop polar transmitter may be used to solve the issue of AM/PM distortion by enclosing the power amplifier within a phase-locked loop (PLL) generating the phase modulation. However, one issue for a closed loop polar transmitter is that strong interference signals present at the antenna are fed back to the PLL along with the output of the power amplifier. If the interference signal is strong enough, the interference signal will overpower the feedback from the output of the power amplifier and cause the PLL to unlock. As a result, the output of the polar transmitter is severely distorted.
Commonly owned and assigned U.S. patent application Ser. No. 11/070,704, entitled CLOSED LOOP POLAR MODULATION SYSTEM WITH OPEN LOOP OPTION AT LOW POWER LEVELS, filed Mar. 2, 2005, currently pending, which is hereby incorporated herein by reference in its entirety, discloses a polar transmitter that is configurable as either an open loop polar transmitter or a closed loop polar transmitter. The polar transmitter may be configured as an open loop polar transmitter for output power levels less than a predetermined threshold and as a closed loop polar transmitter for output levels greater than the predetermined threshold. Switching between the open loop configuration and the closed loop configuration is accomplished by switching a feedback path of a phase-locked loop (PLL) between an output of a power amplifier in the transmit chain when operating as a closed loop polar transmitter to an output of the PLL when operating as an open loop polar transmitter. However, the phase difference between the output of the power amplifier and the output of the PLL may be any angle from 0 to 360 degrees. This phase difference may cause the output of the PLL to deviate from the desired frequency such that the transmitter violates specification.
For example, for a polar transmitter performing EDGE modulation, the European Telecommunications Standardization Institute (ETSI) switching spectrum specification is −23 dBm in a 30 kHz resolution bandwidth at an offset frequency of 400 kHz. The switching spectrum is measured on a peak basis. Thus, if a transmitter fails the −23 dBm limit for any instant in time, the transmitter is out of specification. If the output power of the transmitter is −10 dBm to −5 dBm at the beginning of ramp-up for a transmit burst and the transmitter is switched from open loop to closed loop, the PLL may be momentarily pulled off of the desired frequency by 400 kHz due to the phase difference between the output of the power amplifier and the output of the PLL. As a result, the peak power level at 400 kHz may be exceeded, thereby violating the ETSI switching spectrum specification.
Thus, there remains a need for a system and method for switching from one PLL feedback source to another with minimal phase disturbance.
The present invention provides a system and method for switching from one phase-locked loop feedback source to another with minimal phase disturbance in a radio frequency transmitter. In general, the radio frequency transmitter includes modulation circuitry that provides a phase modulation signal based on input data, a phase-locked loop that provides a radio frequency (RF) input signal based on the phase modulation signal, and power amplifier circuitry that amplifies the RF input signal to provide an RF output signal. The phase-locked loop includes switching circuitry that couples a feedback path of the phase-locked loop to an output of the phase-locked loop for open loop operation and couples the feedback path of the phase-locked loop to an output of the power amplifier circuitry for closed loop operation. Prior to switching the feedback path from the output of the phase-locked loop to the output of the power amplifier circuitry, time alignment circuitry operates to time-align feedback signals from the outputs of the phase-locked loop and the power amplifier circuitry such that switching from open loop operation to closed loop operation causes minimal phase disturbance.
In one embodiment, the time alignment circuitry operates to adjust a phase of the feedback signal from the power amplifier circuitry. In another embodiment, the time alignment circuitry operates to adjust a phase of the feedback signal from the phase-locked loop.
FIG. 7 illustrates a fourth embodiment of a system for minimizing phase distortion due to switching from the open loop configuration to the closed loop configuration according to the present invention.
The present invention is preferably incorporated in a mobile terminal 10, such as a mobile telephone, personal digital assistant, wireless Local Area Network (LAN) device, a base station in a mobile network, or other similar wireless communication device. The basic architecture of a mobile terminal 10 is represented in FIG. 1, and may include a receiver front end 12, a radio frequency (RF) transmitter 14, an antenna 16, a duplexer or switch 18, a baseband processor 20, a control system 22, memory 24, a frequency synthesizer 26, and an interface 28. The receiver front end 12 receives information bearing radio frequency signals from one or more remote transmitters provided by a base station (not shown). A low noise amplifier 30 amplifies the signal. A filter circuit 32 minimizes broadband interference in the received signal, while downconversion and digitization circuitry 34 downconverts the filtered, received signal to an intermediate or baseband frequency signal, and digitizes the intermediate or baseband frequency signal into one or more digital streams. The receiver front end 12 typically uses one or more mixing frequencies generated by the frequency synthesizer 26.
The baseband processor 20 processes the digitized, received signal to extract the information or data bits conveyed in the received signal. This processing typically comprises demodulation, decoding, and error correction operations. As such, the baseband processor 20 is generally implemented in one or more digital signal processors (DSPs).
On the transmit side, the baseband processor 20 receives digitized data from the control system 22, which it encodes for transmission. The control system 22 may run software stored in the memory 24. Alternatively, the operation of the control system 22 may be a function of sequential logic structures as is well understood. After encoding the data from the control system 22, the baseband processor 20 outputs the encoded data to the RF transmitter 14.
A modulator 36 receives the data from the baseband processor 20 and, in this embodiment, operates according to one or more modulation schemes to provide a modulated signal to the power amplifier circuitry 38. The modulation scheme of the modulator 36 is controlled by a mode select signal (MODE SELECT) from the control system 22. In one embodiment, the modulator 36 operates according to either an 8-Level Phase Shift Keying (8PSK) modulation scheme, which is a modulation scheme containing both amplitude and phase components, or a Gaussian Minimum Shift Keying (GMSK) modulation scheme, which is a constant amplitude modulation scheme.
When in 8PSK mode, the modulator 36 provides a phase component at a desired transmit frequency to the power amplifier circuitry 38 and an amplitude component to the power control circuitry 40. The power control circuitry 40 controls an output power of the power amplifier circuitry 38 based on the amplitude component or, optionally, a combination of a ramping signal and the amplitude component, thereby providing amplitude modulation of the phase component. When in GMSK mode, the modulator 36 provides a phase modulated signal to the power amplifier circuitry 38 and the ramping signal to the power control circuitry 40, where the power control circuitry 40 controls the output power of the power amplifier circuitry 38 based on the ramping signal.
The power amplifier circuitry 38 amplifies the modulated signal from the modulator 36 to a level appropriate for transmission from the antenna 16. A gain of the power amplifier circuitry 38 is controlled by the power control circuitry 40. In essence, the power control circuitry 40 operates to control a supply voltage provided to the power amplifier circuitry 38 based on the amplitude component or, optionally, a combination of the amplitude component and the ramping signal from the modulator 36 when in the 8PSK mode and based on the ramping signal when in GMSK mode.
A user may interact with the mobile terminal 10 via the interface 28, which may include interface circuitry 42 associated with a microphone 44, a speaker 46, a keypad 48, and a display 50. The interface circuitry 42 typically includes analog-to-digital converters, digital-to-analog converters, amplifiers, and the like. Additionally, it may include a voice encoder/decoder, in which case it may communicate directly with the baseband processor 20.
The microphone 44 will typically convert audio input, such as the user's voice, into an electrical signal, which is then digitized and passed directly or indirectly to the baseband processor 20. Audio information encoded in the received signal is recovered by the baseband processor 20, and converted into an analog signal suitable for driving speaker 46 by the interface circuitry 42. The keypad 48 and display 50 enable the user to interact with the mobile terminal 10, input numbers to be dialed and address book information, or the like, as well as monitor call progress information.
FIG. 2 illustrates an exemplary embodiment of the modulator 36 wherein the modulator 36 operates in either an 8PSK (8-Level Phase Shift Keying) mode or GMSK (Gaussian Minimum Shift Keying) mode. It should be noted that 8PSK and GMSK are exemplary modulation schemes and are not intended to limit the scope of the present invention. The modulator 36 includes digital modulation circuitry 52 and a phase-locked loop 54. Exemplary embodiments of the digital modulation circuitry 52 can be found in commonly owned and assigned U.S. Pat. No. 6,834,084, entitled DIRECT DIGITAL POLAR MODULATOR, issued Dec. 21, 2004; U.S. Patent Application Publication No. 2003/0215025, entitled AM TO PM CORRECTION SYSTEM FOR POLAR MODULATOR, published Nov. 20, 2003; and U.S. Patent Application Publication No. 2003/0215026, entitled AM TO AM CORRECTION SYSTEM FOR POLAR MODULATOR, published Nov. 20, 2003, which are hereby incorporated herein by reference in their entireties.
In general, the digital modulation circuitry 52 receives digital data (DATA) from the baseband processor 20 (FIG. 1) and processes the data according to either an 8PSK modulation scheme or a GMSK modulation scheme depending on the mode select signal (MODE SELECT). In 8PSK mode, the digital modulation circuitry 52 provides a frequency deviation signal (f) corresponding to a desired phase modulation and an analog adjustable power control signal (VRAMP) including an amplitude modulation component. The frequency deviation signal (f) is also referred to herein as a phase modulation signal. In one embodiment, the adjustable power control signal (VRAMP) is a combination of the amplitude modulation component, a ramping signal defining a transmit burst, and a power amplifier gain setting that controls the output power level of the power amplifier circuitry 38.
In GMSK mode, the digital modulation circuitry 52 provides the frequency deviation signal (f) corresponding to the desired modulation. However, in GMSK mode, the adjustable power control signal (VRAMP) does not include an amplitude modulation component and is used to provide the desired output. The adjustable power control signal (VRAMP) may be a combination of a ramping signal and a power amplifier gain setting.
For either 8PSK or GMSK modulation, the PLL 54 generates a modulated output signal at the desired radio frequency based on the frequency deviation signal (f). In the exemplary embodiment illustrated, the PLL 54 includes a reference oscillator 56, a phase detector (PFD) 58, a charge pump 60, a loop filter 62, a voltage controlled oscillator (VCO) 64, and a fractional-N divider 66. The operational details of the PLL 54 will be apparent to one of ordinary skill in the art upon reading this disclosure. In general, the phase detector 58 compares a phase of a reference signal provided by the reference oscillator 56 with a divided signal provided by the fractional-N divider 66. Based on the comparison of the reference signal and the divided signal, the phase detector 58 provides pump-up and pump-down control signals to the charge pump 60. Based on the pump-up and pump-down control signal, the charge pump 60 generates an output signal, which is low-pass filtered by the loop filter 62 to provide a control signal to the VCO 64.
Since the power amplifier circuitry 38 is not enclosed within the PLL 54, the RF transmitter 14 is an open loop transmitter. One issue with the open loop RF transmitter 14 of FIG. 2 is that that the load impedance seen at the output of the power amplifier circuitry 38 may vary due to environmental changes such as the user placing the antenna 16 (FIG. 1) near his or her body. As a result, the Voltage Standing Wave Ratio (VSWR) at the output of the power amplifier circuitry 38 changes, and the AM/PM distortion characteristic of the power amplifier circuitry 38 also changes. Because of the change in the AM/PM characteristic of the power amplifier circuitry 38, AM/PM compensation circuitry within the digital modulation circuitry 52 may no longer precisely compensate the AM/PM distortion of the power amplifier circuitry 38 such that the output of the power amplifier circuitry 38 contains residual AM/PM distortion.
One solution to this issue is to alter the design of the RF transmitter 14 of FIG. 2 such that the RF transmitter 14 is a closed loop transmitter. This could be done by enclosing the power amplifier circuitry 38 within the loop of the PLL 54 such that the phase distortion is removed from the output of the power amplifier circuitry 38.
However, one problem associated with converting the RF transmitter 14 of FIG. 2 into a closed loop transmitter by enclosing the power amplifier circuitry 38 within the PLL 54 is that a strong interference signal may be present at the antenna 16 while transmitting. This interference signal may be strong enough to overpower the feedback from the output of the power amplifier circuitry 38 such that the PLL 54 unlocks. As an example, the interference signal may be strong enough to overpower the feedback from the output of the power amplifier circuitry 38 such that the PLL 54 unlocks if the power level of the interference signal is greater than about 6 dB less than the output power level of the power amplifier circuitry 38. However, 6 dB is exemplary and may vary depending on the particular implementation. As a result of the unlocking of the PLL 54, the output of the RF transmitter 14 would be severely distorted, which would be detrimental to both the mobile terminal 10 and to other radio systems near the mobile terminal 10.
This is particularly an issue when the output power of the power amplifier circuitry 38 is set to a low output power level, and more particularly when the output power is set to a minimum output power level. For example, when operating at a minimum output power level according to the EDGE modulation standard, the average output power may be as low as 0 dBm with minimum envelope excursions, or valleys, dropping to −14 dBm. Thus, for our example, the interference signal seen at the output of the power amplifier circuitry 38 would have to be less than −20 dBm to avoid unlocking the PLL 54. If the interference source is a transmitter transmitting at 33 dBm, then a minimum separation between the mobile terminal 10 and the interference source in order to prevent unlocking of the PLL 54 would be more than ten feet. Thus, if the interference signal source is within ten feet of the mobile terminal 10, the interference signal may cause the PLL 54 to unlock on every valley in the modulation, thereby substantially degrading the performance of the mobile terminal 10.
FIG. 3 is an exemplary embodiment of the RF transmitter 14 that operates in either a closed loop mode of operation or an open loop mode of operation according to one embodiment of the present invention. In this embodiment, the PLL 54 is a Fractional-N Offset PLL (FN-OPLL) such as that disclosed in commonly owned and assigned U.S. patent application Ser. No. 11/047,258 entitled FRACTIONAL-N OFFSET PHASE LOCKED LOOP, which was filed on Jan. 31, 2005 and is hereby incorporated by reference in its entirety.
For the open loop mode of operation, the loop control signal (LOOP CONTROL) is provided in a first state such that switching circuitry 68 couples a feedback path of the PLL 54 to an output of VCO 70, which in this embodiment is the output of the PLL 54. As such, the power amplifier circuitry 38 is not enclosed within the PLL 54. For the closed loop mode of operation, a directional coupler 72 provides a feedback signal indicative of the output signal of the power amplifier circuitry 38, and the loop control signal (LOOP CONTROL) is provided in a second state such that the switching circuitry 68 couples the feedback path of the PLL 54 to the directional coupler 72, thereby enclosing the power amplifier circuitry 38 within the PLL 54.
The modulator 36 is switched to the open loop mode of operation when the mobile terminal 10 is transmitting at low output power levels, thereby preventing or at least substantially reducing the probability that the PLL 54 will be unlocked due to strong interference signals. When the average output power of the mobile terminal 10 is above a predetermined threshold, the modulator 36 is switched to the closed loop mode of operation. In one embodiment, the threshold is +12 dBm such that the RF transmitter 14 is configured as an open loop transmitter when the output power level of the mobile terminal 10 is less than 12 dBm and configured as an open loop transmitter when the output of the mobile terminal 10 is greater than or equal to 12 dBm. In another embodiment, the threshold may be in the range of +10 to +15 dBm depending on the particular design.
Preferably, for each transmit burst, the power amplifier circuitry 38 is not activated until the PLL 54 is locked to the desired frequency. Thus, the modulator 36 is switched to the open loop mode of operation prior to each transmit burst in order to lock the PLL 54 to the desired frequency before the power amplifier circuitry 38 is activated. After the PLL 54 is locked and once the power amplifier circuitry 38 is activated, the modulator 36 is switched to the closed loop mode of operation prior to the beginning of ramp-up for the transmit burst if the desired output power level is greater than the threshold. If the desired output power level is less than the threshold, the modulator 36 remains in the open loop mode of operation.
The PLL 54 includes a first PLL 74, which includes a fractional-N divider 76, phase detector 78, charge pump 80, loop filter 82, the VCO 70, and a mixer 84. The PLL 54 also includes a second PLL 86. It should be noted that the second PLL 86 may also be used as the frequency synthesizer 26 (FIG. 1) for the mobile terminal 10 when in receive mode. In operation, the fractional-N divider 76 fractionally divides a local oscillator frequency signal (FLO), which is the output of the second PLL 86, and a reference frequency (FR1) for the first PLL 74, based on an integer value (NINT1) and a fractional value (NUM1) to provide reference signal (FR1′).
The values NINT1 and NUM1 are generated by combiner circuitry 88 based on a modulation signal, which in this embodiment corresponds to the frequency deviation signal (f) from the digital modulation circuitry 52, and integer and fractional values NINT0 and NUM0. The integer and fractional values NINT0 and NUM0 define an initial fractional divide value (N0), which corresponds to a desired center or carrier frequency of the output signal (FVCO). The integer and fractional values NINT0 and NUM0 may be provided by the control system 22 (FIG. 1).
N is a combined divider value and "Modulation" is the frequency deviation signal (f). The value NINT1 is an integer portion of the combined divider value and NUM1 is a fractional part of the combined divider value.
The value NINT1 is passed to delay circuitry 90 which delays the value NINT1 with respect to the value NUM1. The delay ensures that the values NINT1 and NUM1 are aligned at the fractional-N divider 76.
Since the fractional divide value (NINT1.NUM1) of the fractional-N divider 76 is provided by the combiner circuitry 88 based on the frequency deviation signal (f), the local oscillator signal (FLO) is fractionally divided based on the frequency deviation signal (f), thereby controlling the output signal (FVCO) of the PLL 54 such that it is a phase or frequency modulated signal. Further, in one embodiment, the frequency deviation signal (f) is a digital signal such that the PLL 54 provides a digital modulation interface.
The phase detector 78 compares the fractionally divided reference signal (FR1′) output by the fractional-N divider 76 to an intermediate frequency signal (FIF). The output of the phase detector 78 is provided to the charge pump 80. More specifically, the phase detector 78 provides a pump-up and a pump-down signal to the charge pump 80 based on the comparison of the fractionally divided reference signal (FR1′) and the intermediate frequency signal (FIF). The output of the charge pump 80 is filtered by the loop filter 82 and provided to the VCO 70 as a control voltage (VC). The loop filter 82 is designed such that the first PLL 74 has a wide open-loop unity-gain bandwidth. In one embodiment, the first PLL 74 has a bandwidth in the range of 1.2 MHz to 1.5 MHz. Based on the control voltage (VC), the VCO 70 provides the output signal (FVCO). The output of the VCO 70 is the modulated signal and is provided to the power amplifier circuitry 38.
When in the open loop mode of operation, the switching circuitry 68 is controlled such that the output of the VCO 70 is coupled to a feedback path of the first PLL 74. The feedback path of the first PLL 74 includes the mixer 84 and optionally a feedback filter 92. It should be noted that the switching circuitry 68 is illustrated in FIG. 3 as part of the PLL 54. However, the switching circuitry 68 may be separate from the PLL 54. When in the closed loop mode of operation, the output of the power amplifier circuitry 38 is coupled to the feedback path of the first PLL 74 via the directional coupler 72.
Whether the feedback signal is from the output of the VCO 70 or the output of the power amplifier circuitry 38, the mixer 84 operates to multiply the feedback signal by a divided local oscillator signal (FLO2). It should be noted that additional divider circuits may be placed between the VCO 70 and the mixer 84 depending on the particular implementation. The divided local oscillator signal (FLO2) is provided by a divider 94, which operates to divide the local oscillator signal (FLO) from the second PLL 86 by an integer divide value. The divider 94 may alternatively be a fractional-N divider. It should be noted that the divider 94 is optional, and the local oscillator signal (FLO) may alternatively be provided to the mixer 84.
In operation, the mixer 84 multiplies the feedback signal, which has a frequency substantially equal to the frequency FVCO, and the divided local oscillator signal (FLO2), thereby downconverting the feedback signal to provide the intermediate frequency signal (FIF). The output of the mixer 84 may include a high frequency component at a frequency equal to the frequency of the feedback signal plus the frequency of the divided local oscillator signal (FLO2) and a low frequency component at a frequency equal to a difference of the frequency of the feedback signal and the frequency of the divided local oscillator signal (FLO2), as commonly known. Thus, the output of the mixer 84 may optionally be filtered by the feedback filter 92 to remove the high frequency component and thereby provide the intermediate frequency signal (FIF) to the phase detector 78.
The frequency of the local oscillator signal (FLO) is controlled by an external component, such as the control system 22 (FIG. 1), by controlling the control inputs (NINT2 and NUM2) provided to the PLL 86. Accordingly, the control inputs NINT2 and NUM2 may be controlled for channel selection and for spur avoidance.
One issue with the modulator 36 of FIG. 3 is that the phase difference between the output of the power amplifier circuitry 38 and the output of the PLL 54 may be any angle from 0 to 360 degrees. When the RF transmitter 14 is switched from the open loop configuration to the closed loop configuration, this phase difference may cause the output of the PLL 54 to deviate from the desired frequency. Even if the switch occurs at a minimum output power level, the phase difference may cause the RF transmitter 14 to violate specification.
For example, if the RF transmitter 14 is operating according to the GSM specification and the EDGE modulation standard, the ETSI switching spectrum specification is −23 dBm in a 30 kHz resolution bandwidth and an offset frequency of 400 kHz. The switching spectrum is measured on a peak basis. Thus, if the RF transmitter 14 fails the −23 dBm limit for any instant in time, it is out of specification. If the RF transmitter 14 is switched from open loop to closed loop at the beginning of ramp-up for a transmit burst when the output power of the RF transmitter 14 is −10 dBm to −5 dBm, the PLL 54 may be momentarily pulled off of the desired frequency by 400 kHz due to the phase difference between the output of the power amplifier circuitry 38 and the output of the PLL 54. As a result, the peak power level at 400 kHz may be exceeded, thereby violating the ETSI switching spectrum specification.
The present invention provides a system and method for switching from one PLL feedback source to another with minimal phase disturbance. More specifically, the present invention provides a time alignment system for adjusting the phase of either the feedback signal from the output of the PLL 54 or the feedback signal from the output of the power amplifier circuitry 38 prior to switching from the open loop to closed loop. Thus, when the switch over occurs, the phase difference between the two feedback signals will be essentially zero, thereby minimizing phase disturbance.
Time alignment is performed during a period when the output of the PLL 54 and the output of the power amplifier circuitry 38 are essentially the same sine wave pattern. For example, if the RF transmitter 14 is operating according to the EDGE modulation standard of the GSM specification, time alignment is preferably performed during the guard time and tail bits during and before ramp-up when the 8PSK modulation is restricted by ETSI specifications to use a data pattern of all 1's. This results in a constant envelope signal, where both the output of the PLL 54 and the output of the power amplifier circuitry 38 are the same sine wave pattern. In one embodiment, time alignment and switch over from open loop to closed loop are performed between about 8 to 18 quarter symbol times before the center of the first tail symbol, depending on the desired ramp shape and length.
One embodiment of the present invention is illustrated in FIG. 4. The embodiment of FIG. 4 is similar to that of FIG. 3, however, for clarity, some of the elements shown in FIG. 3 have been omitted. In this embodiment, both of the feedback signals are first downconverted to an intermediate frequency by mixers 84A and 84B, respectively, thereby providing downconverted feedback signals (FIF,OL, FIF,CL). Feedback filters 92A and 92B operate to remove the high frequency components from the downconverted feedback signals (FIF,OL, FIF,CL). Downconversion to an intermediate frequency is beneficial because switching between the two feedback signals at an intermediate frequency requires less isolation than switching between the two feedback signals at a radio frequency.
A time alignment system 96 operates to adjust a phase of the downconverted feedback signal (FIF,CL) from the output of the power amplifier circuitry 38 to provide a phase-adjusted signal (FIF,CL′) that is in phase with the downconverted feedback signal (FIF,OL). In general, the time alignment system 96 compares a phase of the downconverted feedback signal (FIF,OL) to a phase of the phase-adjusted feedback signal (FIF,CL′). Based on this comparison, the time alignment system 96 adjusts a phase of the downconverted feedback signal (FIF,CL) from the output of the power amplifier circuitry 38 to provide the phase-adjusted feedback signal (FIF,CL′) that is in phase with the downconverted feedback signal (FIF,OL).
More specifically, the time alignment system 96 includes delay circuitry 98, a phase detector 100, and control circuitry 102. The delay circuitry 98 operates to delay the downconverted feedback signal (FIF,CL) provided by the mixer 84B to provide the phase-adjusted feedback signal (FIF,CL′). The phase detector 100 compares the phase of phase-adjusted feedback signal (FIF,CL′) to the phase of the downconverted feedback signal (FIF,OL). Based on the comparison, the phase detector 100 provides a phase detection signal to the control circuitry 102. The control circuitry 102 adjusts the delay of the delay circuitry 98 based on the phase detection signal. After a number of iterations, the delay of the delay circuitry 98 is adjusted such that the two feedback signals (FIF,OL, FIF,CL′) are in-phase.
The phase detection signal provided by the phase detector 100 includes a pump-up and a pump-down signal. The control circuitry 102 includes delay circuitry 104, counter 106, and AND gates 108 and 110 arranged as shown. In general, when the pulse width of the pump-up signal is greater than the pulse width of the pump-down signal, the count provided by the counter 106 is incremented. When the pulse-width of the pump-down signal is greater than the pulse-width of the pump-up signal, the count provided by the counter 106 is decremented. The output of the counter 106 controls the delay of the delay circuitry 98.
The delay circuitry 98 includes a number (N) of delays 112 1-112 N, which may be inverters or buffers, creating N+1 taps. In one embodiment, there are 255 delays creating 256 taps. Each tap is coupled to a multiplexer 114. The multiplexer 114 selects one of the taps based on the count value provided by counter 106, thereby providing the phase-adjusted feedback signal (FIF,CL′). Note that initially the output of the counter 106 may be set to an intermediate value, such as 128, such that the delay provided by the delay circuitry 98 may be increased or decreased depending on the phase difference detected by the phase detector 100.
Multiplexer 116 receives the feedback signals (FIF,OL, FIF,CL′) and provides one of these signals to the phase detector 78 as the intermediate frequency signal (FIF) based on the loop control signal (LOOP CONTROL). For the open loop configuration, the multiplexer 116 provides the downconverted feedback signal (FIF,OL) to the phase detector 78 as the intermediate frequency signal (FIF). For the closed loop configuration, the multiplexer 116 provides the phase-adjusted feedback signal (FIF,CL′) to the phase detector 78 as the intermediate frequency signal (FIF).
In operation, when it is desirable to initially lock the PLL 54 (FIG. 3), the loop control signal (LOOP CONTROL) is provided such that the downconverted feedback signal (FIF,OL) is provided to the phase detector 78. The control circuitry 102 may be disabled. When it is desirable to switch from open loop to closed loop, the time alignment system 96 is enabled to adjust the phase of the feedback signal from the output of the power amplifier circuitry 38 such the phase-adjusted feedback signal (FIF,CL′) is in-phase with the downconverted feedback signal (FIF,OL). Once time alignment is complete, the time alignment system 96 holds the delay of the delay circuitry 114 fixed. The loop control signal (LOOP CONTROL) is then provided such that the multiplexer 116 provides the phase-adjusted feedback signal (FIF,CL′) to the phase detector 78, thereby enclosing the power amplifier circuitry 38 within the PLL 54 for closed loop operation. Since the phase-adjusted feedback signal (FIF,CL′) is in phase with the downconverted feedback signal (FIF,OL), there is little or no phase disturbance. Note that the mixers 84A and 84B may be disabled in order to reduce current drain when their corresponding feedback paths are not in use.
The advantage of the time alignment system 96 of FIG. 4 is that the phase adjustment of the downconverted feedback signal (FIF,CL) occurs outside of the PLL 54 (FIG. 3). As such, the time alignment system 96 has essentially no settling time other than gate delays and can operate at a very high clock rate. For example, assume that the downconverted feedback signals (FIF,OL, FIF,CL) are at a frequency of 100 MHz. Then, once each 10 ns the phase detector 100 operates to increment or decrement the count of the counter 106. If there are 256 taps and the initial delay corresponds to the 128th tap, then the maximum time needed to sweep all possible delays is 128×10 ns, which is 1.28 microseconds.
Another embodiment of the present invention is illustrated in FIG. 5. This embodiment is similar to that described with respect to FIG. 4, however, the time alignment system 96 includes analog phase shift circuitry 118 rather than the delay circuitry 98 (FIG. 4). More specifically, the time alignment system 96 of FIG. 5 operates to adjust a phase of the feedback signal from the output of the power amplifier circuitry 38 prior to downconversion by the mixer 84B using the analog phase shift circuitry 118.
In operation, the output of the VCO 70 is downconverted by mixer 84A and filtered by filter 92A to provide the downconverted feedback signal (FIF,OL), as described above. The feedback signal from the output of the power amplifier circuitry 38 is first provided to the analog phase shift circuitry 118, which operates to adjust a phase of the feedback signal based on a control signal from the control circuitry 102. The output of the analog phase shift circuitry 118 is downconverted by the mixer 84B and filtered by the filter 92B to provide the downconverted feedback signal (FIF,CL).
The phase detector 98 compares the phase of the downconverted feedback signal (FIF,CL) to the phase of the downconverted feedback signal (FIF,OL). Based on the comparison, the phase detector 100 provides the phase detection signal to the control circuitry 102. The control circuitry 102 adjusts a phase shift of the analog phase shift circuitry 118 based on the phase detection signal. After a number of iterations, the phase shift of the analog phase shift circuitry 118 is adjusted such that the two downconverted feedback signals (FIF,OL, FIF,CL) are in-phase.
As described above, the phase detection signal provided by the phase detector 100 includes a pump-up and a pump-down signal. When the pulse width of the pump-up signal is greater than the pulse width of the pump-down signal, the count provided by the counter 106 is incremented. When the pulse-width of the pump-down signal is greater than the pulse-width of the pump-up signal, the count provided by the counter 106 is decremented. The output of the counter 106 is converted to an analog control signal by a digital-to-analog converter (DAC) 120, and the analog control signal controls the phase shift of the analog phase shift circuitry 118.
Multiplexer 116 receives the downconverted feedback signals (FIF,OL, FIF,CL) and provides one of these signals as the intermediate frequency signal (FIF) based on the loop control signal (LOOP CONTROL). For the open loop configuration, the multiplexer 116 provides the downconverted feedback signal (FIF,OL) to the phase detector 78 as the intermediate frequency signal (FIF). For the closed loop configuration, the multiplexer 116 provides the phase-adjusted feedback signal (FIF,CL) to the phase detector 78 as the intermediate frequency signal (FIF).
FIG. 6 illustrates a third embodiment of the present invention. This embodiment is similar to the embodiment of FIG. 4, however, the time alignment system 96 adjusts a phase of the downconverted feedback signal (FIF,OL) from the output of the VCO 70 rather than the phase of the downconverted feedback signal (FIF,CL) from the output of the power amplifier circuitry 38.
More specifically, the time alignment system 96 operates to adjust a phase of the downconverted feedback signal (FIF,OL) from the output of the VCO 70 to provide a phase-adjusted feedback signal (FIF,OL′) that is in phase with the downconverted feedback signal (FIF,CL). In general, the time alignment system 96 compares the phase of the phase-adjusted feedback signal (FIF,OL′) to a phase of the downconverted feedback signal (FIF,CL). Based on this comparison, the time alignment system 96 adjusts a phase of the downconverted feedback signal (FIF,OL) such that the two feedback signals (FIF,OL′, FIF,CL) are in-phase.
The time alignment system 96 includes the phase detector 100, the control circuitry 102, and delay circuitry 122. The delay circuitry 122 operates to delay the downconverted feedback signal (FIF,OL) provided by the mixer 84A to provide a phase-adjusted feedback signal (FIF,OL′). The phase detector 98 compares the phase of the phase-adjusted feedback signal (FIF,OL′) to the phase of the downconverted feedback signal (FIF,CL). Based on the comparison, the phase detector 100 provides a phase detection signal to the control circuitry 102. The control circuitry 102 adjusts the delay of the delay circuitry 122 based on the phase detection signal. After a number of iterations, the delay of the delay circuitry 122 is adjusted such that the two feedback signals (FIF,OL′, FIF,CL) are in-phase. The control circuitry 102 may be implemented as disclosed in FIG. 4. The delay circuitry 122 may be similar to the delay circuitry 98 of FIG. 4.
Multiplexer 116 receives the feedback signals (FIF,OL′, FIF,CL) and provides one of these signals as the intermediate frequency signal (FIF) based on the loop control signal (LOOP CONTROL). For the open loop configuration, the multiplexer 116 provides the phase-adjusted feedback signal (FIF,OL′) to the phase detector 78 as the intermediate frequency signal (FIF). For the closed loop configuration, the multiplexer 116 provides the downconverted feedback signal (FIF,CL) to the phase detector 78 as the intermediate frequency signal (FIF).
In operation, when it is desirable to initially lock the PLL 54 (FIG. 3), the delay of the delay circuitry 122 is set to an initial value, and the loop control signal (LOOP CONTROL) is provided such that the phase-adjusted feedback signal (FIF,OL′) is provided to the phase detector 78. In addition, the mixer 84B may be disabled in order to reduce current drain. When it is desirable to switch from open loop to closed loop, the time alignment system 96 is enabled to adjust the phase of the VCO 70 such the phase-adjusted feedback signal (FIF,OL′) is in-phase with the downconverted feedback signal (FIF,CL). Once time alignment is complete, the time alignment system 96 holds the delay of the delay circuitry 122 fixed. The loop control signal (LOOP CONTROL) is then provided such that the multiplexer 116 provides the downconverted feedback signal (FIF,CL) to the phase detector 78, thereby enclosing the power amplifier circuitry 38 within the PLL 54 for closed loop operation. Since the downconverted feedback signal (FIF,CL) is in phase with the phase-adjusted feedback signal (FIF,OL′), there is little or no phase disturbance.
The advantage of the time alignment system 96 of FIG. 6 is that the delay circuitry 122 is only in the feedback path of the VCO 70 and is not in the real signal path, which is the path of the power amplifier circuitry 38. Thus, if there is any noise introduced by the delay circuitry 122, the noise will not have any influence on the RF output signal. However, since the delay circuitry 122 is in the feedback path of the VCO 70, the time alignment system 96 has to allow the PLL 54 (FIG. 3) to settle after each step of the delay of the delay circuitry 122 during time alignment. As a result, the time required to perform time alignment is greater than the time required by the embodiments of FIGS. 4 and 5.
FIG. 7 illustrates yet another embodiment of the present invention. This embodiment is similar to that illustrated in FIG. 5, however, the time alignment system 96 includes analog phase shift circuitry 124 operating to adjust a phase of the feedback signal from the output of the VCO 70 rather than the feedback signal from the output of the power amplifier circuitry 38.
In operation, the output of the power amplifier circuitry 38 is downconverted by mixer 84B and filtered by filter 92B to provide the downconverted feedback signal (FIF,OL), as described above. The feedback signal from the output of the VCO 70 is first provided to the analog phase shift circuitry 124, which operates to adjust a phase of the feedback signal based on a control signal from the control circuitry 102. The output of the analog phase shift circuitry 124 is downconverted by the mixer 84A and filtered by the filter 92A to provide the downconverted feedback signal (FIF,OL).
The phase detector 100 compares the phase of downconverted feedback signal (FIF,CL) to the phase of the downconverted feedback signal (FIF,OL). Based on the comparison, the phase detector 100 provides the phase detection signal to the control circuitry 102. The control circuitry 102 adjusts a phase shift of the analog phase shift circuitry 124 based on the phase detection signal. After a number of iterations, the phase shift of the analog phase shift circuitry 124 is adjusted such that the two downconverted feedback signals (FIF,OL, FIF,CL) are in-phase.
time alignment circuitry adapted to time align a feedback signal from the output of the power amplifier circuitry and a feedback signal from the output of the phase-locked loop circuitry prior to the switching circuitry switching the feedback path of the phase-locked loop circuitry from the output of the phase-locked loop circuitry to the output of the power amplifier circuitry.
2. The system of claim 1 wherein the time alignment circuitry is further adapted to adjust a phase of the feedback signal from the output of the power amplifier circuitry to provide a phase-adjusted feedback signal that is time aligned with the feedback signal from the output of the phase-locked loop circuitry.
3. The system of claim 1 wherein the time alignment circuitry is further adapted to adjust a phase of the feedback signal from the output of the phase-locked loop circuitry to provide a phase-adjusted feedback signal that is time aligned with the feedback signal from the output of the power amplifier circuitry.
wherein the time alignment circuitry is adapted to adjust a phase of the downconverted closed loop feedback signal to provide a phase-adjusted feedback signal to a second input of the switching circuitry that is time aligned with the downconverted open loop feedback signal.
wherein for open loop operation the switching circuitry provides the downconverted open loop feedback signal to the second input of the phase detector as the output signal such that the second input of the phase detector is coupled to the output of the phase-locked loop circuitry, and for closed loop operation the switching circuitry provides the phase-adjusted feedback signal to the second input of the phase detector as the output signal such that the second input of the phase detector is coupled to the output of the power amplifier circuitry.
6. The system of claim 5 wherein the phase-locked loop circuitry further comprises a fractional divider adapted to divide a reference signal based on the phase modulation signal to provide the first signal.
control circuitry adapted to provide the delay control signal based on the phase detection signal.
second downconversion circuitry coupled to an output of the time alignment circuitry and adapted to downconvert the phase-adjusted feedback signal to provide a downconverted closed loop feedback signal to a second input of the switching circuitry.
wherein for open loop operation the switching circuitry provides the downconverted open loop feedback signal to the second input of the phase detector as the output signal such that the second input of the phase detector is coupled to the output of the phase-locked loop circuitry, and for closed loop operation the switching circuitry provides the downconverted closed loop feedback signal to the second input of the phase detector as the output signal such that the second input of the phase detector is coupled to the output of the power amplifier circuitry.
10. The system of claim 9 wherein the phase-locked loop further comprises a fractional divider adapted to divide a reference signal based on the phase modulation signal to provide the first signal.
control circuitry adapted to provide the phase shift control signal based on the phase detection signal.
wherein the time alignment circuitry is adapted to adjust a phase of the downconverted open loop feedback signal to provide a phase-adjusted feedback signal to a second input of the switching circuitry that is time aligned with the downconverted closed loop feedback signal.
wherein for open loop operation the switching circuitry provides the phase-adjusted feedback signal to the second input of the phase detector as the output signal such that the second input of the phase detector is coupled to the output of the phase-locked loop circuitry, and for closed loop operation the switching circuitry provides the downconverted closed loop feedback signal to the second input of the phase detector as the output signal such that the second input of the phase detector is coupled to the output of the power amplifier circuitry.
14. The system of claim 13 wherein the phase-locked loop further comprises a fractional divider adapted to divide a reference signal based on the phase modulation signal to provide the first signal.
second downconversion circuitry coupled to an output of the power amplifier circuitry and adapted to downconvert the feedback signal from the output of the power amplifier circuitry to provide a downconverted closed loop feedback signal to a second input of the switching circuitry.
18. The system of claim 17 wherein the phase-locked loop further comprises a fractional divider adapted to divide a reference signal based on the phase modulation signal to provide the first signal.
20. The system of claim 1 further comprising the power amplifier circuitry adapted to amplify the phase modulated RF signal to provide an RF output signal.
time aligning a feedback signal from the output of the power amplifier circuitry and a feedback signal from the output of the phase-locked loop circuitry prior to switching the feedback path of the phase-locked loop circuitry from the output of the phase-locked loop circuitry to the output of the power amplifier circuitry.
22. The method of claim 21 wherein time aligning the feedback signals from the outputs of the phase-locked loop circuitry and the power amplifier circuitry comprises adjusting a phase of the feedback signal from the output of the power amplifier circuitry to provide a phase-adjusted feedback signal that is time aligned with the feedback signal from the output of the phase-locked loop circuitry.
23. The method of claim 21 wherein time aligning the feedback signals from the outputs of the phase-locked loop circuitry and the power amplifier circuitry comprises adjusting a phase of the feedback signal from the output of the phase-locked loop circuitry to provide a phase-adjusted feedback signal that is time aligned with the feedback signal from the output of the power amplifier circuitry.


On Wednesday, Mayflower released Peregrine. It is a refreshing Witbier with an inviting cloudy appearance from being an unfiltered offering. Pilsner, Wheat, and Oats provide an aroma of baked bread on this creamy, full bodied brew.
The traditional additions of coriander and orange poke through with orange jam and lemon/lime notes. These flavors play off the Sorachi Ace dry hop that provides notes of lemon peel, lemon curd, and lemon grass.
Peregrine is on tap now and will be heading out into the New England market as well.


text:
Nestlé Vegan KitKat Is Now in UK Supermarkets
Nestlé vegan KitKat bars are now in UK supermarkets.
The vegan chocolate bars, called KitKat V, are available in Sainsbury's stores starting from today. The dairy-free chocolate bar features rice milk chocolate enrobed around a crisp wafer. The bar was developed by Nestlé's Research and Development center in York, where KitKats were created by confectionery company Rowntree's in 1935.
Louise Barrett, Head of the Nestlé Confectionery Product Technology Centre said in a statement sent to LIVEKINDLY that the company "worked very hard to get the right balance between the milk alternative and the cocoa. The result is a vegan chocolate that we're very proud of, and that we hope will be enjoyed by KitKat fans everywhere."
When Will Vegan KitKat Come to the US?
Will vegan KitKat bars launch in the US? Nestlé has said that KitKat V will not launch in the states, where it is produced by Hershey as part of a licensing agreement. The company has not revealed further information beyond the initial UK launch.
Instead of milk chocolate, KitKat V is made with a rice-based milk chocolate alternative. | Nestlé
Is Nestlé Ethical?
Nestlé is the world's largest food and drink company. And in recent years, it has made moves to appeal to the fast-growing plant-based food market, which is expected to reach £1.1 billion by 2023, according to Mintel. Some of its vegan options include plant-based tuna, condensed oat milk, dairy-free pea milk, and meatless meat.
But for years, Nestlé has been under fire for how it sources its cocoa (on a laundry list of other issues). There is evidence that much of the world's chocolate supply depends heavily on child labor. A recent report from the U.S. Department of Labor found that the West African cocoa industry was exploiting 1.6 million West African child laborers.
Last month, leading confectionery companies Nestlé, Mars, Mondelēz, Ferrero, Unilever, and Tony's Chocolonely laid pressure on the EU to reverse its decision in delaying mandatory due diligence legislation in the governing of key cocoa supply chains in West Africa.
The companies said in a joint statement: "We remain strongly convinced that an EU-wide legal framework based on international standards would be beneficial for companies in the cocoa supply chain, including our own, mainly by clarifying a common framework through which all companies will be expected to proactively manage their potential and actual adverse impacts on human rights and the environment."
In February, Bloomberg reported that Nestlé and Mars, another company known for chocolate bars, and Cargill, were named in a federal class-action lawsuit filed by International Rights Advocates, a human rights group, for alleged complicity in forced labor and trafficking. The plaintiffs say they were trafficked as children and forced into labor on the Ivory Coast, the world's biggest exporter and producer of cocoa.
On its website, Nestlé states that it is "working with our partners and cocoa growing communities to address the root causes of child labor." The company kicked off its Child Labor Monitoring and Remediation System program in 2012, which monitors more than 78,000 children in the Ivory Coast for signs of forced labor.
According to Nestlé, KitKat V is made with certified sustainable cocoa, sourced through the Nestlé Cocoa Plan in conjunction with the Rainforest Alliance. The initiative trains cocoa farmers, distributes higher-yielding cocoa trees, promotes gender equality, and addresses child labor in the supply chain.Looking for some fairtrade vegan chocolate? Check out our list here.
Kat Smith

redpajama_set_name: RedPajamaCommonCrawl


text:
One Of The Largest Most Complete T-Rex Skeletons Up For Sale
by Christies
On October 6, Christie's will offer one of the largest, most complete and widely studied Tyrannosaurus rex skeletons ever discovered.
Endearingly named "STAN" after the palaeontologist who first found the skeleton's partially unearthed hip bones, the T-rex is an extraordinary surviving specimen from approximately 67 million years ago.
The skeleton comes to auction from the Black Hills Institute in South Dakota, where the T-rex has been displayed and studied for the last two decades and has inspired dozens of academic articles and studies within the paleontological community.
After a meticulous museum-quality re-mounting, STAN the T-rex was unveiled for the public on September 16, 2020, at Christie's Rockefeller Center in New York and offered as a highlight of Christie's Evening Sale of 20th Century Art on October 6 with an estimate of $6-8 million.
James Hyslop, Head of Department, Scientific Instruments, Globes & Natural History, Christie's: "We are honoured to be bringing STAN to auction and to have been entrusted with the stewardship of such an iconic and important T-rex. I'll never forget the moment I came face to face with him for the first time, after his remount in Colorado – he looked even larger and more ferocious than I'd imagined, a specimen that only further establishes the T-rex's position as the King of Dinosaurs."
STAN has been exhibited in a first-of-its-kind extended public preview at Christie's in midtown Manhattan. From September 16 through to October 21, STAN will be fully visible 24 hours a day through Christie's floor-to-ceiling gallery windows from the sidewalk on 49th Street between 5th and 6th Avenues. This special viewing opportunity will offer enthusiasts and pedestrians alike the chance to see and learn about one of the world's most iconic dinosaurs in a socially distanced setting. A limited number of in-gallery viewings will be available by appointment through Christie's booking system, which may be requested by emailing trex@christies.com.
Related educational content will be made available via QR codes, which may be easily found from outside and inside the galleries. Both modes of viewing will be subject to all local public health guidelines and with all necessary measures to protect our visitors and our staff in place.
MORE ABOUT STAN THE T-REX
The enormous scale of STAN's skeleton – 13 feet high and 40 feet long with the tail outstretched – demonstrates the behemoth size of the Tyrannosaurus rex. With 188 original bones, STAN is one of the largest and most complete specimens known to exist.
Consistent with the skeleton, STAN's skull is one of the most complete T-rex examples known to science and could hold as many as 58 functioning teeth. With eyes the size of baseballs, STAN would have boasted keen vision for hunting his chosen prey.
The first bones from the skeleton were discovered in the spring of 1987 by amateur palaeontologist Stan Sacrison on privately owned land in the Hell Creek Formation, part of a sprawling geological area known as the Cretaceous Badlands, spanning large areas of North and South Dakota, Wyoming and Montana.
In the course of his search, Sacrison discovered dinosaur hip bones weathering out of the ground. The fossils were originally misidentified by a vertebrate palaeontologist as belonging to the more commonly found Triceratops.
As a result, the remains lay undisturbed for another five years until 1992, when palaeontologists from the Black Hills Institute of Geological Research returned to see the "Triceratops." The emerging bones were immediately recognized as T-rex in origin, and three months later, a thorough professional excavation ensued with the landowner's consent.
In order to be excavated safely, each individual bone from the skeleton had to be carefully removed from the host rock, cleaned, preserved, restored and recorded. Following more than 30,000 hours of manual labour, the near-complete male fossil skeleton in a remarkable state of preservation was pieced together.
The state of the fossilized bones indicates STAN suffered a broken neck during his lifetime and survived. In the process of healing, two of his vertebrae bonded together, while a third vertebra became immobilized by additional bone growth. Pathologies show evidence of injury or disease that the animal withstood during its life. One of STAN's ribs exhibits a puncture wound that may have been inflicted by another T-rex.
For more than two decades, STAN has held a unique celebrity status; upon returning from a tour of Japan in 1995-1996, the skeleton was re-installed at the museum for the Black Hills Institute for public viewing. Casts of STAN's skeleton have been produced for dozens of science and natural history museums across the Americas, Europe and Asia.
More than fifty Tyrannosaurus rex skeletons have been discovered since 1902, with the majority housed in natural history museums and paleontological institutions throughout the world.
The appearance of a T-rex skeleton at auction is a significant event, made all the more special with a specimen as well-preserved and well-documented as STAN. The October 6 sale marks a rare opportunity for a collector, institution, or museum benefactor to acquire the extraordinary fossil skeleton of the celebrated King of the Dinosaurs.
Facts About STAN The T-Rex At A Glance:
At his largest, STAN would have boasted a body mass between 7 and 8 tons – twice as heavy as a modern African elephant.
STAN's immediately recognizable and enormous skull is surmounted by an aquiline snout that housed an intricate system of blood vessels, functioning as a giant biological air conditioner in the hot Cretaceous landscape.
The longest of STAN's teeth measures more than 11 inches.
Each tooth has serrated edges which could crush and slice straight through the flesh and bone of its prey.
In 2005, STAN's skull was modelled and tested to recreate a bite force of four tons per square inch – easily enough to crush a car.
STAN would have hatched from a large, elongated egg much like a modern bird, defenceless and – according to recent scientific research – most likely covered in feathers.
STAN's killer instinct was confirmed during the excavation of his skeleton in 1992 when he was found with the fossilized and partially digested remains of an Edmontosaurus vertebra and a partial Triceratops tibia. These bones each had bite marks, revealing how a T-rex could hunt, kill, and devour even the largest and well-armoured herbivores.
With vicious puncture wounds to his skull that a T-rex tooth would neatly fit into, STAN himself was a wounded warrior who most likely suffered and survived attacks by his own species.
A group of Tyrannosaurs is aptly known as a 'terror'.
The legendary T-rex is a 20th-century cultural phenomenon. The 'debut' of a T-rex on-screen came just 15 years after the first of the species was first described by science, with the American production Ghost of Slumber Mountain (1918). Further representations of the T-rex can be found horrifying human explorers in The Lost World (1925), battling the eponymous great ape in King Kong (1933), and terrorizing park-goers in the blockbuster Jurassic Park (1993) and Jurassic World (2015) franchises.
Tags: AUCTION, Black Hills Institute, Christies, Colorado, Cretaceous Badlands, Dinosaur, Hell Creek Formation, history, James Hyslop, Japan, Manhattan, Montana, NEW YORK, North Dakota, Rockefeller Center, Sale, South Dakota, Stan Sacrison, The Ghost of Slumber Mountain, Triceratops, Tyrannosaurus Rex, United States, Wyoming
Christie's, the world's leading art business, had auction sales in the first half of 2019 that totalled £2.2 billion / $2.8 billion. Christie's is a name and place that speaks of extraordinary art, unparalleled service and international expertise. Christie's offers around 350 auctions annually in over 80 categories, including all areas of fine and decorative arts, jewellery, photographs, collectables, wine, and more. Prices range from $200 to over $100 million. Christie's also has a long and successful history conducting private sales for its clients in all categories, with emphasis on Post-War & Contemporary, Impressionist & Modern, Old Masters and Jewellery.
Rolls-Royce Reveals New Ghost Extended
Yolancris Ushers In A New Generation Of Brides
Christies October 5, 2020
Sothebys January 19, 2021
Rolls-Royce January 16, 2021
Christies January 15, 2021


According to the statistics available with the Pune municipal corporation (PMC), out of the four rabies deaths reported in the city this year, two have been recorded in the month of June while the other two have been recorded in the month of March and April each.
Cases of deaths due to rabies has reached four in the past six months, making dog bite a serious concern for residents of Pune.
On June 23, a Class 10 student from Karjat taluka died of rabies after he failed to get the necessary rabies immunoglobulins (antibodies) at a private hospital and a primary heath centre in his village where he was seeking treatment. The boy was later brought to Naidu Hospital in Pune where he died as he had not been administered the vaccine and antibodies at the rural level as was the requirement.
In March this year, a six-year-old boy too died after an attack by stray dogs. The child was rushed to a private hospital in Maan, but he did not get the required treatment at the said hospital and was sent to the Yashwantrao Chavan Memorial Hospital (YCMH) in Pimpri.
According to officials from PMC's health department, so far in six months, a total of 4,641 cases of dog bites have been recorded. The total rabies cases recorded in these six months has been four and deaths due to rabies recorded so far in the city have also been four.
In 2017, the total cases of dog bites recorded in Pune were 9,387 while cases of rabies were 12. According to officials, death due to rabies last year were 10.
Understanding the growing issue of dog bites, residents too have been worried and have demanded action from the PMC.
When contacted, Anjali Sabne, assistant health chief, PMC, said, "We have ensured that all hospitals and dispensaries have the anti rabies vaccine. We have also ensured that the nurses are able to administer this vaccine. Apart from this, rabies immunoglobulins are available at the Naidu Hospital and Kamla Nehru Hospital. Rabies immunoglobulins are only required in certain cases and according to the categorisation and not for all rabies-affected patients."


The parties have launched general election campaigns. The selection of candidates are also going on but names will be declared after the notification of election by the Election Commission.
It appears that in some states like Gujarat, Rajasthan, Madhya Pradesh, Chhattisgarh, Karnataka, Goa, Arunachal Pradesh, Kerala, Puducherry, Uttarakhand, Punjab, Haryana, Hamachal Pradesh and Tripura the contest will be between the two national parties the ruling Bhartiya Janata Party and the Congress. The situation in Jammu-Kashmir is typical with unusual factors.
But in Andhra, Telangana, Tamil Nadu, Odisha, West Bengal and Bihar the regional parties Trinamool Congress in West Bengal, Janata Dal United and Rashtriya Janata Dal in Bihar, Biju Janata Dal in Odisha, Telegu Desam in Andhra Pradesh and TRS in Telangana are the ruling parties.
Evidently they know that they alone cannot form Government at the Centre but must have enough member in the Lok Sabha to extend support to any national party who can form the Government and share power on that basis.
In Punjab and Maharashtra the Bhartiya Janata Party is closely linked with Akali Dal and Shiv Sena.In Punjab the BJP and Akali Dal have cordial relations. But in Maharashtra the Shiv Sena despite being partner in the coalition Government in the state want to maintain its political supremacy. The Shiv Sena has declared that it may go alone in the Lok Sabha elections.
In Uttar Pradesh the political situation is very complex. The state with highest number of seats 80 is a very vital factor in becoming ruling party at Centre. Presently the BJP has massive 73 seats including Prime Minister Mr.Narendra Modi from Varanasi, the Samajwadi Party five, the Congress two that of Congress President Mr.Rahul Gandhi from Amethi and Mrs. Sonia Gandhi from Rai Barailli. The BSP of Mayawati is zero.
In BJP is also a ruling party in UP with Yogi Adityanath as Chief Minister. The SP-BSP have formed joint front and divided 78 seats among it leaving 2 Congress seats in their own and one side decision. In UP the contest is going to be triangular in all seats between the BJP – the Congress and SP-BSP Front.
The BJP President Mr.Amit Shah and Congress President Mr.Rahul Gandhi both have announced that their party will contest alone in UP.
The Congress after winning back the power in Punjab, Rajasthan, Madhya Pradesh and Chhattisgarh is in a high spirit and showed that people are coming back to Congress. The BJP is in alarming situation over losing power in these three states and highly worried over its worst defeat in 2 Lok Sabha by-elections in Gorakhpur and Phulpur vacated by Yogi Adityanath and Mr.Keshav Prasd Mourya on becoming as being Chief Minister and Deputy Chief Minister. These defeats have indicated that BJP has lost much ground in the UP.


The history of our assembly venues goes back 110 years, to the opening of the Milwaukee Auditorium, now the Miller High Life Theatre, in 1909 (and even longer in previous facilities on the same site!). In that time, under various names, our buildings have hosted an endless variety of concert, theatrical, sporting, political, religious and corporate events, convention assemblies, graduations and much more. Below is an incomplete list of the more-or-less public events that have been held in our facilities since 1909.
If you know of (and can substantiate) any events not listed below, we'd love to hear from you! Please send a readable fax, photocopy or scan of your ticket, playbill, program, poster, review, ad or other documentation. Do not send original materials; they will not be returned. Send your documentation to ATTENTION: EVENT LIST. You can fax it to 414-908-6010, email a scan to boxoffice@wcd.org, or mail a photocopy to Wisconsin Center District, 400 W. Wisconsin Avenue, Milwaukee, WI 53203.
Dates are U.S. style. Some "milestone" events are in bold. Presidential speeches include links to text where available.
UW-Milwaukee Panthers Men's Basketball Team (home) AR 199?-199?


Islamic Renaissance Party leader Muhiddin Kabiri speaks at a party conference in December 2014.
Supreme Court Chairman Shermuhammadi Shohiyon told reporters on February 1 that Muhiddin Kabiri's trial "is taking place in secret."
Charges against Kabiri include terrorism and involvement in what the government says was an armed attempt to seize power, led by a mutinous general, in September 2015.
Kabiri, who is in self-imposed exile abroad, denies any wrongdoing or involvement in the violence.
The Supreme Court branded the IRPT a "terrorist organization" and outlawed it later in September 2015, following the violence months of government pressure on the party members.
Kabiri, 52, became the head of the IRPT in 2006 and was elected twice to parliament in the Central Asian country. He left the country shortly after his party lost its two parliamentary seats in March 2015 elections.
In 2017, Tajikistan amended legislation to let courts try and sentence suspects in absentia. Last week, a court in the southern Khatlon Province said it sentenced a former IRPT official to 15 years in prison after a trial in absentia.
Human rights groups have condemned Tajikistan's treatment of the IRPT and its former leaders.


← Editorial | Seek the Geek!
Throughout my travels, I have had the chance to visit comic shops in many different places. I have come to realize that while every store has its good and bad qualities, they tend to fall into five categories: the back issue store, the graphic novel store, the hangout store, the mega store, and the scary store.
The back issue store—or traditional store—is the stereotypical comic book store. Typically these stores are filled with long and short boxes of older comics. More recent ones tend to be easily accessible on shelves or racks of some kind.
Usually these stores have a selection of "wall books" as well. Wall books are books of higher value that are displayed prominently on a wall somewhere, often (though not always) behind the counter.
These are not behind the counter, as you can see.
I usually can't afford wall books, but they are always fun to look at. It's great to see the different books from comic history. Frequently after looking at the wall, I've gone home and Googled certain books to find out what makes them special enough to go on the wall. Because there are so many back issues, the issues aren't usually priced in advance.
Books in these stores are either in price marked boxes (dollar bins, etc) or priced out at the register.
Free space taken up with cool displays.
The graphic novel store is one of the most useful ones for people who are new to comics or are on a budget. These stores typically have book cases filled with graphic novels from various publishers.
Methods of organization vary from store to store, but generally the stores are pretty good about keeping things in some semblance of order. Stores will usually have the most recent week's comics and a few months of back issues, but not much more than that.
Normally graphic novel stores have significant selection as well, including non-superhero stuff, which is great for people who are interested in the medium but not in capes.
On more than one occasion we at Therefore I Geek have talked about how important it is for geeks to socialize with one another. The hangout store is an ideal place to do this socializing. Here it is guaranteed that most, if not all, of the people share your geek interests. Usually these stores have several tables and chairs that people use for gaming and just general socializing.
Tables for gaming and general hanging out.
A select few of these stores consider themselves reading stores in which you can sit down and read the comics before you buy them. This kind of stores allows you to check out books, moments after you find out they exist and then turn right back around and discuss them. Almost nightly there will be some kind of event going on, whether it be Magic: the Gathering, board games, or miniature gaming. For the geek moving to a new area, this is a great place to start making geeky friends.
Those are some comfy chairs. I can personally testify to this.
I was very lucky (spoiled really) to start reading comics while going to college in New York City. Not only does NYC have a plethora of good comic book stores, they also have Midtown Comics. Stores like Midtown are comic mega stores, which encompass most aspects of the three types of stores I've already talked about. They have huge selections of back issues, graphic novels, and other comic book paraphernalia. Often times these stores have more than one location. This is useful because if one store doesn't have what you're looking for, it's possible that one of the other locations does. The size of the store also means that they often have better infrastructure and organization so finding things is easier and prices are usually clearly marked. The downside of stores this size is that there is the potential for customers to get lost in a crowd and not get to develop a more personal relationship with the owner, such as at smaller stores.
Lastly there is the scary store. These are the comic book stores from which stereotypes are derived. Often times they have a dungeon-like feel to them, and some smell of mold or cat urine (Why do so many stores have cats?). Poorly lit and generally unpleasant, these stores either have very little regard for the goods that they sell and treat them badly, or value them far too highly and grossly overcharge people who don't know any better (I've fallen victim to this more than once). Not all scary stores are that way because of physical conditions either. Some fall into this category due to the people who run the store. They are rude, not helpful, or downright creepy. The rudeness is almost worse because what could otherwise be a great store is ruined by one or two bad people. The only true redeeming quality these stores have is that people don't often go in them and so they frequently have stuff that is hard to find or out of print. I know of one particular store that I can go into and find almost anything I'm looking for, if I'm willing to suffer through the experience.
The reality is that not all comic book stores are made equal, and that's okay. Not all stores fit into these exact molds. Sometimes stores combine one or more of these traits. The key is finding the store or stores that are best for you. Rarely will you find everything you want in one store, but don't lose hope. New stores are opening all the time, each one a bit different, with their own unique qualities. If you don't see what you're looking for, many stores also are willing to special order stuff for you if they don't have it in stock, so long as it is in print, or at least available from Diamond. Get out there and take a look. You never know what treasures might be hidden in some store you didn't know existed.


Today I'm up to nothing difficult again. All that's needed for this DIY are glass ornaments and twigs of your favorite greenery. First, cut them to size.
For day three I decided to go with decorated glass ornaments. Perhaps you also have a tinsel garland at home that you used to like but it's just not up your alley anymore.


Our client is an advertising firm seeking to recruit an individual who will ensure the client is perfectly satisfied, loyal and profitable. The person is supposed to maintain contact with top managers regularly, providing planning disciplines and setting examples. They should enhance the business by maximising revenue and optimising staff productivity.
If you are up to the challenge, possess the necessary qualification and experience; please send your CV only quoting the job title on the email subject (Director – Client Service) to vacancies@corporatestaffing.co.ke before 18th February 2019.


Ref. LMC1481 - In the heart of the Carré d'Or, located in one of the finest residential buildings in Monaco with concierge, indoor pool, sauna and a fitness room, this beautifully furnished apartment is the perfect turn-key property.
Moments from the famed Casino Square and the surrounding luxury shops, restaurants and hotels, this is the ideal property to experience the best of what the Principality has to offer.
A spacious living room and dining room lead to a large terrace boasting views of the sea and of the Casino, perfect for entertaining on warm summer evenings. The apartment offers an abundance of living space with 2 elegant bright bedrooms each with their en-suite bathroom and walk-in closets. High end appliances and furnishings can be found throughout the apartment.
The property has been impeccably renovated with exquisite style and the finest materials to be elegant and luxurious yet comfortable and inviting.
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So, you desire to improve your house in order for it to look beautiful? This is a very popular topic for homeowners everywhere. First, it is essential that you learn the basics that are common to many do it yourself projects. If you don't know enough, the article below can surely help you.
Clean the filter of your air conditioning as clean as possible. A dirty AC filter causes your air conditioner to work inefficiently and consume more energy. It can make it run longer than it needs to, as well. To prevent a buildup of dust and debris, change the AC or furnace filter monthly.
When you are considering home projects, be creative and think about what you aim to accomplish. Getting the preparation out of the way will allow you to place your focus on the work in progress when the time comes. There are numerous sources of inspiration for your next home improvement project.
A crazy addition will add some pizazz to your house. You could for instance create a wine cellar, a library or a shelving. These kinds of exceptional additions will improve your home's resale value and also really impress guests whenever you invite company over.
Use a unique container for a coffee table instead of a regular table. You can use an old chest as a coffee table, for instance. You can throw things in it as well. Put some high-brow magazines, coffee table books, and interesting decorations like geodes on the table to spice it up. If you want a country style, add a tablecloth and a tea set.
Getting your ceilings to seem taller then they are is possible by employing two easy methods. Paint your walls or add a floor lamp. Adding this to your rooms will create an optical illusion for your eye to follow. As your eyes focus on the length of the lines, the ceiling will appear to be much higher than it actually is.
You now have some great information on how to improve your home. The hardest part is out of the way. Now the fun can begin. The goal of the tips above are to help you out in any type of home improvement project you're trying to take on. As with anything in life, information is the key to doing a proper job. If you need additional help, read the article once again.
General coffee table, improvement project. permalink.


Top celebrities, entrepreneurs, and industry experts reveal their success secrets and share positive advice from in and around Las Vegas.
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The show is produced by VegasNET Media LLC under the leadership of the happily married dynamic duo of Maria Ngo and Ray DuGray. In addition to managing a diverse team of new media specialists, Maria and Ray serve as the executive producers, directors, co-hosts, and creative force behind the premium quality short-form media productions.
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The Best of Japan Awaits May Mega Week Winners
Updated: Friday 27th September 2019
EuroMillions players in the UK could soon be planning a once-in-a-lifetime trip to Japan thanks to three such prizes being up for grabs in each of the Mega Week Millionaire Maker draws on Tuesday 23 and Friday 26 May. As usual, each Millionaire Maker winner will also receive a cash prize of £1 million so, after enjoying their Japanese experience, they will be in the enviable position of returning home with a seven-figure bank balance at their disposal.
Each holiday package, which is for the winner and one guest, will begin with luxury transfers to the nearest international airport which flies to Tokyo Haneda Airport. The flights will be business class, and transfers will then be provided from the airport to the five-star Ritz-Carlton Hotel in Tokyo, where the winners will stay for five nights.
Whilst in Tokyo, the winner and guest will enjoy a number of activities and entertainments, including a Sumo wrestler lunch, a stretch limousine tour of the capital, a meal at Sky Restaurant 634, and a day trip to Mount Fuji or Tokyo Disneyland.
The winners will then spend five nights at the five-star Ritz-Carlton Hotel in Kyoto. Again, there will be plenty of entertainment and activities to experience here, including a private Geisha dinner and a boat trip.
The final four nights of the trip will be spent at the Ritz-Carlton Hotel in Osaka. Winners will enjoy a private street food tour, a meal at Hajime, Osaka, and a visit to the Osaka Aquarium Kaiyukan.
It is difficult to imagine anyone not wanting to experience all of this, but any winner who would prefer to take a cash alternative can opt to do so, in which case the sum on offer would be £54,120.
All you need to do to stand a chance of winning yourself a luxury trip to Japan is make sure you enter the Mega Week EuroMillions games on Tuesday 23 and Friday 26 May. In the meantime, you can also have a go at winning enough to fund your own luxury trip in the EuroMillions game this Tuesday 9 May. The jackpot will be worth an estimated £68 million, which should be enough to fund the ambitions of even the most dedicated traveller, so visit the EuroMillions Statistics page if you'd like some inspiration for your numbers, and remember to let us know if you win big!
You can choose your EuroMillions numbers online ahead of every draw.
Published: Monday 8th May 2017
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