text:
Q: migration issue, django.core.exceptions.FieldDoesNotExist: lightspeed.inventoryimagehistory has no field named 'imageID' I'm having issues with this Django project, when I try to run migrations got the following message:
django.core.exceptions.FieldDoesNotExist: InventoryImageHistory has no field named 'InventoryImageID'

this is the class for InventoryImageHistory
class InventoryImageHistory(models.Model):
ImageID = models.IntegerField(db_index=True, unique=True, null=False, primary_key=True)
history = ListField(DictField())
objects = models.DjongoManager()

these are the migration files:

migration file number 40:
class Migration(migrations.Migration):

    operations = [
        migrations.RenameField(
            model_name='inventoryimagehistory',
            old_name='InventoryImageID',
            new_name='imageID',
        ),

De model definition is InventoryImageHistory, but for some reason, it keeps returning an error

A: Well, a few minutes after I posted my comment I seem to have fixed it. It was because I had initially put the RenameField in the previous (not yet committed to repo, but already applied) migration, and even though that one had been applied, Django seems to parse all of the dependency migrations logically and decided that the rename had already happened.

A: This message might have to do with the fact you faked/manipulated some migrations in that app recently.
What I do when this pops up is to:

*

*Create another change in that models.py file (i.e.: add an extra field to the model).

*Run the migration

*Do the change I wanted to do in the first place that triggered the error and run the migration (hopefully successfully this time)

*Undo the change I added on 1. and run migrations again.

redpajama_set_name: RedPajamaStackExchange


text:
Campaign launch to save dogs from hot cars
Thursday 22nd June 2017 4:30 pm
JONATHAN Theobald's dogs perished after being shut inside a car while their owner went to the gym.
The RSPCA has released a hard-hitting video in a bid to reach pet owners across the country and raise awareness of the dangers of leaving pets in cars on warm days.
The UK's largest and oldest animal welfare charity is launching its annual Dogs Die in Hot Cars campaign – a campaign backed and endorsed by 11 other charities, organisations and bodies – with a heartbreaking video of a man who was prosecuted by the charity for leaving his three dogs in his car while he went to the gym. All three dogs died.
In the video, Mr Theobald talks about the devastating impact the split-second decision to leave the trio in the car has had on his life and that of his family since that fateful day almost a year ago.
"I got it badly wrong," he said. "I misjudged the weather very badly."
It was a warm day on June 16 last year, but it was overcast and wasn't particularly hot. Mr Theobald, 66, drove to his local gym in Peterborough, Cambridgeshire, and went inside for his workout.
He left his three Staffordshire bull terrier crosses Daisy, Rascal and Mitch in the car for more than four hours.
When he returned to his Volkswagen estate, two of his dogs were already dead from heat exposure and he spent 30 minutes desperately trying to revive Daisy before she too finally succumbed to the heat.
Other gym users contacted the police and a vet and officers later found a devastated Mr Theobald at his home address with the dogs still inside the car and called in the RSPCA to investigate.
Last September, Mr Theobald was sentenced at Peterborough Magistrates' Court to an 18-week prison sentence suspended for two years. He was also disqualified from keeping animals for 10 years and ordered to pay £1,900 in fines and costs. He'd previously pleaded guilty to one offence of causing unnecessary suffering to Daisy, Rascal and Mitch by confining the animals in an environment which was detrimental to their well-being and led to their death.
Speaking in the video, Mr Theobald says: "I've been prosecuted, I've been banned from keeping dogs, [and there's been] ferocious publicity, but really that's just rubbing salt in the wounds. I'm not saying I don't deserve that but the main hurt is losing the dogs in the first place."
New figures, released to highlight the campaign reveal that thousands of people are still making the same mistake each year.
In 2016, the RSPCA's emergency hotline received 7,187 calls about animals in hot environments – the majority of which regarded dogs. While down from the previous year (8,779), the number is still worryingly high considering the charity's key advice is for people to call 999.
RSPCA inspector Justin Stubbs, who investigated Daisy, Rascal and Mitch's deaths, said: "It's staggering to think that more than 7,000 people called us last year due to concerns about animals in the heat and most of these will have been dogs left in cars.
"Our message has been loud and clear for years: don't leave dogs alone in parked cars on warm days. And while it's reassuring that this message seems to be getting through to some people, ultimately we'd like this number to drop to zero."

redpajama_set_name: RedPajamaCommonCrawl


text:
Home News Ex-Aston Villa Striker John Carew is Jailed For 14 Months For Tax...
Ex-Aston Villa Striker John Carew is Jailed For 14 Months For Tax Evasion
Former Aston Villa footballer, John Carew has been jailed for 14 months for tax evasion crimes, after unintentionally failing to disclose his income at the Oslo District Court.
Carew, 43, was also hit with a hefty fine of £45,353 (540,000 NOK) for tax fraud totaling £456,264 (5.4million NOK) back in his home country of Norway.
Should Carew have acted intentionally in committing tax fraud between 2017 and 2019, prosecutors reportedly believed an appropriate punishment for Carew would have been a prison sentence of around two years and seven months, while his defendants wanted a community punishment.
In the 38-page judgment, the court concluded that Carew acted 'grossly negligently' but believes that it cannot be proven beyond reasonable doubt that the 43-year-old provided incorrect information to the Norwegian tax authorities.
'According to the evidence presented, the court cannot see that there is a cover for Carew's decision not to disclose his income and assets, even if the description of the offence was thereby fulfilled,' district court judge Ingvild Boe Hornburg said in the judgement. 'In the court's view, there is nothing in the evidence that supports such a hypothesis.'
The Norwegian had previously pleaded guilty to fraud charges brought by the Norwegian tax authority, with his defence attorney Berit Reiss-Andersen insisting this case should have been handled as a confession case, given how he admitted to the tax evasion but maintained throughout that he had not committed fraud on purpose.
Carew's lawyer also believes the ruling should be considered a victory.
'This shows that John Carew is believed on all counts,' Berit Reiss-Andersen said in a statement, via Norwegian news outlet E24. 'The court has concluded that he has acted grossly negligently, but not with intent. We have claimed this all along, and Carew has been clear that he has wanted to make amends.'
TRENDING: 'I Feel That Human Rights Law Wasn't Applied to Me' - Saudi Crown Prince Mohammed Bin Salman Says He Was 'the Victim' After US accused Him of Murdering Jamal Khashoggi
The report goes on to claim that neither party have decided whether or not to appeal the judgement.
It also claims a so-called 183-day rule has been used against Carew in his tax evasion case.
The former Norway international himself claimed that his actions were the result of poor advice from friend, lawyer and former agent Per A. Flod.
Carew insists that Flod's advice led him to not disclose income and assets from outside of his home country, claiming he was 'controlled as a puppet'.
'I trusted him blindly,' Carew said. 'I have been convinced that he was right. He controlled me almost like a puppet.
'I understand that it is grossly negligent of me to trust him so much, but that is why I have done it.'
John Carew
Previous articleSouth African Hospital Urgently Request Assistance to Locate Family of Nigerian Man
Next articleTelevision Preacher Sentenced to 8,658 Years Imprisonment in Turkey
Aston Villa Linked With £50Million Transfer For Wilfred Ndidi
Aston Villa Sign Arsenal Defender Calum Chambers on Three-and-a-Half-Year Deal
Aston Villa announce shock signing of Danny Ings from Southampton


text:
#include <gtest/gtest.h>

#include <cpuinfo.h>

TEST(PROCESSORS_COUNT, non_zero) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_NE(0, cpuinfo_get_processors_count());
	cpuinfo_deinitialize();
}

TEST(PROCESSORS, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_TRUE(cpuinfo_get_processors());
	cpuinfo_deinitialize();
}

TEST(PROCESSOR, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
		EXPECT_TRUE(cpuinfo_get_processor(i));
	}
	cpuinfo_deinitialize();
}

TEST(PROCESSOR, valid_smt_id) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
		const cpuinfo_processor* processor = cpuinfo_get_processor(i);
		ASSERT_TRUE(processor);
		const cpuinfo_core* core = processor->core;
		ASSERT_TRUE(core);

		EXPECT_LT(processor->smt_id, core->processor_count);
	}
	cpuinfo_deinitialize();
}

TEST(PROCESSOR, valid_core) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
		const cpuinfo_processor* processor = cpuinfo_get_processor(i);
		ASSERT_TRUE(processor);

		EXPECT_TRUE(processor->core);
	}
	cpuinfo_deinitialize();
}

TEST(PROCESSOR, consistent_core) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
		const cpuinfo_processor* processor = cpuinfo_get_processor(i);
		ASSERT_TRUE(processor);
		const cpuinfo_core* core = processor->core;
		ASSERT_TRUE(core);

		EXPECT_GE(i, core->processor_start);
		EXPECT_LT(i, core->processor_start + core->processor_count);
	}
	cpuinfo_deinitialize();
}

TEST(PROCESSOR, valid_cluster) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
		const cpuinfo_processor* processor = cpuinfo_get_processor(i);
		ASSERT_TRUE(processor);

		EXPECT_TRUE(processor->cluster);
	}
	cpuinfo_deinitialize();
}

TEST(PROCESSOR, consistent_cluster) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
		const cpuinfo_processor* processor = cpuinfo_get_processor(i);
		ASSERT_TRUE(processor);
		const cpuinfo_cluster* cluster = processor->cluster;
		ASSERT_TRUE(cluster);

		EXPECT_GE(i, cluster->processor_start);
		EXPECT_LT(i, cluster->processor_start + cluster->processor_count);
	}
	cpuinfo_deinitialize();
}

TEST(PROCESSOR, valid_package) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
		const cpuinfo_processor* processor = cpuinfo_get_processor(i);
		ASSERT_TRUE(processor);

		EXPECT_TRUE(processor->package);
	}
	cpuinfo_deinitialize();
}

TEST(PROCESSOR, consistent_package) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
		const cpuinfo_processor* processor = cpuinfo_get_processor(i);
		ASSERT_TRUE(processor);
		const cpuinfo_package* package = processor->package;
		ASSERT_TRUE(package);

		EXPECT_GE(i, package->processor_start);
		EXPECT_LT(i, package->processor_start + package->processor_count);
	}
	cpuinfo_deinitialize();
}

TEST(PROCESSOR, consistent_l1i) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
		const cpuinfo_processor* processor = cpuinfo_get_processor(i);
		ASSERT_TRUE(processor);
		const cpuinfo_cache* l1i = processor->cache.l1i;
		if (l1i != nullptr) {
			EXPECT_GE(i, l1i->processor_start);
			EXPECT_LT(i, l1i->processor_start + l1i->processor_count);
		}
	}
	cpuinfo_deinitialize();
}

TEST(PROCESSOR, consistent_l1d) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
		const cpuinfo_processor* processor = cpuinfo_get_processor(i);
		ASSERT_TRUE(processor);
		const cpuinfo_cache* l1d = processor->cache.l1d;
		if (l1d != nullptr) {
			EXPECT_GE(i, l1d->processor_start);
			EXPECT_LT(i, l1d->processor_start + l1d->processor_count);
		}
	}
	cpuinfo_deinitialize();
}

TEST(PROCESSOR, consistent_l2) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
		const cpuinfo_processor* processor = cpuinfo_get_processor(i);
		ASSERT_TRUE(processor);
		const cpuinfo_cache* l2 = processor->cache.l2;
		if (l2 != nullptr) {
			EXPECT_GE(i, l2->processor_start);
			EXPECT_LT(i, l2->processor_start + l2->processor_count);
		}
	}
	cpuinfo_deinitialize();
}

TEST(PROCESSOR, consistent_l3) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
		const cpuinfo_processor* processor = cpuinfo_get_processor(i);
		ASSERT_TRUE(processor);
		const cpuinfo_cache* l3 = processor->cache.l3;
		if (l3 != nullptr) {
			EXPECT_GE(i, l3->processor_start);
			EXPECT_LT(i, l3->processor_start + l3->processor_count);
		}
	}
	cpuinfo_deinitialize();
}

TEST(PROCESSOR, consistent_l4) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
		const cpuinfo_processor* processor = cpuinfo_get_processor(i);
		ASSERT_TRUE(processor);
		const cpuinfo_cache* l4 = processor->cache.l4;
		if (l4 != nullptr) {
			EXPECT_GE(i, l4->processor_start);
			EXPECT_LT(i, l4->processor_start + l4->processor_count);
		}
	}
	cpuinfo_deinitialize();
}

TEST(CORES_COUNT, within_bounds) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_NE(0, cpuinfo_get_cores_count());
	EXPECT_LE(cpuinfo_get_cores_count(), cpuinfo_get_processors_count());
	EXPECT_GE(cpuinfo_get_cores_count(), cpuinfo_get_packages_count());
	cpuinfo_deinitialize();
}

TEST(CORES, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_TRUE(cpuinfo_get_cores());
	cpuinfo_deinitialize();
}

TEST(CORE, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
		EXPECT_TRUE(cpuinfo_get_core(i));
	}
	cpuinfo_deinitialize();
}

TEST(CORE, non_zero_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
		const cpuinfo_core* core = cpuinfo_get_core(i);
		ASSERT_TRUE(core);

		EXPECT_NE(0, core->processor_count);
	}
	cpuinfo_deinitialize();
}

TEST(CORE, consistent_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
		const cpuinfo_core* core = cpuinfo_get_core(i);
		ASSERT_TRUE(core);

		for (uint32_t i = 0; i < core->processor_count; i++) {
			const cpuinfo_processor* processor = cpuinfo_get_processor(core->processor_start + i);
			ASSERT_TRUE(processor);

			EXPECT_EQ(core, processor->core);
		}
	}
	cpuinfo_deinitialize();
}

TEST(CORE, valid_core_id) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
		const cpuinfo_core* core = cpuinfo_get_core(i);
		ASSERT_TRUE(core);
		const cpuinfo_package* package = core->package;
		ASSERT_TRUE(package);

		EXPECT_LT(core->core_id, package->core_count);
	}
	cpuinfo_deinitialize();
}

TEST(CORE, valid_cluster) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
		const cpuinfo_core* core = cpuinfo_get_core(i);
		ASSERT_TRUE(core);

		EXPECT_TRUE(core->cluster);
	}
	cpuinfo_deinitialize();
}

TEST(CORE, consistent_cluster) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
		const cpuinfo_core* core = cpuinfo_get_core(i);
		ASSERT_TRUE(core);
		const cpuinfo_cluster* cluster = core->cluster;
		ASSERT_TRUE(cluster);

		EXPECT_GE(i, cluster->core_start);
		EXPECT_LT(i, cluster->core_start + cluster->core_count);
	}
	cpuinfo_deinitialize();
}

TEST(CORE, valid_package) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
		const cpuinfo_core* core = cpuinfo_get_core(i);
		ASSERT_TRUE(core);

		EXPECT_TRUE(core->package);
	}
	cpuinfo_deinitialize();
}

TEST(CORE, consistent_package) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
		const cpuinfo_core* core = cpuinfo_get_core(i);
		ASSERT_TRUE(core);
		const cpuinfo_package* package = core->package;
		ASSERT_TRUE(package);

		EXPECT_GE(i, package->core_start);
		EXPECT_LT(i, package->core_start + package->core_count);
	}
	cpuinfo_deinitialize();
}

TEST(CORE, known_vendor) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
		const cpuinfo_core* core = cpuinfo_get_core(i);
		ASSERT_TRUE(core);

		EXPECT_NE(cpuinfo_vendor_unknown, core->vendor);
	}
	cpuinfo_deinitialize();
}

TEST(CORE, known_uarch) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
		const cpuinfo_core* core = cpuinfo_get_core(i);
		ASSERT_TRUE(core);

		EXPECT_NE(cpuinfo_uarch_unknown, core->uarch);
	}
	cpuinfo_deinitialize();
}

TEST(CLUSTERS_COUNT, within_bounds) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_NE(0, cpuinfo_get_clusters_count());
	EXPECT_LE(cpuinfo_get_clusters_count(), cpuinfo_get_cores_count());
	EXPECT_LE(cpuinfo_get_clusters_count(), cpuinfo_get_processors_count());
	EXPECT_GE(cpuinfo_get_clusters_count(), cpuinfo_get_packages_count());
	cpuinfo_deinitialize();
}

TEST(CLUSTERS, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_TRUE(cpuinfo_get_clusters());
	cpuinfo_deinitialize();
}

TEST(CLUSTER, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		EXPECT_TRUE(cpuinfo_get_cluster(i));
	}
	cpuinfo_deinitialize();
}

TEST(CLUSTER, non_zero_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);

		EXPECT_NE(0, cluster->processor_count);
	}
	cpuinfo_deinitialize();
}

TEST(CLUSTER, valid_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);

		EXPECT_LT(cluster->processor_start, cpuinfo_get_processors_count());
		EXPECT_LE(cluster->processor_start + cluster->processor_count, cpuinfo_get_processors_count());
	}
	cpuinfo_deinitialize();
}

TEST(CLUSTER, consistent_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);

		for (uint32_t j = 0; j < cluster->processor_count; j++) {
			const cpuinfo_processor* processor = cpuinfo_get_processor(cluster->processor_start + j);
			EXPECT_EQ(cluster, processor->cluster);
		}
	}
	cpuinfo_deinitialize();
}

TEST(CLUSTER, non_zero_cores) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);

		EXPECT_NE(0, cluster->core_count);
	}
	cpuinfo_deinitialize();
}

TEST(CLUSTER, valid_cores) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);

		EXPECT_LT(cluster->core_start, cpuinfo_get_cores_count());
		EXPECT_LE(cluster->core_start + cluster->core_count, cpuinfo_get_cores_count());
	}
	cpuinfo_deinitialize();
}

TEST(CLUSTER, consistent_cores) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);

		for (uint32_t j = 0; j < cluster->core_count; j++) {
			const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j);
			ASSERT_TRUE(core);

			EXPECT_EQ(cluster, core->cluster);
		}
	}
	cpuinfo_deinitialize();
}

TEST(CLUSTER, valid_cluster_id) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);

		for (uint32_t j = 0; j < cluster->core_count; j++) {
			const cpuinfo_package* package = cluster->package;
			ASSERT_TRUE(package);

			EXPECT_LT(cluster->cluster_id, package->cluster_count);
		}
	}
	cpuinfo_deinitialize();
}

TEST(CLUSTER, valid_package) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);

		EXPECT_TRUE(cluster->package);
	}
	cpuinfo_deinitialize();
}

TEST(CLUSTER, consistent_package) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);
		const cpuinfo_package* package = cluster->package;
		ASSERT_TRUE(package);

		EXPECT_GE(i, package->cluster_start);
		EXPECT_LT(i, package->cluster_start + package->cluster_count);
	}
	cpuinfo_deinitialize();
}

TEST(CLUSTER, consistent_vendor) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);

		for (uint32_t j = 0; j < cluster->core_count; j++) {
			const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j);
			ASSERT_TRUE(core);

			EXPECT_EQ(cluster->vendor, core->vendor);
		}
	}
	cpuinfo_deinitialize();
}

TEST(CLUSTER, consistent_uarch) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);

		for (uint32_t j = 0; j < cluster->core_count; j++) {
			const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j);
			ASSERT_TRUE(core);

			EXPECT_EQ(cluster->uarch, core->uarch);
		}
	}
	cpuinfo_deinitialize();
}

#if CPUINFO_ARCH_X86 || CPUINFO_ARCH_X86_64
TEST(CLUSTER, consistent_cpuid) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);

		for (uint32_t j = 0; j < cluster->core_count; j++) {
			const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j);
			ASSERT_TRUE(core);

			EXPECT_EQ(cluster->cpuid, core->cpuid);
		}
	}
	cpuinfo_deinitialize();
}
#endif /* CPUINFO_ARCH_X86 || CPUINFO_ARCH_X86_64 */

#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64
TEST(CLUSTER, consistent_midr) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);

		for (uint32_t j = 0; j < cluster->core_count; j++) {
			const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j);
			ASSERT_TRUE(core);

			EXPECT_EQ(cluster->midr, core->midr);
		}
	}
	cpuinfo_deinitialize();
}
#endif /* CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 */

TEST(CLUSTER, consistent_frequency) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
		const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
		ASSERT_TRUE(cluster);

		for (uint32_t j = 0; j < cluster->core_count; j++) {
			const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j);
			ASSERT_TRUE(core);

			EXPECT_EQ(cluster->frequency, core->frequency);
		}
	}
	cpuinfo_deinitialize();
}

TEST(PACKAGES_COUNT, within_bounds) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_NE(0, cpuinfo_get_packages_count());
	EXPECT_LE(cpuinfo_get_packages_count(), cpuinfo_get_cores_count());
	EXPECT_LE(cpuinfo_get_packages_count(), cpuinfo_get_processors_count());
	cpuinfo_deinitialize();
}

TEST(PACKAGES, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_TRUE(cpuinfo_get_packages());
	cpuinfo_deinitialize();
}

TEST(PACKAGE, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
		EXPECT_TRUE(cpuinfo_get_package(i));
	}
	cpuinfo_deinitialize();
}

TEST(PACKAGE, non_zero_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
		const cpuinfo_package* package = cpuinfo_get_package(i);
		ASSERT_TRUE(package);

		EXPECT_NE(0, package->processor_count);
	}
	cpuinfo_deinitialize();
}

TEST(PACKAGE, valid_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
		const cpuinfo_package* package = cpuinfo_get_package(i);
		ASSERT_TRUE(package);

		EXPECT_LT(package->processor_start, cpuinfo_get_processors_count());
		EXPECT_LE(package->processor_start + package->processor_count, cpuinfo_get_processors_count());
	}
	cpuinfo_deinitialize();
}

TEST(PACKAGE, consistent_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
		const cpuinfo_package* package = cpuinfo_get_package(i);
		ASSERT_TRUE(package);

		for (uint32_t j = 0; j < package->processor_count; j++) {
			const cpuinfo_processor* processor = cpuinfo_get_processor(package->processor_start + j);
			ASSERT_TRUE(processor);

			EXPECT_EQ(package, processor->package);
		}
	}
	cpuinfo_deinitialize();
}

TEST(PACKAGE, non_zero_cores) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
		const cpuinfo_package* package = cpuinfo_get_package(i);
		ASSERT_TRUE(package);

		EXPECT_NE(0, package->core_count);
	}
	cpuinfo_deinitialize();
}

TEST(PACKAGE, valid_cores) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
		const cpuinfo_package* package = cpuinfo_get_package(i);
		ASSERT_TRUE(package);

		EXPECT_LT(package->core_start, cpuinfo_get_cores_count());
		EXPECT_LE(package->core_start + package->core_count, cpuinfo_get_cores_count());
	}
	cpuinfo_deinitialize();
}

TEST(PACKAGE, consistent_cores) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
		const cpuinfo_package* package = cpuinfo_get_package(i);
		ASSERT_TRUE(package);

		for (uint32_t j = 0; j < package->core_count; j++) {
			const cpuinfo_core* core = cpuinfo_get_core(package->core_start + j);
			ASSERT_TRUE(core);

			EXPECT_EQ(package, core->package);
		}
	}
	cpuinfo_deinitialize();
}

TEST(PACKAGE, non_zero_clusters) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
		const cpuinfo_package* package = cpuinfo_get_package(i);
		ASSERT_TRUE(package);

		EXPECT_NE(0, package->cluster_count);
	}
	cpuinfo_deinitialize();
}

TEST(PACKAGE, valid_clusters) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
		const cpuinfo_package* package = cpuinfo_get_package(i);
		ASSERT_TRUE(package);

		EXPECT_LT(package->cluster_start, cpuinfo_get_clusters_count());
		EXPECT_LE(package->cluster_start + package->cluster_count, cpuinfo_get_clusters_count());
	}
	cpuinfo_deinitialize();
}

TEST(PACKAGE, consistent_cluster) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
		const cpuinfo_package* package = cpuinfo_get_package(i);
		ASSERT_TRUE(package);

		for (uint32_t j = 0; j < package->cluster_count; j++) {
			const cpuinfo_cluster* cluster = cpuinfo_get_cluster(package->cluster_start + j);
			ASSERT_TRUE(cluster);

			EXPECT_EQ(package, cluster->package);
		}
	}
	cpuinfo_deinitialize();
}

TEST(UARCHS_COUNT, within_bounds) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_NE(0, cpuinfo_get_uarchs_count());
	EXPECT_LE(cpuinfo_get_packages_count(), cpuinfo_get_cores_count());
	EXPECT_LE(cpuinfo_get_packages_count(), cpuinfo_get_processors_count());
	cpuinfo_deinitialize();
}

TEST(UARCHS, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_TRUE(cpuinfo_get_uarchs());
	cpuinfo_deinitialize();
}

TEST(UARCH, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_uarchs_count(); i++) {
		EXPECT_TRUE(cpuinfo_get_uarch(i));
	}
	cpuinfo_deinitialize();
}

TEST(UARCH, non_zero_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_uarchs_count(); i++) {
		const cpuinfo_uarch_info* uarch = cpuinfo_get_uarch(i);
		ASSERT_TRUE(uarch);

		EXPECT_NE(0, uarch->processor_count);
	}
	cpuinfo_deinitialize();
}

TEST(UARCH, valid_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_uarchs_count(); i++) {
		const cpuinfo_uarch_info* uarch = cpuinfo_get_uarch(i);
		ASSERT_TRUE(uarch);

		EXPECT_LE(uarch->processor_count, cpuinfo_get_processors_count());
	}
	cpuinfo_deinitialize();
}

TEST(UARCH, non_zero_cores) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_uarchs_count(); i++) {
		const cpuinfo_uarch_info* uarch = cpuinfo_get_uarch(i);
		ASSERT_TRUE(uarch);

		EXPECT_NE(0, uarch->core_count);
	}
	cpuinfo_deinitialize();
}

TEST(UARCH, valid_cores) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_uarchs_count(); i++) {
		const cpuinfo_uarch_info* uarch = cpuinfo_get_uarch(i);
		ASSERT_TRUE(uarch);

		EXPECT_LE(uarch->core_count, cpuinfo_get_cores_count());
	}
	cpuinfo_deinitialize();
}

TEST(L1I_CACHES_COUNT, within_bounds) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_NE(0, cpuinfo_get_l1i_caches_count());
	EXPECT_LE(cpuinfo_get_l1i_caches_count(), cpuinfo_get_processors_count());
	cpuinfo_deinitialize();
}

TEST(L1I_CACHES, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_TRUE(cpuinfo_get_l1i_caches());
	cpuinfo_deinitialize();
}

TEST(L1I_CACHE, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
		EXPECT_TRUE(cpuinfo_get_l1i_cache(i));
	}
	cpuinfo_deinitialize();
}

TEST(L1I_CACHE, non_zero_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->size);
	}
	cpuinfo_deinitialize();
}

TEST(L1I_CACHE, valid_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_EQ(cache->size,
			cache->associativity * cache->sets * cache->partitions * cache->line_size);
	}
	cpuinfo_deinitialize();
}

TEST(L1I_CACHE, non_zero_associativity) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->associativity);
	}
	cpuinfo_deinitialize();
}

TEST(L1I_CACHE, non_zero_partitions) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->partitions);
	}
	cpuinfo_deinitialize();
}

TEST(L1I_CACHE, non_zero_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->line_size);
	}
	cpuinfo_deinitialize();
}

TEST(L1I_CACHE, power_of_2_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
		ASSERT_TRUE(cache);

		const uint32_t line_size = cache->line_size;
		EXPECT_NE(0, line_size);
		EXPECT_EQ(0, line_size & (line_size - 1));
	}
	cpuinfo_deinitialize();
}

TEST(L1I_CACHE, reasonable_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_GE(cache->line_size, 16);
		EXPECT_LE(cache->line_size, 128);
	}
	cpuinfo_deinitialize();
}

TEST(L1I_CACHE, valid_flags) {
	ASSERT_TRUE(cpuinfo_initialize());

	const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING;
	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_EQ(0, cache->flags & ~valid_flags);
	}
	cpuinfo_deinitialize();
}

TEST(L1I_CACHE, non_inclusive) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(CPUINFO_CACHE_INCLUSIVE, cache->flags & CPUINFO_CACHE_INCLUSIVE);
	}
	cpuinfo_deinitialize();
}

TEST(L1I_CACHE, non_zero_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->processor_count);
	}
	cpuinfo_deinitialize();
}

TEST(L1I_CACHE, valid_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count());
		EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count());
	}
	cpuinfo_deinitialize();
}

TEST(L1I_CACHE, consistent_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
		ASSERT_TRUE(cache);

		for (uint32_t j = 0; j < cache->processor_count; j++) {
			const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j);
			ASSERT_TRUE(processor);

			EXPECT_EQ(cache, processor->cache.l1i);
		}
	}
	cpuinfo_deinitialize();
}

TEST(L1D_CACHES_COUNT, within_bounds) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_NE(0, cpuinfo_get_l1d_caches_count());
	EXPECT_LE(cpuinfo_get_l1d_caches_count(), cpuinfo_get_processors_count());
	cpuinfo_deinitialize();
}

TEST(L1D_CACHES, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_TRUE(cpuinfo_get_l1d_caches());
	cpuinfo_deinitialize();
}

TEST(L1D_CACHE, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
		EXPECT_TRUE(cpuinfo_get_l1d_cache(i));
	}
	cpuinfo_deinitialize();
}

TEST(L1D_CACHE, non_zero_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->size);
	}
	cpuinfo_deinitialize();
}

TEST(L1D_CACHE, valid_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_EQ(cache->size,
			cache->associativity * cache->sets * cache->partitions * cache->line_size);
	}
	cpuinfo_deinitialize();
}

TEST(L1D_CACHE, non_zero_associativity) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->associativity);
	}
	cpuinfo_deinitialize();
}

TEST(L1D_CACHE, non_zero_partitions) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->partitions);
	}
	cpuinfo_deinitialize();
}

TEST(L1D_CACHE, non_zero_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->line_size);
	}
	cpuinfo_deinitialize();
}

TEST(L1D_CACHE, power_of_2_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
		ASSERT_TRUE(cache);

		const uint32_t line_size = cache->line_size;
		EXPECT_NE(0, line_size);
		EXPECT_EQ(0, line_size & (line_size - 1));
	}
	cpuinfo_deinitialize();
}

TEST(L1D_CACHE, reasonable_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_GE(cache->line_size, 16);
		EXPECT_LE(cache->line_size, 128);
	}
	cpuinfo_deinitialize();
}

TEST(L1D_CACHE, valid_flags) {
	ASSERT_TRUE(cpuinfo_initialize());

	const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING;
	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_EQ(0, cache->flags & ~valid_flags);
	}
	cpuinfo_deinitialize();
}

TEST(L1D_CACHE, non_inclusive) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(CPUINFO_CACHE_INCLUSIVE, cache->flags & CPUINFO_CACHE_INCLUSIVE);
	}
	cpuinfo_deinitialize();
}

TEST(L1D_CACHE, non_zero_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->processor_count);
	}
	cpuinfo_deinitialize();
}

TEST(L1D_CACHE, valid_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count());
		EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count());
	}
	cpuinfo_deinitialize();
}

TEST(L1D_CACHE, consistent_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
		ASSERT_TRUE(cache);

		for (uint32_t j = 0; j < cache->processor_count; j++) {
			const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j);
			ASSERT_TRUE(processor);

			EXPECT_EQ(cache, processor->cache.l1d);
		}
	}
	cpuinfo_deinitialize();
}

TEST(L2_CACHES_COUNT, within_bounds) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_NE(0, cpuinfo_get_l2_caches_count());
	EXPECT_LE(cpuinfo_get_l2_caches_count(), cpuinfo_get_processors_count());
	EXPECT_LE(cpuinfo_get_l2_caches_count(), cpuinfo_get_l1d_caches_count());
	EXPECT_LE(cpuinfo_get_l2_caches_count(), cpuinfo_get_l1i_caches_count());
	cpuinfo_deinitialize();
}

TEST(L2_CACHES, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_TRUE(cpuinfo_get_l2_caches());
	cpuinfo_deinitialize();
}

TEST(L2_CACHE, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
		EXPECT_TRUE(cpuinfo_get_l2_cache(i));
	}
	cpuinfo_deinitialize();
}

TEST(L2_CACHE, non_zero_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->size);
	}
	cpuinfo_deinitialize();
}

TEST(L2_CACHE, valid_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_EQ(cache->size,
			cache->associativity * cache->sets * cache->partitions * cache->line_size);
	}
	cpuinfo_deinitialize();
}

TEST(L2_CACHE, non_zero_associativity) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->associativity);
	}
	cpuinfo_deinitialize();
}

TEST(L2_CACHE, non_zero_partitions) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->partitions);
	}
	cpuinfo_deinitialize();
}

TEST(L2_CACHE, non_zero_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->line_size);
	}
	cpuinfo_deinitialize();
}

TEST(L2_CACHE, power_of_2_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
		ASSERT_TRUE(cache);

		const uint32_t line_size = cache->line_size;
		EXPECT_NE(0, line_size);
		EXPECT_EQ(0, line_size & (line_size - 1));
	}
	cpuinfo_deinitialize();
}

TEST(L2_CACHE, reasonable_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_GE(cache->line_size, 16);
		EXPECT_LE(cache->line_size, 128);
	}
	cpuinfo_deinitialize();
}

TEST(L2_CACHE, valid_flags) {
	ASSERT_TRUE(cpuinfo_initialize());

	const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING;
	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_EQ(0, cache->flags & ~valid_flags);
	}
	cpuinfo_deinitialize();
}

TEST(L2_CACHE, non_zero_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->processor_count);
	}
	cpuinfo_deinitialize();
}

TEST(L2_CACHE, valid_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count());
		EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count());
	}
	cpuinfo_deinitialize();
}

TEST(L2_CACHE, consistent_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
		ASSERT_TRUE(cache);

		for (uint32_t j = 0; j < cache->processor_count; j++) {
			const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j);
			ASSERT_TRUE(processor);

			EXPECT_EQ(cache, processor->cache.l2);
		}
	}
	cpuinfo_deinitialize();
}

TEST(L3_CACHES_COUNT, within_bounds) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_LE(cpuinfo_get_l3_caches_count(), cpuinfo_get_processors_count());
	EXPECT_LE(cpuinfo_get_l3_caches_count(), cpuinfo_get_l2_caches_count());
	cpuinfo_deinitialize();
}

TEST(L3_CACHE, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
		EXPECT_TRUE(cpuinfo_get_l3_cache(i));
	}
	cpuinfo_deinitialize();
}

TEST(L3_CACHE, non_zero_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->size);
	}
	cpuinfo_deinitialize();
}

TEST(L3_CACHE, valid_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_EQ(cache->size,
			cache->associativity * cache->sets * cache->partitions * cache->line_size);
	}
	cpuinfo_deinitialize();
}

TEST(L3_CACHE, non_zero_associativity) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->associativity);
	}
	cpuinfo_deinitialize();
}

TEST(L3_CACHE, non_zero_partitions) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->partitions);
	}
	cpuinfo_deinitialize();
}

TEST(L3_CACHE, non_zero_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->line_size);
	}
	cpuinfo_deinitialize();
}

TEST(L3_CACHE, power_of_2_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
		ASSERT_TRUE(cache);

		const uint32_t line_size = cache->line_size;
		EXPECT_NE(0, line_size);
		EXPECT_EQ(0, line_size & (line_size - 1));
	}
	cpuinfo_deinitialize();
}

TEST(L3_CACHE, reasonable_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_GE(cache->line_size, 16);
		EXPECT_LE(cache->line_size, 128);
	}
	cpuinfo_deinitialize();
}

TEST(L3_CACHE, valid_flags) {
	ASSERT_TRUE(cpuinfo_initialize());

	const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING;
	for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_EQ(0, cache->flags & ~valid_flags);
	}
	cpuinfo_deinitialize();
}

TEST(L3_CACHE, non_zero_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->processor_count);
	}
	cpuinfo_deinitialize();
}

TEST(L3_CACHE, valid_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count());
		EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count());
	}
	cpuinfo_deinitialize();
}

TEST(L3_CACHE, consistent_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
		ASSERT_TRUE(cache);

		for (uint32_t j = 0; j < cache->processor_count; j++) {
			const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j);
			ASSERT_TRUE(processor);

			EXPECT_EQ(cache, processor->cache.l3);
		}
	}
	cpuinfo_deinitialize();
}

TEST(L4_CACHES_COUNT, within_bounds) {
	ASSERT_TRUE(cpuinfo_initialize());
	EXPECT_LE(cpuinfo_get_l4_caches_count(), cpuinfo_get_processors_count());
	EXPECT_LE(cpuinfo_get_l4_caches_count(), cpuinfo_get_l3_caches_count());
	cpuinfo_deinitialize();
}

TEST(L4_CACHE, non_null) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
		EXPECT_TRUE(cpuinfo_get_l4_cache(i));
	}
	cpuinfo_deinitialize();
}

TEST(L4_CACHE, non_zero_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->size);
	}
	cpuinfo_deinitialize();
}

TEST(L4_CACHE, valid_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_EQ(cache->size,
			cache->associativity * cache->sets * cache->partitions * cache->line_size);
	}
	cpuinfo_deinitialize();
}

TEST(L4_CACHE, non_zero_associativity) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->associativity);
	}
	cpuinfo_deinitialize();
}

TEST(L4_CACHE, non_zero_partitions) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->partitions);
	}
	cpuinfo_deinitialize();
}

TEST(L4_CACHE, non_zero_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->line_size);
	}
	cpuinfo_deinitialize();
}

TEST(L4_CACHE, power_of_2_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
		ASSERT_TRUE(cache);

		const uint32_t line_size = cache->line_size;
		EXPECT_NE(0, line_size);
		EXPECT_EQ(0, line_size & (line_size - 1));
	}
	cpuinfo_deinitialize();
}

TEST(L4_CACHE, reasonable_line_size) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_GE(cache->line_size, 16);
		EXPECT_LE(cache->line_size, 128);
	}
	cpuinfo_deinitialize();
}

TEST(L4_CACHE, valid_flags) {
	ASSERT_TRUE(cpuinfo_initialize());

	const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING;
	for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_EQ(0, cache->flags & ~valid_flags);
	}
	cpuinfo_deinitialize();
}

TEST(L4_CACHE, non_zero_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_NE(0, cache->processor_count);
	}
	cpuinfo_deinitialize();
}

TEST(L4_CACHE, valid_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
		ASSERT_TRUE(cache);

		EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count());
		EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count());
	}
	cpuinfo_deinitialize();
}

TEST(L4_CACHE, consistent_processors) {
	ASSERT_TRUE(cpuinfo_initialize());
	for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
		const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
		ASSERT_TRUE(cache);

		for (uint32_t j = 0; j < cache->processor_count; j++) {
			const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j);
			ASSERT_TRUE(processor);

			EXPECT_EQ(cache, processor->cache.l4);
		}
	}
	cpuinfo_deinitialize();
}

redpajama_set_name: RedPajamaGithub


The development of information technology constantly led to the development of various fields, including the field of training. Training is no longer limited to being held in a specific place and the trainer explains only to the trainees, but this is developed by technology. The aim of this paper is to show all the latest techniques in the field of training, which positively affects the training process.this reviw paper primarily focuses on new technology for training and its research trend between 2000 and 2018; Paper discussed a review of 22 previous literatures from different journals in the same subject. The findings of this paper showed that the use of modern techniques leads to the development of training, which is reflected positively on the trainee, in addition to the paper mentioned the most important techniques that can be used in training.
This study can be useful to those responsible for training in the development of the training process, which is reflected positively on the trainees.
There is a rapid development in technology; this development of technology has become one of the main resources that can be used in various fields, including the field of training to improve the training process. There are many technology in the field of training as following: Computer Based Training (CBT) is defined as type of training where trainee have training by special training programs on computer and computer take the trainer role, Web based training (WBT) is simply defined as training delivered over Internet; it is commonly referred as e-learning, online learning and distance learning (Bronner Group, LLC), the use of Web-based training has also reduced the training cost (Syberworks, Inc.), Virtual Training (VT) refers to training done in a virtual or simulated environment, or when the learner and the instructor are in separate locations.
Virtual Training refers to training done in a virtual or simulated environment, or when the learner and the instructor are in separate locations. Virtual training and virtual training environments are designed to simulate the traditional classroom or learning experience.
Virtual learning is accessible to anyone who has a computer, tablet or Smartphone.
You can take part in an online course from any location where you can get a Wi-Fi signal.
Virtual learning can usually take place at a time that is convenient for the student. There is no longer any need to be in a classroom at a specific time on a specific day.
Because you can learn from the comfort of your own home it means that there is no travel costs involved in virtual learning.
You can study at your own convenience which makes this type of learning preferable for those with young families, those with full time jobs and those who have other responsibilities that require input at specific times or places.
A virtual learning environment is an online system that allows education materials to be transmitted through the internet to transfer knowledge from organization to employee, or teacher to student.
With your virtual learning environment software, it's easy to tell which employees have completed the activities. Built-in assessments like quizzes can help you ensure they're absorbing the material.
Every employee has access to the same material, no matter when he or she gets hired. Your message is consistent through the years; when you make a change in company policy that can be updated in your learning system and all employees have access to it.
With a virtual learning environment, receive thorough training immediately.
With an investment in virtual learning platforms, you're paying someone to develop curriculum once, which can then be used over and over again. Compare this to the expense of hosting workshops every time you hire new people or make changes in your business: paying speakers and instructors, arranging venues and travel, and losing productivity when employees are out of the office.
Employees can choose where and when they complete the training. They can revisit sections that were unclear, or review the entire curriculum from time to time. It's also flexible for you since you can add or change material at any time.
Virtual instructor-led training (VILT) refers to training that is delivered in a virtual or simulated environment, or when instructor and learner are in separate locations.
(Designing Digitally Inc., 2015) states that as learning and development professionals, it is not enough to design a training course and deliver it. But what is important is to translate training needs into behavioral changes, and this is what is delivered through the use of Web-based training.
(Vogel-Walcutt, Fiorella, & Malone, 2013) The effects of training can be enhanced through adequate instructions adapted to the pre-training, during-training and post-training phase.
(DeChurch & Mesmer-Magnus, 2010) (Delise et al., 2010) showed an effect of team training on cognitive outcomes which was larger compared to that of team building.
(Chen et al., 2007), self-efficacy is one of the critical factors influencing employee training effectiveness.
(Tharenou et al. ,2007) in commenting on the correlation between training and organizational-level outcomes, emphasize how individual outcomes are transformed into organizational ones, hoping that individual strategies can be combined with organizational ones in the workplace to achieve the corporate goals.
(Eom et al., 2006) observed that the more interaction between instructors and learners, the higher the user satisfaction. They also found that a knowledgeable teacher who is capable of facilitating learning has significantly positive influences on students' satisfaction.
(Marks et al., 2005) emphasized the importance of the interaction between instructors and learners. The instructor, who should be an enthusiastic participatory leader, can facilitate the learners' involvement by assembling interesting issues for discussion, stimulating the students' critical thinking ability, and encouraging them to ask questions.
(Kraiger et al., 2004) mention that one of the reasons training is frequently criticized is that what is learned cannot be applied to work.
Salas et al. (2003) highlight the importance of assessing the trainees' perception of relevance and value of training.
(Michel Armstrong, 2001), Training is systematic development of the knowledge, Skills and attitudes required by an individual to perform adequately a given task or job.
(Salas & Cannon-Bowers, 2000) Team training should include the knowledge, skills and attitudes relevant for the trained task.
(Likewise, Lim et al., 2007) found that the higher the trainee's computer self efficacy regarding online training, the higher their learning performance. Evidently, computer self-efficacy is important in the e-training environment.
(Strother, 2002) Computer-based training can provide a number of advantages such as time and place convenience for students and instructors, standardized delivery, self-paced learning, economies of scale in terms of classrooms and instructors, automated feedback to students and instructors, and a variety of available content.
(Benbunan-Fich, 2002), IT can assist an instructor in extending availability beyond class time and office hours, establish links between classmates, and accomplishing administrative activities.
(Leidner and Jarvenpaa, 2001), There is a potential for computer-based teaching methods to improve classroom learning that remains untapped by the inability to use them effectively.
(McGray, 2000) demonstrated the potential of IT to enable an instructor to be more efficient and effective in broadening and deepening the learning process for business students in MIS.


The Brooklyn-based vegan doughnut purveyor's creative list of flavors has made it a NYC staple.
Dun-Well Doughnuts recently made Thrillist's list of the top eight doughnut shops in New York City. The hyperlocal online news source lauded Dun-Well's growing list of innovative flavors, reporting that the menu items didn't sacrifice quality just because they were devoid of animal products, and recommended that readers follow the doughnut shop's Twitter account to find out about new flavors. "This surprisingly vegan (but nonetheless awesome) donut shop's constantly evolving menu has featured everything from Cadbury Creme Egg donuts to avocado mousse donuts," writes Thrillist. "Stalk them on Twitter, wait 'til they drop something crazy, and book it on over." Dun-Well is located in Brooklyn's Williamsburg neighborhood and was founded only two years ago in 2011.


text:
Tue, Mar 16, 2021
How St. Patrick Helped Save Western Civilization
In recent decades Saint Patrick's Day has gone from being a minor feast day on the Christian calendar to a massive worldwide celebration of Irishness enjoyed by millions every year. While we all may know the stories of the snakes and the shamrocks; Saint Patrick's work in Ireland had far more long-lasting consequences for western Europe and the world. As well as bringing Christianity to Ireland, Saint Patrick also brought a culture of literacy and scholarship that would spread throughout the land and see the establishment of monasteries that became hubs of learning and the arts. These monasteries produced literary and artistic masterpieces like the high crosses of Muiredach and Clonmacnoise, The Book of Kells and a range of detailed metalwork such as the Derrynaflan Chalice.
Irish monasteries served as artistic centres for teaching and practising the arts of illustration and calligraphy. Upon viewing the Book of Kildare, the famous 12th-century man of letters, Gerald of Wales, concluded that it was "not the work of men but of angels." Metalwork techniques such as lost-wax casting, riveting, soldering, filigree gold-work and enamelling were developed and passed on producing such sublime works as The Ardagh Chalice and The Cross of Cong. Stone sculptures and high crosses began appearing in monastic sites around the country depicting the crucifixion and various important stories from the Old and New Testaments.
But perhaps their most substantial cultural contribution was the preservation of Latin works of art, theology, and literature from the Roman empire. With the fall of Rome in 476 A.D. barbarian tribes began to tear through Europe pillaging Christian artefacts and laying waste to centres of learning. Sheltered by its remoteness-both geographical and political- from the continent, Ireland's monasteries began to flourish. It was here that the knowledge of classical antiquity was preserved in meticulously crafted calfskin books, and artistic methods were passed from monk to monk. Visiting the Monastery on Skellig Michael in the late 60s the famous art historian and broadcaster Kenneth Clark concluded that, "looking back from the great civilizations of twelfth-century France or seventeenth-century Rome, it is hard to believe, that for quite a long time–almost a hundred years–western Christianity survived by clinging to places like Skellig Michael, a pinnacle of rock eighteen miles from the Irish coast."
It wasn't long before monasteries in Ireland sent missionaries to the continent to spread the Christian message and with-it the culture and learning that had been preserved in Ireland. Irish scholars were highly sought after by royal courts in Europe for their literacy, knowledge of theology, and artistic prowess. It was during this time that Ireland earned the right to be called "the land of saints and scholars." Noble families from across Europe sent their sons to Ireland to be exposed to Latin art and culture, as well as a particular type of uniquely Celtic Christianity.
Ireland played an integral part in maintaining the knowledge and art of classical antiquity by providing a vital link between the classical and medieval ages. Along with the Byzantines in the East, Ireland protected and nourished a vast array of cultural knowledge that would ultimately inspire the art and advances of the Renaissance. Advances that led to the beginnings of the secular humanism enjoyed by much of the West today. All this the partial result of a chain reaction that started with a young boy being kidnapped by pirates on the coast of Wales.
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Ranch Style home w/ very desirable split two bedroom and two bath with Modern Great Room Open Kitchen with nice sized dining area to side. Finished lower level with walkout to fenced backyard. A bar area, huge screen projection for the big events. Another bedroom and a stub in LL for 3rd Bath. Decks look out into a nice heavily wooded area. "Great place to call Home"


There are a variety of buildings that can be classed as 'educational premises', such as schools, colleges and universities. Each of these typically has a high number of people within, many of which could be considered "at risk", which means careful steps need to be taken to ensure a safe environment.
In order to effectively manage fire safety, it's first essential to identify potential hazards and risks within educational premises. For an outbreak of fire to occur there are three things needed; an ignition point, fuel and oxygen.
Ignition points can encompass many different things, especially in educational premises, these include faulty electricals, kitchens, laboratory equipment (bunsen burners, chemicals etc.) and heating sources. Many educational premises are large buildings and each needs to be identified and logged.
There are various items that can be considered fuel, many of which are commonly found in educational buildings; paper, books, flammable liquids, textiles and flammable chemicals are just a few that are often stored in large quantities. When stored near a potential ignition point this can be extremely hazardous.
The final thing required for a fire, oxygen, is everywhere in the air all around us. Of course, this is unavoidable, however, there are a few sources that can increase the oxygen supply to a fire, most commonly ventilation systems. Also, some chemicals commonly found in educational premises are oxidising and can feed additional oxygen to a fire.
An educational facility, such as a school, will typically have a number of people who are "at risk" should a fire break out. Students and staff with disabilities and children, for example, may have trouble evacuating should the need arise. A plan must be put in place to ensure that everyone within a building is able to evacuate safely in the event of a fire.
At Walker Fire, we provide exceptional services and products to ensure that your educational buildings are as safe as possible from a fire breaking out. We can also ensure that your staff know exactly what to do in the event of a fire breaking out through our comprehensive training courses.
Educational buildings typically contain a high number of ignition, fuel and oxygen.
Educational premises also tend to have a high number of "at risk" people.
Educational buildings are often large and require a thorough assessment.
Walker Fire can help to ensure buildings are safe through our quality services, products and training.


text:
The new 2016 Rolex Oyster Perpetual Cosmograph Daytona
Posted on April 30, 2016 November 11, 2019 by admin
Posted In Daytona, Rolex
This year, at the 2016 BaselWorld Show Rolex has unveiled its new version of the Daytona. Its most recent version comes in 904L steel and it features the famous monobloc Cerachrom bezel in black ceramic. This recent look is a mix of unique aesthetics and superior technology that pays tribute to the legacy of this remarkable chronograph watch. The black bezel was previously used by the brand on its 1965 model that had a black Plexiglas bezel insert.
The first Rolex Cosmograph Daytona was launched in 1963 and it was designed for race drivers. Due to its amazing reliability and performances, the watch achieved unexpected records both in the world of motor sports and within the fashion industry. Over the years, the watch has become a true icon for fans and professionals.
There are numerous Rolex enthusiasts that have been waiting for this model for a while now. The steel version with a black ceramic bezel is more suitable for the tastes of true fans. It is the perfect contrast between the pure Rolex aesthetics and the rugged racing inspired style. The watch completes the spectacular Daytona family with superior design and modern features.
As everyone knows, Rolex doesn't like change so it is really no surprise that the 2016 Daytona is so similar to the 2015 one. The one launched last year had a black cerachrom as well and a white dial, but it did not have the black sub-dials. That one had silver counters. Equipped with the magnificent 4130 Rolex caliber, the watch keeps its 40 mm case diameter size.
The really cool thing about the 2016 Rolex Daytona is also available with a black dial. This is a very nice addition from Rolex, a brand that has always focused on timeless elegance and brilliant style. Furthermore, the watch has the Superlative Chronometer certificate introduced by Rolex in 2015 which offers accuracy to -2/+2 seconds per day. The reference for this model number is 116500LN.
The key part of the watch's identity is the black Cerachrom bezel with the engraved tachymetric scale which measures speeds of 400 miles/hour. The advantages of the monobloc Cerachrom bezel are the scratch proof properties, the corrosion resisstance and the color that isn't affected by UV rays. It is a remarkably durable ceramic bezel that has an easy to read tachymetric scale which is possible due to its thin layer of platinum in the graduation and numerals added by using a special PVD process.
The Rolex Daytona 2016 with black Cerachrom bezel and white dial continues the amazing Daytona legacy by contributing with a stunning design, superior accuracy and captivating modern features.
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text:
Microid announces the game Koh
While the TV show presented by Denis Brogniart remains still popular, the saga Koh-Lanta will again be written in video game. The MICROID publisher had already had one last year, and here it is now formalized: Koh-Lanta: the adventurers will come out on PC and consoles on October 14th.
If the sand is irritating, it will soon be possible to play Koh-Lanta from your living room with Koh-Lanta: the adventurers , the next game developed by Magic Pockets (Ninja Turtles mutant teenage) for microids. It will be a question about winning the trials but also to participate in the life of the shipwriting camp by agreeing to follow its teammates to collect resources.
In the manner of a narrative game, the choices of dialogues with other adventurers will affect their vote during advice. The title will propose a solo campaign, but also a mode up to four players to compete on the most famous issues of the show. Koh-Lanta: Adventurers will be released on October 14 on PC, Nintendo Switch, PS4 and Xbox One, and will also be compatible with PS5 and Xbox Series.
BrogniartBrogniart remainsDenisDenis BrogniartGamesKoh-LantaMagic PocketsNinja Turtlessaga Koh-Lantashow presentedvideo game
Magic The Gathering announces the Crossover of Fortnite
Skoda Fabia a class better


text:
O Lavras Futebol Clube é um clube de futebol brasileiro, da cidade de Lavras, Minas Gerais.

História
O Lavras Futebol Clube foi fundado em 2009. Neste mesmo ano filiou-se à Federação Mineira de Futebol e disputou a Segunda Divisão do Campeonato Mineiro e o Campeonato Mineiro de Juniores. Em 23 de janeiro de 2009 o clube firmou contrato para mandar seus jogos no estádio Ruy Moraes de Lemos, da Associação Olímpica de Lavras. No mesmo dia realizou uma seletiva, da qual selecionou 25 jogadores para a disputa do Campeonato Mineiro de Juniores.

Campanha na Segunda Divisão do Campeonato Mineiro de 2009

Ligações externas

Esporte de Lavras
Clubes de futebol fundados em 2009
Fundações em Minas Gerais em 2009
Clubes de futebol de Minas Gerais

redpajama_set_name: RedPajamaWikipedia


This linerlock folder features a satin finished spear point blade, single thumbstud with opal inlay. The handle has sterling silver bolsters, black palm scales, anodized titanium liners and backspacer. Excellent condition.


Indix (www.indix.com) today announced that it had secured $4.5 million in new funding from leading venture capital firms, Nexus Venture Partners and Avalon Ventures. Indix had previously raised $1.4 million in financing from seed investors, including Nexus Venture Partners.
Indix is a Seattle, USA, and Chennai, India, based company working on big data, analytics, visualizations and applications that help product and services companies manage and get the most out of their product portfolio. Indix is building a cloud-based product for individuals in businesses around the world and will continue to be in stealth mode until later this year.
"Indix is working on a disruptive concept that addresses a compelling need", said Naren Gupta, co-founder & MD, Nexus Venture Partners. "Indix has a brilliant team and we are very excited to work with them".
Indix was founded in late 2010 and started operating in late 2011. Indix has a world-class engineering and product team based out of Chennai, India. Indix's founders have broad and diverse technology experience having worked at Microsoft, Cerent, Cisco, Caymas, NetScaler, Citrix and ThoughtWorks, amongst others. (For more on the founders, please visit www.indix.com/about).
"We love that Indix is pioneering a new type of business application that is data and insight rich and visually appealing", said Rich Levandov of Avalon Ventures. "I think it's going to make the life of a product manager a lot easier".
"We have really enjoyed working with Nexus this past year", said Sanjay Parthasarathy, CEO and founder of Indix. "And Avalon's connection to Seattle and MIT make them a wonderful addition to our list of investors".
The new funding will be used to accelerate product development and scale marketing and sales in the United States. The company might even upgrade their espresso machine.
Avalon Ventures is a venture capital fund comprised of former entrepreneurs driven by passionate people pursuing disruptive ideas in ever changing market environments. Avalon's long-standing and successful focus has been on seed and early stage companies, including many it formed in the life science and information technology sectors.
Nexus Venture Partners is India's leading venture capital fund, with offices in India and Silicon Valley. Nexus' team consists of entrepreneurs who have founded and scaled large global companies. It has over $600mn under management with an active portfolio of over 45 companies across technology, Internet, media, consumer, and business services sectors. The Nexus team plays an active role in helping entrepreneurs and management teams build market-leading businesses.


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Aum - Aum Newsletter Interview
Our music ranges from progressive ambient textures to Dubstep, Drum & Bass, and experimental electronica. We create our music in the studio and then re-work, and remix it live, using live instrumentation, sequencing and live dubbing.
What inspired you to become and start Aum?
We both have a passion for electronic music, especially with Drum & Bass, and found that Hamilton was lacking in diverse styles of independent music. We also found that there was a lull in Hamilton's club scene/culture and wanted to get things moving again. With the help of The Collective (Consisting of local DJ's/producers), Hamilton is now on the way to having a respected club scene and a booming sub/club-culture.
What will your next release be?
We just released our debut album titled 'Aletheia' in December 09, and are currently finalising artwork for our next EP release titled 'Happiness' which we aim to release around Feb-March. The EP features a refreshing change of pace from our album material, with more focus on ambient qualities. As usual this will be available as hard copies and digital MP3 downloads via selected stores and online at www.amplifier.co.nz.
We highly rate the electronic music scene this country has to offer, especially in terms of Drum & Bass and Dubstep producers/DJ's, who set a world recognised standard in quality and vibe. Artists of note at the moment are Optimus Gryme, Truth, The Upbeats and Cern, all of who are touring at the moment and releasing tunes around the world.
We have been fortunate enough to play a support slot in Hamilton for Optimus Gryme's album release tour, as well as playing alongside Truth and Sick Cycle at 'Grounded' Wellington, which hosted 22 National and International DJs/Producers.
We would really like to play with Paddy Free, who for a number of years has pushed the boundaries of live electronic music performance with Dub legends Pitch Black.
Exploding Beers.
Studio.
What can we expect to see from Aum over the next year?
We will be doing an 'Aletheia' tour of the North Island around February which we have just started rehearsing for which will include live and DJ sets. We also have a new EP release coming out as mentioned earlier.
About Aum
Aum consists of Jeremy Graham and Darryl Turner, two budding local producers from Hamilton, New Zealand who have been making and playing tunes together since the start of 2008. The Aum sound ranges from Dub and Ambient, to Dubstep and Drum & Bass , entirely composed, performed and produced by the two. This same ethos is carried over into Aums live performances where their original tracks are cut up, re-mixed and re-arranged to create a cross genre experience, including live elements, blurring the lines between musical performance and DJ style mixing.
Before they became Aum, the two producers had their roots imbedded in Psychedelic-Dub Rock, playing Guitar and Bass in a band together for a year.
While embarking on seperate musical education endevours both gaining qualifications in Music Production, the two were to meet up again at the beginning of 08 and eventually started producing tunes together and performing live.
Visit the muzic.net.nz Profile for Aum


Nehal Chudasama is an Indian model,She Was born 22 August 1996.is fitness consultant. Nehal works as an emcee.Nehal was Won Miss Diva Miss Universe India 2018 and Lead India at Miss Universe 2018.In 2018, she tryout for the title Femina Miss Gujarat, where she was in top 3 finalists.early, she take part in Miss Diva 2018 contest and won the title of Miss Universe India 2018. Nehal Chudasama crowned by outgoing titleholder Shraddha Shashidhar.She also won 'Miss Body Beautiful','Miss Multimedia'.Nehal Lead India at the Miss Universe 2018 show in Bangkok, Thailand, on 17 December 2018.In an interview,she Said that she is known for her confidence and it is her confidence that has helped her win the title of Miss Diva Miss Universe 2018. She further said that her aim is not just to represent India at Miss Universe but to win the title which India last won 18 years ago.Another shocking fact about Nehal is that she is a Civil service aspirant and looks forward to preparing for the examination after the International Pageant. "I will look forward to being in Indian Civil Services so that is what I am aiming for right now after my pageant. No Bollywood plans as of now," the model stated.
Nehal Chudasama with Miss Diva Miss Universe 2017, With Shraddha Shashidhar.


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Jordan Peterson fires new salvo against Wilfrid Laurier in already fiery academic freedom battle
Peterson filed fresh legal documents Tuesday, including another lawsuit against Laurier, claiming the university defamed him in its public defence against his June claim
Adrian Humphreys
The fervent debate over academic freedom involving Jordan Peterson is rekindled for a new school year with Peterson saying in court documents that Wilfrid Laurier University's contention he benefited from the controversy is like saying "those who survived the Holocaust should be grateful to their oppressors for teaching them survival skills."
Peterson filed fresh legal documents Tuesday, including another lawsuit against the Ontario university — his second in three months — claiming Laurier further defamed him in its public defence against his June claim.
Peterson, a psychology professor at the University of Toronto, was only tangentially involved in the original dispute that sparked an academic freedom outcry last November.
Lindsay Shepherd, a teaching assistant at Laurier, played a clip in her class of a television debate between Peterson and another professor over the use of gender-neutral pronouns.
She was then called into a disciplinary meeting with three school officials, during which she was castigated for exposing students to Peterson's message. The officials had much to say about Peterson in the closed-door meeting, much of it unflattering. Nathan Rambukkana, the professor of the course for which Shepherd was assisting, said showing the clip is like neutrally playing a speech by Adolf Hitler.
An audio recording of the meeting caused an uproar and the school later apologized to Shepherd, but not Peterson.
In June, Shepherd and Peterson separately sued Laurier and the officials who conducted the meeting.
Lindsay Shepherd at a free speech rally in November 2017. Tyler Anderson/National Post
Shepherd claimed the school's "attack" made her "unemployable in academia." Peterson claimed school officials defamed him in the meeting, "demonized" him and diminished his reputation.
In its defence against Peterson's suit, the school earlier filed court documents and issued a press release. Peterson's retort Tuesday took aim at both.
Peterson's new lawsuit claims further defamation and damage by the school.
A media statement from Laurier at the time accused Peterson of filing his suit "as a means of unduly limiting expression on matters of public interest" and for the purpose of "causing academics and administrators to be more circumspect in their choice of words."
Peterson's lawyer, Howard Levitt, said that falsely attacked a core value of his client.
"He was trying to prevent people, in closed-door sessions, from viciously demonizing a student, and himself, when they try to have an academic discussion and suppress her academic freedom. He wants to make sure that professors simply won't conduct themselves that way; that they not be so politically correct that they won't allow anyone to have any other view without being attacked."
Levitt said he expects both lawsuits to be joined into a single action during the court process. Peterson and Shepherd are both represented by Levitt, an employment lawyer who also writes a column for the Financial Post.
Further, Peterson submitted on Tuesday a reply to the statement of defence filed by the university.
Jordan Peterson has filed two lawsuits against Wilfrid Laurier University in the past three months. Craig Robertson/Postmedia/File
It calls Laurier "hypocritical" for publicly apologizing to Shepherd — saying the disciplinary meeting should not have taken place and that she did nothing wrong by showing the Peterson clip — and then claiming in its court filings the officials' assessments of Peterson in the meeting were true.
Peterson's reply in the document says: "The Plaintiff is cognizant of the lack of free speech on many university campuses and the adverse consequences to students who do not conform to radical leftist and identity politics. He expressed the hope that his lawsuit, along with Shepherd's, would end that reality on many university campuses."
The school acknowledged the new court filings.
"Wilfrid Laurier University has received a reply to its statement of defence in relation to a lawsuit initiated by Jordan Peterson. The university has also received a new claim advanced by Jordan Peterson against the university. The university intends to vigorously defend itself against these lawsuits," said Kevin Crowley, Laurier's director of communications and public affairs.
None of the statements from either party have been tested in court.
• Email: ahumphreys@nationalpost.com | Twitter: AD_Humphreys
Retired U.S. Justice John Paul Stevens dies, leaving liberal legacy
Trump administration plans to divert $40 mln in aid to Venezuela's opposition
Former U.S. Supreme Court Justice John Paul Stevens dies
Ottawa man says Dragon-boat festival CEO ordered him to remove Falun Gong shirt, citing Chinese sponsorship
Court hears challenge over conflict of fall federal election date and Jewish high holiday
Free speech activist Lindsay Shepherd on her Twitter ban: 'Your instincts should not be to celebrate'


Just click on ADD TO CART below the performance you would like to purchase. You will be re-directed to our s2s2s PayPal site where you can purchase your tickets with any major credit card!
You must add each performance you wish to purchase and then select the number of tickets you wish to purchase before checking out.
All Tickets will be held at the Will Call booth at the theatre prior to the performance. You will receive a confirming e-mail for your order. Bring a copy of that email with you to the theatre.
The lobby ticket booth will be open one hour prior to curtain for walk-up sales and Will Call pickups on the day of the show only. We accept cash and checks at the door.
Munter says: "'Screwy' consists of four separate plays, all starring women of a certain age as they battle for survival in historical Hollywood." A finalist in the Ruckus Rockwell competition in Hollywood.
A comedy asking the age-old question: Can you love more than one person at a time?
A powerful drama based on actual events dealing with racism, crime and equality when 11 women are murdered.
Deals with grief and its affect on relationships.
This fast-paced comedy asks: Doesn't everyone love brides?


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FlorenceIN

  15 Jul 2008

Dopo il successo strepitoso del gruppo presente sul social network LinkedIn MilanIN, che raccoglie una serie di professionisti che lavorano a Milano, è stato creato un analogo gruppo per la città di Firenze, chiamato indovinate un pò, non era difficile FlorenceIn, se lavorate a Firenze ed avete un account linkedIn provate ad entrare nel gruppo da qui.

Buon social network a tutti :-)

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The user interface is the same as the one of the older ArCon version - You will not have to relearn a new operation.
ArCon [planTEK] runs without any problems under the current Windows operating systems WIN7 and WIN8 (32 bit and 64 bit).
ArCon[ planTEK] can completely take over all projects from your existing older ArCon version (up to ArCon +6). Therefore it is not required to redraw the floor plan.
In case you have already purchased object collections (*.ACO, *.O2C) for your old ArCon version, you can keep on using them with the latest ArCon [planTEK] version.
ArCon [planTEK] includes the professional tools of ArCon+ (plus version of ArCon) and has no limitations.
ArCon [planTEK] runs without software protection, Hardlock, Dongle and others, and it does NOT require ANY activation.
You will find further information about the latest version of ArCon [planTEK] here.
Complex blending of multiple roofs, parallel working in different views or creating appealing 3D objects is not possible with ArCon or only to a very limited extend.
This provided the initial impetus for a completely new development of professional software for designing and visualizing floor plans, houses, homes and fitments. The new product is called cadvilla.
Since the 1990s programming languages have changed, operating systems have been established and also hardware has become many times more powerful than it was 15 years ago. Outdated programming languages such as PASCAL are more and more poorly supported by modern operating systems.
cadvilla is based on the latest development environments from Microsoft and was completely programmed under Microsoft.NET framework. Programs based on Microsoft.NET are easily compatible with all new Windows operating systems.
Cadvilla supports menu navigation via tool bars - similar to the one at ArCon - to the full extent.
With Cadvilla you can navigate in your familiar menu environment with similar processes like with ArCon. For example, click you open a push button with the right mouse (e.g. external walls) and then a dialog box opens where you can perform different settings. Therefore, a fast relearning from ArCon to cadvilla is possible. For further information, click on the following video.
While working with the 3D house planner oftentimes parallel work is required. For example, it is standard with cadvilla to start a wall or an elongated roof in the 2D top view while finishing it in the sectional view.
You can monitor the progress of your project in cadvilla via several, simultaneously displayed views (2D view, sectional views, 3D views). Different views of your project can be displayed next to each other and thus facilitate parallel working in different views.
As an example, there are two pillars and the corresponding landing selected (displayed in red) in the adjacent image. Due to a parallel display of all views you will always have a full overview of the project. Every modification is transferred to all the other views at the same time.
For the exact visualization of your dream house you will still need a carport, a specific balcony or the exact display of the downpipes? In Cadvilla there are 3D constructions for this area.
Besides the extension of the constructural possibilities, 3D constructions facilitate also an extension of the 3D catalog through owned objects.
Due to the combination of 3D solids - consisting of base solids, extrusion solids, rotational solids and solids that follow a contour - new objects can be generated due to blending features (Boolsche operations) in order to use them in your project.
In the adjacent example you will find objects that were created with the component 3D construction in cadvilla.
You will find additional information of the extensive features of 3D construction for creating 3D solids here.
The house plan software cadvilla works with layers. The layer technique facilitates combining areas that belong together on their own layers in order to show and hide them separately later.
The structure of the floors can be displayed more clearly by using layers.
Due to showing and hiding of the arranged layers, different results and drawings can be created.
In cadvilla every layer can be allocated to a height/level.
Due to the use of new technologies, the requirements of roofs are today becoming more and more extensive. The requirements of house builders become higher and higher as well. Regarding the used CAD software this requires a powerful tool for creating complex roof landscapes.
First, the roofs are positioned and put in as individual roofs - for example a normal gable end roof, monopitch roof or hipped end roof.
Afterwards, the roofs are merged by a few mouse clicks. The recalculation of the complex timber construction as well as the entire roof shape is performed automatically. Therefore the user can design and display nearly every roof shape in the details.
Ex post editing, moving, flipping, deleting and modifying of (already merged) individual roofs is possible at all times.
Existing floor plans from ArCon can be taken over with cadvilla professional and cadvilla professional plus under the following conditions.
Object collections (e.g. furnishings) with the file ending *.ACO can be converted and taken over automatically with cadvilla professional and cadvilla professional plus.
Ambient occlusion enhances every 3D display. This is about shadows that become darker as they become deeper.
In the image on the right a picture was rendered with ambient occlusion, the other picture with just regular shadows. Click on the image to find out the difference in appearance.
In order to get a realistic 3D display, ambient occlusion is a standard scope in cadvilla.
Design your dream house with our professional software cadvilla professional plus. The CAD program cadvilla professional is the ideal software for designing your house on your own and for quickly creating a professional 3D visualization with ambient occlusion.
cadvilla is a CAD program based on a powerful and efficient 3D core. An up-to-date hardware is the assumed precondition for the use of cadvilla.
cadvilla professional plus is available online as a download or can be purchased on DVD.


I have two small children and I take great delight in watching them grow and change. In children one can see the simplest impulses of the human personality before it has been socially conditioned. For example, when two children are playing together with an assortment of toys, a toy will often lie utterly neglected until one child happens to takes it up, at which point the other child will develop a sudden interest in it, and demand it as his own. As long as it lay on the floor there was no special attraction, but when another grasps it, it acquires urgent importance.
In reality, adults are not so different from children in this respect, although we might hide it. We are drawn to possess what others possess. In extreme cases, acquisitiveness drives people to deceit and violence. More often, it simply involves spending a great deal of time and energy accumulating and discarding possessions, hunting for the object that will bring happiness, yet never quite finding it. The whole economy is based on our acting this way. If we stopped, the economy would collapse and would have to be reinvented.
From a Sufi point of view, every motivation is ultimately grounded in a divine impulse. Even in our concupiscence there is hope for redemption. The pursuit of an object leads to the attainment of the object, which in turn leads to rising above it. If one were not to strive to obtain that which one desires, if one were to prematurely renounce it while inwardly still hankering for it, one's renunciation would be hollow and hypocritical and liable to be broken at any moment. But one who has attained the object and risen above it, that one can be said to be free. Even the path of acquisition must have its end, as all things have their end, in realization. William Blake expressed this when he said that the road of excess leads to the palace of wisdom.
Collectively, the path of realization through excessive consumption is simply not tenable. Yet many of us go through a stage of preoccupation with objects. As one becomes a connoisseur, one's tastes develop and there is no limit to what one wants. When one has obtained this thing, something else seems more desirable, and it goes on and on. But after some time one realizes that this is all dunya (wordliness) and that the thing itself is not what provides the satisfaction. The thing is just a trigger for an inner experience, and the experience itself is the source of the pleasure. What does possession really mean after all? In truth, possession is nothing more than legal proximity to an object. Is there any kind of invisible force that links a person and an object? There is no such force, except in the mind.
When one realizes this one moves to the next stage—from dunya to akhira (otherwordliness). Instead of seeking possession of objects, one seeks satisfaction in beautiful and joyful states of being. One sets out on the spiritual path, and perhaps one attends seminars and workshops and retreats and reads a lot of books. In this way one discovers a marketplace of beautiful spiritual ideas. Eventually one might begin to notice that the same impulses that impelled one in the marketplace of things drive one through the marketplace of spiritual ideas: the same acquisitive desire, the same attempt to obtain satisfaction through possession of something that is expected to be stable and pleasurable. Moreover—in the spiritual world as in the physical world—one is often tempted to seize that which belongs to another because it has more attraction than what one possesses oneself.
As one pursues one's spiritual path, one sees that there are other people who are apparently endowed with a quality of realization that is extremely attractive. One wishes that one had what the other person has, and feels the need to test out every new methodology or discipline in order to latch onto something that will maximize one's satisfaction. One craves to possess that which belongs to another, the apparently perfect spiritual state of those who surround one, and one feels oneself to be trapped in a lesser state. So one becomes, on the one hand, idolatrous of the others, and on the other, most unkind to oneself, feeling profoundly one's unworthiness and incapacity. Ironically it is likely that the one upon whom we project our ideal of perfect spiritual accomplishment likewise feels his or her limitation and wishes for the state of a more perfectly realized being, and so on ad infinitum, everyone turning and looking at another—that is, until we return to the principle of this Iron Rule: Do not claim that which belongs to another.
The rule tells us, only claim that which belongs to you, that which arises from your own experience. That is what you can claim, accept and be content with—your own state of being. Understand its changeableness. Understand that your state is not the essence, but it is a quality of essence that is shifting. In the acceptance of one's state one is better able to sense how it is poised on the ground of pure essence.
So take the truth of your experience as that which belongs to you, the special vantage point that has been disclosed to God by God exclusively through you. Your angle of vision is necessarily unique to you, and something is thereby added to life that could not be added in any other way. Nothing is superfluous. All is providential. Our critical judgments of our experience as good or bad, negative or positive are ultimately very relative. There is simply the life experience that we have been given for the enrichment of the divine self-disclosure. It is in embracing that experience that we enjoy the fulfillment that is our birthright.
 From Hazrat Inayat Khan (1882-1927), author of the Iron Rules.