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Current path: All Docs \ GUI/Touchscreen Controllers \ QVGA (Legacy) \ QVGA Controller Users Guide \ Serial Communications
RS-232 and RS-485 Communications
Serial Protocols
Serial Connectors and Configuration Options
Enabling the Secondary Serial Port
Enabling RS485 Communications
Using the Serial Ports
Switching the Default Serial Port
Timing Considerations and Multitasking
Setting Baud Rates
Multi-Drop Communications Using RS-232
Synchronous Serial Peripheral Interface (SPI)
SPI Bus Pins
SPI Network Connections
Configuring the SPI
Initializing the SPI Control Register
SPI Clock Signal Configuration
SPI Baud Rate
Summary of the SPCR Control Register
SPI Status Register Flags
SPI Data Transfers
Serial Communications
The QVGA Controller has two serial communications ports: a primary serial port called Serial 1 that supports both RS232 and RS485 protocols, and a secondary serial port called Serial 2 that supports RS232. The Serial 1 port is implemented with the 68HC11's on-chip hardware UART (Universal Asynchronous Receiver/Transmitter). Serial 2 is implemented by a software UART in the controller's QED-Forth Kernel that uses two of the processor's PortA I/O pins to generate a serial communications channel.
Table 11-1 Serial Communications Channels
Port Address
Comments / Alternate Uses
1 Serial 1: RS232/485 hardware UART at up to 19.2 KBaud PD 0-1, PPC 4 used for RS-485. PPC 4 may be used as digital I/O if RS485 is not used.
1 Serial 2: RS232 software UART at up to 4800 Baud PA 3-4 PA 3-4 may be used as timer-controlled I/O (one input-capture and one output-compare) if Serial 2 is not used. PA 3-4 may also be used for hardware handshaking for Serial 1.
1 Synchronous Serial Peripheral Interface at 2 MBaud PD 2-5
3 Serial communications channels
The primary channel's UART translates the bit-by-bit data on the serial cable into bytes of data that can be interpreted by the QED-Forth Kernel or by your application program. It controls the serial-to-parallel and parallel-to-serial conversion and performs all of the timing functions necessary for asynchronous serial communications. The communications is asynchronous because no synchronizing clock signal is transmitted along with the data. Rather, the UART deduces the correct time to sample the incoming signal based on the start and stop bits in the signal itself. (The QVGA Controller also supports fast synchronous serial communications via the Serial Peripheral Interface described later in this Chapter.)
The secondary channel is very useful for debugging application programs that communicate with other computers or I/O via the primary channel. Since both channels can operate simultaneously and independently, debugging can be performed while the application program is communicating via its primary channel. The dual communications channels also provide an easy way to link systems that communicate using different serial protocols.
There are several protocols that govern the format of exchanged data, with the RS232 protocol used primarily by personal computers, and the RS485 protocol used in industrial control systems. The Serial 1 port can be configured for either RS232 or RS485 communications at up to 19200 baud. The Serial 2 port is dedicated to RS232 communications at up to 4800 baud.
RS232 is by far the most common protocol. It is supported by virtually all personal computers, and is the default protocol for both of the QVGA Controller's serial ports. Its simplest implementation requires only three wires: one to transmit serial data, a second to receive serial data, and a third to provide a common ground reference. RS232 allows both communicating parties to transmit and receive data at the same time; this is referred to as full duplex communications. RS232's greatest benefit is its universality; practically all personal computers can use this protocol to send and receive serial data.
RS232 uses inverse logic; that is, a positive bit at the 68HC11 UART is inverted by the onboard RS232 driver chip and appears as a negative signal on the serial cable. The terminal's serial receiver chip re-inverts the signal to its positive sense. The data bits are also transmitted in reverse order, with the least significant bit transmitted first, after a start bit. The specified signal levels of approximately +/- 9 Volts are derived from the QVGA Controller's +5 Volt supply by a dual RS232 driver chip that has a built-in charge pump voltage multiplier.
The QVGA Controller offers a unique addition to full duplex RS232: it can place its RS232 transmitter into a high impedance silent mode under software control. This allows you to configure full duplex multi-drop networks in which a single master can sequentially address one of many slaves and start a full-duplex exchange of data.
RS485 is another protocol supported by the primary serial port on the QVGA Controller. It is a half duplex protocol, meaning that only one party at a time may transmit data. Unlike the standard RS232 protocol, RS485 allows many communicating parties to share the same 3-wire communications cable. Thus RS485 is the standard protocol of choice when multi-drop communications are required.
Like RS232, the data bits are transmitted in reverse order, with the least significant bit transmitted first. The RS485 protocol uses differential data signals for improved noise immunity; thus RS485 can communicate over greater distances than RS232. An RS485 transceiver is present on the QVGA Controller, and its data direction is controlled by pin 4 of port PPC of the peripheral interface adapter (PIA).
The primary and secondary serial communications ports are accessible through the QVGA Controller's 10 pin, dual row Communications Connector (H14) and through the individual Serial 1 and Serial 2 connectors. These standard 9-pin serial connectors are located on the top edge of the QVGA Controller. A serial communications cable is supplied with QVGA Starter Kits.
The pinout of the Communications Connector (H14) is shown in Table 11 2, and the following diagrams show how these signals map to the two serial communications connectors. Although the RS232 protocol specifies functions for as many as 25 pins, each communications channel requires only three for simple serial interfaces: TxD1 (transmit data), RxD1 (receive data), and DGND (digital ground). The RS232 protocol specifies the use of two separate grounds, a signal ground and a protective (or "chassis") ground. The QVGA Controller does not differentiate between these. To provide a convenient means of attaching two grounds to the serial cable, there are several pins (labeled DGND) on the communications connector that are connected to the controller's ground plane.
Table 11-2 Serial Communications Connector, H14
TxD1 – 1 2 – RxD1
DGND – 3 4 – DGND
RS485 XCVR- – 5 6 – RS485 XCVR+
DGND – 9 10 – DGND
Table 11-3 Serial 1 Connector
NC – 1
6 – DSR1/DTR1
TXD1 – 2
7 – CTS1
/RXD1 – 3
8 – RTS1
DSR1/DTR1 – 4
9 – NC
DGND – 5
Notes: NC indicates no connection
Pins 4 and 6 (DSR1/DTR1) are connected.
Pins 7 and 8 (CTS1/RTS1) may optionally be connected
on the board with zero ohm shorts.
/TXD2 – 2
7 – CTS2/RTS2
8 – RTS2/CTS2
Pins 7 and 8 (CTS2/RTS2) are connected.
Given the availability of ready-made communications cables, it is not necessary to study or understand the following descriptions of cable connections. These detailed signal descriptions and cable diagrams are presented to provide complete information for those who have special communications requirements and for those who wish to make their own application-specific communications cables. Most computers conform to IBM PC AT-compatible RS232 interfaces which use 9-pin D-Type connectors, consequently the QVGA Controller brings out its serial ports to two female 9-pin D-Type connectors. Table 11 5 shows the connection diagram for a standard 9-pin serial cable.
Table 11-5 Serial Cable Connections.
Cable Pin
PC AT or Terminal
QVGA Controller
1 NC NC
2 RxD TxD1
3 TxD RxD1
4 DTR DSR1/DTR1
5 GND GND
6 DSR DSR1/DTR1
7 RTS CTS1
8 CTS RTS1
We can gain insight into the operation of the RS232 protocol by examining the signal connections used for the primary serial port in Table 11 5. The transmit and receive data signals carry the messages being communicated between the QVGA Controller and the PC or terminal. The QVGA Controller's transmit data signal TxD1 (pin 2 on the 9-pin serial connector) is connected to the terminal's receive data signal RxD (pin 2 on its 9-pin connector). Likewise, the terminal's transmit signal TxD is connected to the QVGA Controller's receive signal RxD1. Chassis and signal grounds are connected together to the digital ground (DGND) signal.
From the QVGA Controller's point of view, these three signals (TxD, RxD, and ground) are the only connections required to perform serial communications. While these signals provide a data path, they do not provide hardware handshaking that allows the two communicating parties to let each other know when they are ready to send or receive data.
The RS232 protocol provides for four handshaking signals called ready to send (RTS), clear to send (CTS), data set ready (DSR), and data terminal ready (DTR) to coordinate the transfer of information. The QVGA Controller, however, does not implement hardware handshaking. Rather, it relies on software handshaking via transmission of XON/XOFF characters to coordinate data transfer and ensure that information is not lost when one of the communicating parties is busy.
Many terminals and PCs, however, do rely on hardware handshaking to determine when the other party (in this case the QVGA Controller) is ready to accept data. By connecting pairs of these handshaking signals together, the terminal or PC can be made to think that the QVGA Controller is always ready to send and receive data. Thus in Table 11 5 , RTS1 is connected to CTS1, and DSR1 is connected to DTR1 onboard the QVGA Controller using zero ohm shorting resistors. These signals may alternatively be redirected to the digital inputs and outputs used by the second serial port if hardware handshaking is required.
The secondary serial port is connected similarly except that the onboard connection of RTS to CTS, and DSR to DTR are permanent.
To enable the secondary serial port, turn dip switch 5 (labeled "2COM") on the QED Board ON. Otherwise, dip switch 5 should be OFF so that it frees bit 3 of PORTA for use as general-purpose I/O.
If your application requires RS485, use the primary serial port (serial1) for RS485 communications, and use the secondary serial port (Serial 2) to program and debug your application code using the RS232 protocol. The default serial routines used by the onboard kernel assume that full duplex communications are available, so you cannot use the RS485 protocol to program the controller. You can use it to communicate with other devices.
A three-post jumper located between the third socket and H6 configures the primary serial port for either RS232 or RS485 operation.
For RS232 operation: Install the jumper shunt across the two pins closest to the crystal (the default configuration). In this case, cable connections may be made to Serial 1 on either the 10-pin Serial Communications Header or the Serial 1 Connector.
For RS485 operation: Install the jumper shunt across the two pins closest to the J3 silk screen. In this case, cable connections must be made to Serial 1 at pins 5 and 6 of the 10-pin Serial Communications Header. The RS485 connections are not brought out to the Serial 1 Connector.
Using the primary serial port is easy. In fact, you have been using it all along as you worked through the examples in this document. The standard C serial I/O routines such as printf(), scanf(), putchar(), and getchar() give you high level access to the serial ports. All high level routines call the following low level revectorable serial primitives to access the currently active serial port:
int   AskKey(void)   // returns a flag that is true if an input char is waiting
char  Key(void)      // waits for and returns the next input char
void  Emit(char)     // outputs the specified char to the serial port
Because all of the serial I/O routines on the QVGA Controller are revectorable, it is very easy to change the serial port in use without modifying any high level code.
Let's do a quick experiment to see how easy it is. We'll use code from the GETSTART.C program. If you have already downloaded the program, you are ready to go. If your board is presently running a multitasking application, type
WARM↓
to stop the program now.
If you have not yet compiled the GETSTART program and you want to do the exercises here, open GETSTART.C in your TextPad editor, click on the Make Tool (the Make icon), and after the compilation is done, enter the Terminal Program by clicking on the terminal icon and use the "Send Text File" menu item to send GETSTART.DLF to the QVGA Controller.
Before running the program, let's switch to the secondary serial port. The secondary serial port is implemented by a software UART that controls two pins on PortA. Pin 3 of PortA is the Serial2 input, and pin 4 of PortA is the Serial2 output. To switch to the secondary serial port running at 1200 baud, simply flip DIP switch #5 to the ON position to enable the secondary serial port hardware, and type from the terminal the following QED-Forth commands:
DECIMAL ↓
1200  BAUD2↓
USE.SERIAL2↓
You can operate the port at any baud rate up to 4800 baud; just specify the rate you want before the BAUD2 command. Now select the "Communications" item in the "Settings" menu of the Terminal program, and click on 1200 baud (or whatever baud rate you selected in the command above). Move the serial cable from the "Serial Port 1" connector to the "Serial Port 2" connector at the QVGA Controller. Typing a carriage return at the terminal should now produce the familiar "ok" response via the Serial2 port.
Now type:
main↓
and you'll see the familiar starting message of the GETSTART.C program:
Starting condition:
The radius is      0; the circular area is      0.
In fact, the program works the same as it did before, but now it is using the secondary serial port instead of the primary port -- and you didn't even have to recompile the code!
For those of you interested in the details, here's how it works: The low-level serial driver routines named Key(), AskKey() and Emit() are revectorable routines that can be redirected to use either of the serial ports. By interactively executing the QED-Forth function
before calling main, we revectored these serial primitives to use the Serial2 port.
You can invoke the C version of this routine by calling
UseSerial2()
anywhere within your C program's source code file. Function prototypes for this function and other versatile serial I/O routines are defined in the COMM.H header file, and are described in detail in the Control-C Glossary.
To return to using the primary serial port, simply type from the active terminal the QED-Forth command:
USE.SERIAL1
which transfers control back to serial port 1 running at the prior established baud rate (typically 9600 baud). A hardware reset (toggling DIP switch #7) has the same effect. If you do this now, remember to move the QVGA Controller's serial connector back to Serial Port 1, and to change the terminal's baud rate back to 9600 baud using the "Communications" item under the terminal's "Settings" menu.
If you always want the QVGA Controller to start up using the secondary serial port as the default serial communications link, you can type at your terminal:
1200 SERIAL2.AT.STARTUP↓
where 1200 is the baud rate that you choose; you can specify any standard baud rate up to 4800 baud. The complementary routine is:
SERIAL1.AT.STARTUP
which makes the primary serial port the default startup serial link. We recommend that you keep the faster Serial1 port as the default serial link as you work through the exercises in this book.
All of these functions that we are calling interactively via the operating system can also be called from C in your program source code; their C function prototypes are as follows:
void UseSerial1( void );
void Baud2( int baud );
void Serial1AtStartup( void );
void Serial2AtStartup( int baud );
In summary, the code provided for implementing the second serial port is very flexible and can be used to support dual concurrent communications ports. Data translation between different machines can be performed with ease, and applications that communicate via the primary serial port can be debugged using the secondary channel.
In multitasking systems using both serial ports Serial1 and Serial2, the application code should include one of the commands
SERIAL_ACCESS = RELEASE_ALWAYS;
SERIAL_ACCESS = RELEASE_NEVER;
before building the tasks. This prevents contention that can occur if the default RELEASE_AFTER_LINE option is installed in the SERIAL_ACCESS user variable.
The primary serial port, Serial1, is supported by the 68HC11's on-chip hardware UART, and does not require interrupts to work properly. On the other hand, the secondary serial port (Serial2) is implemented using hardware pins PA3 (input) and PA4 (output), and is controlled by the associated interrupts IC4/OC5 and OC4, respectively. The QVGA Controller's kernel software contains a complete set of high level driver routines for the Serial2 port, and these functions are summarized in the Control-C Glossary.
The maximum Serial2 communications rate is 4800 baud. Because the software UART is interrupt based, competing interrupts that prevent timely servicing of the Serial2 interrupts can cause communications errors on the secondary serial channel. For example, at 4800 baud (bits per second), each bit lasts about 200 microseconds (µs), and if communications are full duplex (e.g., if the QVGA Controller echoes each incoming character), then there is a serial interrupt every 100 µs or so. In the middle of a character, each interrupt service routine takes about 35 µs. At the end of a received character, the service routine takes about 45 µs. At the start of a transmitted character, the service routine takes about 65 µs. Thus, as a rough approximation, operating at 4800 baud full duplex requires about 40 to 50% of the 6811's CPU time (that is, an average of approximately 40 to 50 µs service time every 100 µs).
If you are running Serial2 at 4800 baud, the rest of your application must be able to function properly using the remaining portion of the CPU time. Moreover, if Serial2 is running full duplex at 4800 baud, any other interrupt service routine that takes longer than 100 µs is likely to cause a problem. If an interrupt service routine takes longer than 200 µs, then an entire serial bit will be missed, causing a communications error. Also, several non-serial interrupts can stack up; if they have higher priority than the serial interrupts, they will be serviced before the Serial2 interrupt routine, and again a serial input or output bit may be lost.
Routines that temporarily disable interrupts for significant periods of time can also interfere with the Serial2 port. The Control-C Glossary contains a list of functions that temporarily disable interrupts, and the glossary entries give further information regarding how long interrupts are disabled. In most cases the times are less than 25 µs which does not pose a problem. However, note that the ReadWatch() and SetWatch() functions disable interrupts for about one millisecond (msec.), and the functions that write to EEPROM disable interrupts for 20 msec. per programmed byte. Be sure to account for these effects when designing your application.
We have built sophisticated instruments using the QVGA Controller that operate very reliably using multiple interrupts in addition to the software UART. If your application requires use of the secondary serial port as well as other interrupt routines, the key is to keep the interrupt service routines short and fast. You might also consider operating the secondary serial port at a lower baud rate to relax the timing constraints.
The rate of data transmission is expressed in bits per second, or baud. The primary serial channel can operate at standard speeds up to 19200 baud and can be configured for either RS232 (the default) or RS485 operation. The Serial2 channel is always configured for RS232 communications, and can sustain baud rates up to 4800 baud.
The routines
make it easy to establish a standard baud rate at which the board will communicate each time it starts up. Although the maximum standard baud rate of the primary serial port is 19200 baud, nonstandard baud rates of over 80 Kbaud can be attained by the 68HC11's on-chip UART and the onboard RS232 driver. The maximum sustainable baud rate on the secondary serial port is 4800 baud.
While the default baud rate of the primary serial port is 9600 baud, you can speed your communications and download times appreciably by switching to a faster baud rate. It's very simple. Just type at your terminal:
DECIMAL↓
19200 BAUD1.AT.STARTUP↓
The new baud rate takes effect upon the next reset or restart. Thus you can type the command
or reset the board using DIP switch number 7, or turn the system off and on again. In each case, your QVGA Controller will be communicating at 19200 baud, and this baud rate will remain in effect until another BAUD1.AT.STARTUP command is executed, or until you invoke the Special Cleanup Mode as described earlier.
To reconfigure the Mosaic Terminal [pkc2]to communicate at 19200 baud, select the "Comm" item under the "Settings" menu and click on 19200 in the "Baud Rate" selection box.
The RS-232 driver (Maxim Part No. MAX242) can be tri-stated under software control. This allows standard point-to-point full duplex communications, as well as a multi-drop configuration with one master (a single QVGA Controller or a desktop computer) and multiple QVGA Controller slaves. To implement this multi-drop scheme, each slave keeps its RS-232 transmitter silent until it is addressed by the master and is given permission to transmit. The advantage of such a multi-drop RS-232 network is that the communications are full duplex, with each communicating party capable of simultaneous transmission and reception of data. The software routines, RS232Transmit() and RS232Silent() control the dual RS232 transmitters on the board.
Connecting a standard full duplex link RS232 between two computers is the same as with a standard RS232 link, with the TxD (transmitter output) of each computer connected to the RxD (receiver input) of the other computer. A serial cable accomplishs this connection.
In a multi-drop configuration, the TxD of the master is connected to the RxD of each slave, and the RxD of the master is connected to the TxD of each slave. Figure 11 1 shows a typical multi-drop communications network. The QVGA Controller makes it easy to configure a multi-drop network of QVGA Controllers controlled by a single master desktop computer.
To properly operate the network each slave computer executes RS232Silent at startup; thus all of the slave transmitters remain silent individually addressed by the master. When a slave is addressed, it executes RS232Transmit() at which point full duplex (two-way) communications commences between the master and the selected slave. When the communication is complete the slave silences its transmitter so that the master can talk to a different slave on the network.
Fig. 1 A typical RS232 multidrop communications network connects a single master computer to many slave devices.
Connecting computers together in multi-drop networks is common in factories and laboratories. In these distributed processing networks, a variety of machines and instruments work locally, but communicate and share data or resources with one another globally using a single serial link. You can use the QED Board's RS485 link to create such a multi-drop serial network.
In the most common multi-drop RS-485 protocol, one computer is designated as a "master" and the rest of the computers or devices on the serial bus are designated as "slaves". At any given time, only the master and a single "active" slave communicate. The remaining "inactive" slaves may actively receive, or listen to, data on the communications line, but only one slave at a time can transmit a message. If more than one slave tried to drive the transmit line simultaneously, their serial drivers would fight with each other for control of the bus. To ensure that no two devices drive the network at the same time, it is necessary that each slave device be able to disable it's own RS-485 data transmitter.
The Serial Peripheral Interface, SPI, is a fast synchronous serial interface. It provides a convenient means of connecting the QVGA Controller to a variety of peripheral devices, including analog to digital and digital to analog converters, real time clocks, and other computers which use high speed communication. The QVGA Controller's on-board 12 bit A/D and 8 bit D/A converters communicate with the processor via the SPI.
The SPI can transfer data much more rapidly than an asynchronous serial link – its maximum rate is 2 Megabits/second.
After configuring the SPI system to communicate on a properly connected network of devices, sending and receiving data is as simple as writing and reading a register. The QED-Forth kernel includes pre-coded drivers that configure the SPI for maximum speed data transfer using a format that is compatible with the on-board D/A and 12 bit A/D. This chapter describes those drivers, and presents code that makes it easy to configure the SPI for different data transfer rates and formats.
Hardware is interfaced to the SPI via four PORTD pins named /SS, SCK, MOSI, and MISO brought out to pins 11 through 14 on the Digital I/O connector (see Appendix A). The SCK (serial clock) pin is a configurable synchronous data clock output. This signal synchronizes the exchange of bytes between the 68HC11 processor and the peripherals. The byte-sized messages are transmitted and received via the MOSI (master out/slave in) and MISO (master in/slave out) pins. The /SS (active-low slave select) signal enables data transfers by slave devices when it is active low. A ground connection is also necessary to ensure that the communicating devices have a common voltage reference.
When the 68HC11 controls the network, it is referred to as a "master"; otherwise, it is a "slave". The distinction between master and slave is an important one. The device that initiates a data transfer is the master, and all other devices on the network are slaves. Only one active master may control the network at a time; however, the device that assumes the role of master may change according to an appropriate protocol.
The /SS pin can be configured as either an input or an output. Initializing the 68HC11 as a slave (by clearing the MSTR bit in the SPCR control register as explained below) automatically configures the /SS pin as an input. If the /SS input to a slave is inactive (high), the slave ignores the SCK input, does not transmit or receive data, and keeps its MISO output in a high-impedance state so that it does not interfere with the SPI bus. If the /SS input to a slave is active (low), the slave transfers data in response to the SCK clock input that is initiated by the master.
If the 68HC11 is initialized as a master (by setting the MSTR bit in the SPCR control register as explained below) then bit 5 of the Port D data direction register (DDRD) determines whether /SS is an input or an output. If bit 5 of DDRD is 1, then /SS is a general purpose output that operates independently of the SPI. This allows the processor that is master to control the input /SS pins of other CPU's, for example. If bit 5 of DDRD is 0, then /SS is an input. In this situation, if the /SS input is pulled low while the 68HC11 is the master, the processor detects a "mode fault" (by setting a bit in the SPI status register) meaning that there is more than one master device on the SPI bus.
There are many possible configurations of master/slave networks. Regardless of the network, however, there are only four signals used: SCK provides a synchronized clock, MOSI and MISO signals are used for data transmission and reception, and /SS configures the 68HC11 as a master or slave device. In this chapter we will consider the most general and simple configurations.
Configured as a master device, the 68HC11 transmits bytes via the "master out/slave in" pin, MOSI. It receives bytes sent by a slave device via the "master in/slave out" pin, MISO. Transmissions are always initiated by the master device, and consist of an exchange of bytes. As the master transmits a byte to an active slave (that is, a slave with its /SS input active low), the master receives a byte from the slave. It may be that only the byte sent from the master to the slave is meaningful; nevertheless, each device simultaneously transmits and receives one byte. The only difference between the master and slave devices is that the master initiates the transmission.
Slave devices use the master in/slave out pin, MISO, for transmitting, and the master out/slave in pin, MOSI, for receiving data. The following wiring diagram illustrates how the MOSI, and MISO pins of a master 68HC11 and a slave 68HC11 would be connected to exchange data:
Master 68HC11
Slave 68HC11
MOSI → MOSI
MISO ← MISO
SCK → SCK
/SS → /SS
GROUND ↔ GROUND
The status of a device as master or slave determines how the various pins must be configured. The arrows in the diagram point to pins configured as inputs, and originate from output pins. Thus, the master 68HC11 has only one input, MISO, which is the slave QVGA Controller's only output. Note that the master device outputs the clock synchronization signal SCK to the slave's SCK which is configured as an input. Also, in the diagram, the master QVGA Controller's /SS (slave select) is configured as an output. By setting this output LOW, the slave's input /SS is pulled LOW. The GROUND line serves as a common voltage reference for the master and slave.
There are a variety of ways the MOSI, MISO, SCK and /SS pins on your QVGA Controller can be connected. The one you choose depends on the specific device, or devices you will be connecting to. In some circumstances a one-way data flow may suffice. For example, a QVGA Controller connected to a serial A/D converter might have these connections:
Serial A/D Device
MOSI → not connected
MISO ← Conversion Output
SCK → CLK
/SS → /CS
In this example, the QVGA Controller selects the serial A/D by outputting a LOW signal on /SS. Even though the MOSI pin is not connected to anything, the master initiates a transmission using a "dummy" byte. The SCK pin clocks the serial A/D's CLK input which causes the A/D's conversion result to be transferred to the master via the MISO line.
The 68HC11 allows the details of the synchronous communications protocol to be customized for compatibility with a variety of peripherals. The next section describes the registers that configure and control the QVGA Controller's SPI.
The SPI is configured and accessed via four registers:
SPCR SPI control register MC68HC11F1 Technical Data Manual, p.10-3
SPSR SPI status register MC68HC11F1 Technical Data Manual, p.10-5
SPDR SPI data register MC68HC11F1 Technical Data Manual, p.10-5
PORTD.DIRECTION Port D data direction (DDRD) MC68HC11F1 Technical Data Manual,p. 4-5
Given a properly wired network and a properly configured SPCR control register, a master device may transmit a message by simply storing the byte to the SPDR data register. This automatically activates the SCK clock which synchronously transmits the data. As the master transmits its data, 8 bits of data are simultaneously received. The received data byte is accessed by reading SPDR data register. This ability to exchange messages means that the SPI is capable of full duplex communication. Once the data has been exchanged, a flag bit in the SPSR status register is set to indicate that the transfer is complete. If the programmer has enabled the local interrupt mask for the SPI, an interrupt is recognized at this point. Any required SPI output signals must be configured as outputs by setting the appropriate bits in the Port D data direction register which is named PORTD.DIRECTION in the QED-Forth kernel.
The SPI control register, SPCR, contains 8 bits which must be initialized for proper control of the QVGA Controller's SPI (M68HC11 Reference Manual, p.8-7). These bits are:
Bit Name
SPIE SPI interrupt enable
SPE SPI system enable
DWOM Port D wired-or mode
MSTR Master
CPOL Clock polarity
CPHA Clock phase
SPR1 SPI clock rate select bit1
The DWOM bit (port D wired-or mode) should always be set to 0. Setting DWOM to 1 takes away the processor's ability to pull the Port D signals high unless there is a pull-up resistor on each bit of the port. Setting this bit to 1 without installing pull-up resisters corrupts the operation of the serial communications interface which uses bits 0 and 1 of Port D.
Setting SPE (SPI enable) to 1 turns on the SPI system. This bit should be set only after all other SPI configuration is complete.
SPIE is a local interrupt mask that allows an interrupt to be recognized when an SPI data transfer has completed, or if a write collision or mode fault is detected.
Setting the MSTR bit initializes the 68HC11 as a master, and clearing the MSTR bit initializes it as a slave. Clearing the MSTR bit in the SPCR control register automatically configures the /SS (slave select) pin as an input. The /SS input in turn determines whether the slave responds to the SCK input, as described in a previous section. If the 68HC11 is initialized as a master by setting the MSTR bit, then bit 5 of the Port D data direction register (PORTD.DIRECTION) determines whether /SS is an input or an output. If the /SS pin of the master is an output, it can be controlled independently of the SPI system. If the /SS pin of the master is an input and if a low input level is detected, the processor sets the MODF bit in the SPI status register a "mode fault" condition. This detects the presence of more than one master on the SPI bus.
The CPOL, CPHA, SR1 and SPR0 configure the SCK pin's clock polarity, clock phase, and clock rate. These signals are described in detail below.
The SCK pin's synchronous clock signal has configurable phase, polarity and baud rate so that it can interface to a variety of synchronous serial devices. In general, all devices on a network should use the same phase, polarity, and baud rate clock signal. In some cases, however, a sophisticated network may have device groups on a network that use different clock configurations. Although the devices would share the same network, communications would only be understandable by members of the same group.
The clock's polarity is controlled by a bit named CPOL (clock polarity) and its phase is controlled by CPHA (clock phase). CPOL determines whether the clock idles in the low state (CPOL = 0) or the high state (CPOL = 1). If the clock idles in the low state, the leading edge of the clock is a rising edge. If the clock idles in the high state, the leading edge of the clock is a falling edge. The CPHA bit determines whether data is valid on the leading or trailing edge of the clock. Note that the data is changed by the transmitting device one half clock cycle before it is valid.
The following table summarizes the combinations of CPHA and CPOL settings:
CPOL
CPHA
Data is valid on the:
0 0 Rising, leading edge
0 1 Falling, trailing edge
1 0 Falling, leading edge
1 1 Rising, trailing edge
Many serial devices require a clock that idles in the low state (CPOL = 0), and expect valid data to be present on rising clock edges. Thus in this common configuration the transmitting device outputs the data when the clock goes low, and the receiving device samples the valid data when the clock goes high (CPHA = 0). In other words, data is valid on the "rising leading edge" of the clock.
To interface devices that support synchronized serial interfaces, but are not configurable like the 68HC11, determine the device's requirements for clock phase and polarity and configure the 68HC11's CPHA and CPOL accordingly. It is important to note that when the CPHA bit is 0, the /SS line must be de-asserted and re-asserted between each successive data byte exchange (M68HC11 Reference Manual, p.8-3). If the CPHA bit is 1, the /SS line may be tied low between successive transfers.
The two lowest order bits in the SPCR control register, named SPR1 and SPR0, determine the data exchange frequency expressed in bits per second; this frequency is also known as the baud rate. This setting is only relevant for the master device, as it is the master's clock which drives the transfer. SPR1 and SPR0 determine the baud rate according to the following table:
SPR1
SPI Frequency (bits/s)
0 0 2.0 MHz
1 0 250 kHz
The SPIE bit in the SPCR (SPI control register) enables SPI interrupt handling. The SPE bit turns on the SPI system. The DWOM bit determines whether Port D needs pull-up resistors; it should be set to 0. The MSTR bit determines whether the device is a master or slave. The CPOL and CPHA bits configure the synchronous clock polarity and phase and specify when valid data is present on the MISO and MOSI data lines. Finally, for master devices, the SPR1 and SPR0 bits determine the baud rate at which data is exchanged.
There are three flag bits implemented in the SPSR (SPI status register). They are:
SPIF SPI transfer complete
WCOL Write collision
MODF Mode fault
Any of these conditions may generate an interrupt if the SPIE (SPI interrupt enable) bit in the SPCR control register is set.
The SPIF is set when a data transfer is complete, and is cleared by a read of the SPSR status register, followed by a read or write to the SPDR data register. Thus, resetting the SPIF flag is very simple. After a data transfer is initiated by writing to the SPDR data register, the processor may poll the SPSR status register until the SPIF flag is set. Then reading the data that was received (by reading the SPDR) or initiating a new data transfer (by writing to the SPDR) automatically clears the SPIF flag. Alternatively, the if the SPI interrupts are enabled, the SPI interrupt handler determines what caused the interrupt by reading the SPSR register to see which of the three status bits is set. If SPIF is set, reading the received data or initiating a new data transfer automatically clears the SPIF bit.
A write collision occurs when a byte is written to the SPI data register, SPDR, while data is being exchanged. The WCOL flag is set when a write collision occurs. The data transfer that is in process when the write collision occurs is completed. WCOL is cleared by a read to the SPSR followed by a read or write to the SPDR.
A mode fault occurs when the SPI senses that a multimaster conflict (MC68HC11F1 Technical Data Manual, p.10-5) exists on the network as explained above in connection with the /SS input. When a mode fault is detected, the processor:
disables the SPI outputs by clearing the bits in the Port D data direction register (DDRD),
clears the MSTR bit in the SPCR to configure the SPI as a slave,
clears the SPE bit to disable the SPI, and
generates an interrupt if the SPIE bit in the SPCR is enabled
These steps greatly reduce the chance that the communicating devices might be damaged by contention on the SPI bus. The MODF bit is cleared by a read of the SPSR followed by a write to the SPCR.
A data transfer is initiated by a master device when it stores a message byte into its SPDR register. If a slave device has already stored a byte into its SPDR register, that byte will be exchanged with the master's byte. Once the bytes have been exchanged, the master may write a new byte to initiate another byte exchange. Although data byte transfers are easily executed once the network has been wired and configured properly, a carefully executed software protocol may be required to ensure data integrity.
The flexibility and power of the 68HC11's serial peripheral interface supports high speed communication between the 68HC11 and other synchronous serial devices. The interface can be used to support analog to digital and digital to analog converters, networks of many computers controlled by a single master, or networks of devices controlled by several coordinated masters. Pre-coded device drivers configure the SPI for a standard data format, and routines defined in this chapter make it easy to customize a data format and baud rate for your application. With careful design, many peripherals can communicate via the SPI, and powerful multi-processor systems can be linked using this high speed bus.
This page is about: RS232 and RS485 Serial Communications in Low Cost GUI Touchscreen Industrial Controller – How to enable and use serial RS232 and RS485 point to point and multidrop network communications on a 68HC11 microcontroller based GUI touchscreen industrial controller.
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How do you create a meaningful congregational experience when you've got a small number of kids in your congregation, few of whom are the same age? What will engage them, minister to their needs, and build a strong UU identity? You'll walk away with creative "out of the box" ideas for nurturing connections, fun, and faith across the ages and generations.


Holly is our Practice Administrator. She began her career in the dental field in 1999 as a RDA. She joined our team in 2007. She is married with three grown daughters and one young grandson.
She provides support to parents when it comes to scheduling, billing, and insurance concerns. She is your contact person to answer any financial questions you may have regarding your child's dental treatment. She is also the liaison providing information about our office and outstanding customer service.
I earned my RDA certificate in 2003 and I have been a part of our team since 2004. I can honestly say that I love coming to work each day. I enjoy working with kids and educating parents on how to keep their children's teeth cavity-free. Now that I am a mom, I understand the challenges in brushing children's teeth. I hope to pass along tips and techniques in making oral health care for your child easier.
I obtained my RDA certificate in 2011 after completing my undergraduate requirements in San Diego, California. I joined Santa Rosa Pediatric Dentistry shortly after graduation from the dental program at Santa Rosa Junior College. I enjoy working with children and educating them and their parents on the importance of proper dental hygiene and preventative care to overall health. I look forward to providing the highest level of care to your children.
I grew up mostly in Contra Costa and Solano Counties. My family had a summer cabin near the river where we spent lots of family vacations. I permanently moved to Forestville when I was a sophomore in high school. I now reside in Santa Rosa with my husband, Lee. I started my career in dentistry as a sterilization technician and they did on the job training to get my RDA license. I received my RDA license in November 2017. I love working with children and providing them with a fun and happy experience at the dentist.


text:
Bridget Conway-Taylor
Spreadsheet Daddy
Joined June 2020
Grapevine Membership
Black Trans Lives Thrive
We support nonprofits run by and for Black Trans Leaders. Members donate at least $25 each month.
IG @blacktranslivesthrive
TW @blacktransgc
Other Keywords: BIPOC, QTPOC, POC, People of Color, transgender, non-binary, gender non-conforming, transwo...
Nonprofits Supported
SWOP-Bronx
The Sex Workers Outreach Project is a national grassroots social justice network dedicated to the fundamental human rights of sex workers and their communities, focusing on ending violence and stigma through education, community building, and advocacy.
The Okra Project
Woodside, NY
The Okra Project is a collective that seeks to address the global crisis faced by Black Trans people by bringing home cooked, healthy, and culturally specific meals and resources to Black Trans People wherever we can reach them.
The Knights & Orchids Society Inc.
The Knights & Orchids Society (TKO) strives to build the power of the TLGB community for African Americans throughout rural areas in Alabama and across the south, to obtain our dream of justice and equality through group economics, education, leadership development, and organizing cultural work.
For The Gworls
To raise funds to help Black trans folks afford essential services that are often denied to them, such as rent and comprehensive healthcare. FTG accomplishes this not only with direct mutual aid for their community members' pockets, but also teach-ins, panel discussions, and providing healing spaces.
House of Tulip
We're raising funds to buy and restore a multi-family property in an area of New Orleans that's accessible to health care and employment opportunities. This will be our pilot permanent housing campus, and it will house up to 10 TGNC people at a time. In addition, we're working to acquire a separate space that can serve as a community center where TGNC people can safely access social safety net navigation, community programming, a hot meal, a shower, or a safe place to just hang out or do schoolwork.

redpajama_set_name: RedPajamaCommonCrawl


text:
Imports System.Runtime.InteropServices
Imports System.Collections.Generic
'Imports System.Runtime.InteropServices
Imports System.Text

Public Class WindowInfo
    Public Title As String = ""
    Public ClassName As String = ""
    Public hWnd As Int32
End Class

Public Class WindowsEnumerator

    Private Delegate Function EnumCallBackDelegate(ByVal hwnd As Integer, ByVal lParam As Integer) As Integer

    ' Top-level windows.
    Private Declare Function EnumWindows Lib "user32" _
     (ByVal lpEnumFunc As EnumCallBackDelegate, ByVal lParam As Integer) As Integer

    ' Child windows.
    Private Declare Function EnumChildWindows Lib "user32" _
     (ByVal hWndParent As Integer, ByVal lpEnumFunc As EnumCallBackDelegate, ByVal lParam As Integer) As Integer

    ' Get the window class.
    Private Declare Function GetClassName _
     Lib "user32" Alias "GetClassNameA" _
     (ByVal hwnd As Integer, ByVal lpClassName As StringBuilder, ByVal nMaxCount As Integer) As Integer

    ' Test if the window is visible--only get visible ones.
    Private Declare Function IsWindowVisible Lib "user32" _
     (ByVal hwnd As Integer) As Integer

    ' Test if the window's parent--only get the one's without parents.
    Private Declare Function GetParent Lib "user32" _
     (ByVal hwnd As Integer) As Integer

    ' Get window text length signature.
    Private Declare Function SendMessage _
     Lib "user32" Alias "SendMessageA" _
     (ByVal hwnd As Int32, ByVal wMsg As Int32, ByVal wParam As Int32, ByVal lParam As Int32) As Int32

    ' Get window text signature.
    Private Declare Function SendMessage _
     Lib "user32" Alias "SendMessageA" _
     (ByVal hwnd As Int32, ByVal wMsg As Int32, ByVal wParam As Int32, ByVal lParam As StringBuilder) As Int32

    Private _listChildren As New List(Of WindowInfo)
    Private _listTopLevel As New List(Of WindowInfo)

    Private _topLevelClass As String = ""
    Private _childClass As String = ""

    ''' <summary>
    ''' Get all top-level window information
    ''' </summary>
    ''' <returns>List of window information objects</returns>
    Public Overloads Function GetTopLevelWindows() As List(Of WindowInfo)

        EnumWindows(AddressOf EnumWindowProc, &H0)

        Return _listTopLevel

    End Function

    Public Overloads Function GetTopLevelWindows(ByVal className As String) As List(Of WindowInfo)

        _topLevelClass = className

        Return Me.GetTopLevelWindows()

    End Function

    ''' <summary>
    ''' Get all child windows for the specific windows handle (hwnd).
    ''' </summary>
    ''' <returns>List of child windows for parent window</returns>
    Public Overloads Function GetChildWindows(ByVal hwnd As Int32) As List(Of WindowInfo)

        ' Clear the window list.
        _listChildren = New List(Of WindowInfo)

        ' Start the enumeration process.
        EnumChildWindows(hwnd, AddressOf EnumChildWindowProc, &H0)

        ' Return the children list when the process is completed.
        Return _listChildren

    End Function

    Public Overloads Function GetChildWindows(ByVal hwnd As Int32, ByVal childClass As String) As List(Of WindowInfo)

        ' Set the search
        _childClass = childClass

        Return Me.GetChildWindows(hwnd)

    End Function

    ''' <summary>
    ''' Callback function that does the work of enumerating top-level windows.
    ''' </summary>
    ''' <param name="hwnd">Discovered Window handle</param>
    ''' <returns>1=keep going, 0=stop</returns>
    Private Function EnumWindowProc(ByVal hwnd As Int32, ByVal lParam As Int32) As Int32

        ' Eliminate windows that are not top-level.
        If GetParent(hwnd) = 0 AndAlso CBool(IsWindowVisible(hwnd)) Then

            ' Get the window title / class name.
            Dim window As WindowInfo = GetWindowIdentification(hwnd)

            ' Match the class name if searching for a specific window class.
            If _topLevelClass.Length = 0 OrElse window.ClassName.ToLower() = _topLevelClass.ToLower() Then
                _listTopLevel.Add(window)
            End If

        End If

        ' To continue enumeration, return True (1), and to stop enumeration
        ' return False (0).
        ' When 1 is returned, enumeration continues until there are no
        ' more windows left.

        Return 1

    End Function

    ''' <summary>
    ''' Callback function that does the work of enumerating child windows.
    ''' </summary>
    ''' <param name="hwnd">Discovered Window handle</param>
    ''' <returns>1=keep going, 0=stop</returns>
    Private Function EnumChildWindowProc(ByVal hwnd As Int32, ByVal lParam As Int32) As Int32

        Dim window As WindowInfo = GetWindowIdentification(hwnd)

        ' Attempt to match the child class, if one was specified, otherwise
        ' enumerate all the child windows.
        If _childClass.Length = 0 OrElse window.ClassName.ToLower() = _childClass.ToLower() Then
            _listChildren.Add(window)
        End If

        Return 1

    End Function

    ''' <summary>
    ''' Build the WindowInfo object to hold information about the Window object.
    ''' </summary>
    Private Function GetWindowIdentification(ByVal hwnd As Integer) As WindowInfo

        Const WM_GETTEXT As Int32 = &HD
        Const WM_GETTEXTLENGTH As Int32 = &HE

        Dim window As New WindowInfo()

        Dim title As New StringBuilder()

        ' Get the size of the string required to hold the window title.
        Dim size As Int32 = SendMessage(hwnd, WM_GETTEXTLENGTH, 0, 0)

        ' If the return is 0, there is no title.
        If size > 0 Then
            title = New StringBuilder(size + 1)

            SendMessage(hwnd, WM_GETTEXT, title.Capacity, title)
        End If

        ' Get the class name for the window.
        Dim classBuilder As New StringBuilder(64)
        GetClassName(hwnd, classBuilder, 64)

        ' Set the properties for the WindowInfo object.
        window.ClassName = classBuilder.ToString()
        window.Title = title.ToString()
        window.hWnd = hwnd

        Return window

    End Function

End Class

Module Win32API
    Public Const GA_ROOT As Int32 = 2
    Public Declare Function GetAncestor Lib "user32.dll" ( _
      ByVal hwnd As Int32, _
      ByVal gaFlags As Int32) As Int32
    Public Const GA_PARENT As Int32 = 1
    Public Const GA_ROOTOWNER As Int32 = 3

    Public Declare Function FindWindowEx Lib "user32.dll" Alias "FindWindowExA" ( _
      ByVal hwndParent As Int32, _
      ByVal hwndChildAfter As Int32, _
      ByVal lpszClass As String, _
      ByVal lpszWindow As String) As Int32
    Public Declare Function GetWindow Lib "user32.dll" ( _
      ByVal hwnd As Int32, _
      ByVal wCmd As Int32) As Int32
    Public Declare Function PrintWindow Lib "user32.dll" ( _
      ByVal hWnd As Int32, _
      ByVal hdcBlt As Int32, _
      ByVal nFlags As Int32) As Int32
    Public Declare Function GetClassName Lib "user32.dll" Alias "GetClassNameA" ( _
      ByVal hwnd As Int32, _
      ByVal lpClassName As String, _
      ByVal nMaxCount As Int32) As Int32
    Public Declare Function GetActiveWindow Lib "user32.dll" () As Int32
    Public Declare Function GetDesktopWindow Lib "user32.dll" () As Int32
    Public Declare Function GetWindowDC Lib "user32.dll" ( _
      ByVal hwnd As Int32) As Int32
    Public Declare Function GetClientRect Lib "user32.dll" ( _
      ByVal hwnd As Int32, _
      ByRef lpRect As RECT) As Int32
    Public Declare Function StretchBlt Lib "gdi32.dll" (ByVal hdc As Long, ByVal x As Long, ByVal y As Long, ByVal nWidth As Long, ByVal nHeight As Long, ByVal hSrcDC As Long, ByVal xSrc As Long, ByVal ySrc As Long, ByVal nSrcWidth As Long, ByVal nSrcHeight As Long, ByVal dwRop As Long) As Long
    Public Declare Function GetCursorPos Lib "user32.dll" ( _
      ByRef lpPoint As POINTAPI) As Int32

    <StructLayout(LayoutKind.Sequential)> _
    Public Structure POINTAPI
        Public x As Int32
        Public y As Int32
    End Structure

    <StructLayout(LayoutKind.Sequential)> _
    Public Structure RECT
        Public Left As Int32
        Public Top As Int32
        Public Right As Int32
        Public Bottom As Int32
    End Structure

    Public Declare Function IsWindow Lib "user32.dll" ( _
      ByVal hwnd As Int32) As Int32
    Public Declare Function IsWindowVisible Lib "user32.dll" ( _
      ByVal hwnd As Int32) As Int32
    Public Declare Function ReleaseDC Lib "user32.dll" ( _
      ByVal hwnd As Int32, _
      ByVal hdc As Int32) As Int32

    Public Declare Function GetDC Lib "user32.dll" ( _
      ByVal hwnd As Int32) As Int32

    Public Declare Function GetWindowRect Lib "user32.dll" ( _
      ByVal hwnd As Int32, _
      ByRef lpRect As RECT) As Int32
    Public Declare Function BitBlt Lib "gdi32.dll" ( _
      ByVal hDestDC As Int32, _
      ByVal x As Int32, _
      ByVal y As Int32, _
      ByVal nWidth As Int32, _
      ByVal nHeight As Int32, _
      ByVal hSrcDC As Int32, _
      ByVal xSrc As Int32, _
      ByVal ySrc As Int32, _
      ByVal dwRop As Int32) As Int32
    Public Const SRCCOPY As Int32 = &HCC0020

    Public Declare Function GetParent Lib "user32.dll" ( _
      ByVal hwnd As Int32) As Int32
    Public Const GW_CHILD As Int32 = 5
    Public Const GW_HWNDFIRST As Int32 = 0
    Public Const GW_HWNDLAST As Int32 = 1
    Public Const GW_HWNDNEXT As Int32 = 2
    Public Const GW_HWNDPREV As Int32 = 3
    Public Const GW_OWNER As Int32 = 4

    Public Declare Function GetForegroundWindow Lib "user32.dll" () As Int32

    Public Declare Function ShowWindow Lib "user32.dll" ( _
      ByVal hwnd As Int32, _
      ByVal nCmdShow As Int32) As Int32
    Public Const SW_HIDE As Int32 = 0
    Public Const SW_MAXIMIZE As Int32 = 3
    Public Const SW_MINIMIZE As Int32 = 6
    Public Const SW_NORMAL As Int32 = 1
    Public Const SW_SHOW As Int32 = 5
    Public Const SW_SHOWMINIMIZED = 2
    Public Const SW_RESTORE As Int32 = 9

    Public Declare Function DeleteDC Lib "gdi32.dll" ( _
      ByVal hdc As Int32) As Int32

    Public Declare Function ShowCursor Lib "user32.dll" ( _
      ByVal bShow As Int32) As Int32

    Public Declare Function SetWindowPlacement Lib "user32.dll" ( _
      ByVal hwnd As Int32, _
      ByRef lpwndpl As WINDOWPLACEMENT) As Int32

    Public Declare Function SetForegroundWindow Lib "user32.dll" ( _
      ByVal hwnd As Int32) As Int32
    Public Declare Function BringWindowToTop Lib "user32.dll" ( _
      ByVal hwnd As Int32) As Int32
    Public Declare Sub Sleep Lib "kernel32.dll" ( _
            ByVal dwMilliseconds As Int32)

    Public Declare Function GetWindowPlacement Lib "user32.dll" ( _
      ByVal hwnd As Int32, _
      ByRef lpwndpl As WINDOWPLACEMENT) As Int32
    <StructLayout(LayoutKind.Sequential)> _
    Public Structure WINDOWPLACEMENT
        Public Length As Int32
        Public flags As Int32
        Public showCmd As Int32
        Public ptMinPosition As POINTAPI
        Public ptMaxPosition As POINTAPI
        Public rcNormalPosition As RECT
    End Structure

    'Private Declare Function CreateBitmapIndirect Lib "gdi32.dll" (ByRef lpBitmap As Bitmap) As Long

    Public Const SRCINVERT As Long = &H660046
    Public Declare Function CreateCompatibleBitmap Lib "gdi32.dll" (ByVal hdc As Long, ByVal nWidth As Long, ByVal nHeight As Long) As Long
    Public Declare Function CreateCompatibleDC Lib "gdi32.dll" (ByVal hdc As Long) As Long
    Public Declare Function SelectObject Lib "gdi32.dll" (ByVal hdc As Long, ByVal hObject As Long) As Long
    Public Declare Function DeleteObject Lib "gdi32.dll" (ByVal hObject As Long) As Long

End Module

redpajama_set_name: RedPajamaGithub


text:
Last edited by Mezihn
4 edition of Witch hunt found in the catalog.
Isabel Adam
the great Scottish witchcraft trials of 1697
by Isabel Adam
Published 1978 by Macmillan in London .
Paisley,
Paisley.
Paisley Abbey.,
Trials (Witchcraft) -- Scotland -- Paisley -- History -- 17th century.,
Witchcraft -- Scotland -- Paisley.
Statement [by] Isabel Adam.
LC Classifications BF1581 .A37 1978
Painless Life Science
The function of the international confederation of free trade unions
Reminiscences Of Sixty Years In Public Affairs V1
This is the Trekka
Conquering College with ADD
Recommender Systems for Social Tagging Systems
Words of our country
Analysis of A Paleo-Indian Occupation Floor at the Duck River Site, Eimb-10, Manitoba.
Introduction to radiation chemistry
Survey of World Cultures
The Mediaeval boroughs of Snowdonia
Theory for Economic Efficiency
Aviation and the environment
Art in action.
J. Stephen Langs Bible Trivia 2004 Calendar
user guide to the UNIX system
Canadian external relations
The Photographic Journal of America: The Oldest Photography Magazine in America
Witch hunt by Isabel Adam Download PDF EPUB FB2
"Witch Hunt is a spectacular encyclopedia of what went on in the biggest hoax and scandal in American history. I highly recommend it; it is an awesome book." (Dan Bongino) I highly recommend it; it is an awesome book." (Dan Bongino)/5().
Witch Hunt: The Story of the Greatest Mass Delusion in American Political History. The author of the #1 New York Times bestseller The Russia Hoax picks up where that book ended with this hard-hitting, well-reasoned examination of the latest findings about "collusion" between the Trump Administration and the Russians, offering further proof that Special Counsel Robert Mueller's investigation is nothing more than a politically motivated witch hunt.
The author of the #1 New York Times bestseller The Russia Hoax picks up where that book ended with this hard-hitting, well-reasoned examination of the latest findings about collusion between the Trump Administration and the Russians, offering further proof that Special Counsel Robert Muellers investigation is nothing more than a politically motivated witch hunt/5.
Witch Hunt book. Read 94 reviews from the world's largest community for readers. A chilling, haunting ghost story that delves into the dark past of the 1 /5.
The Witch Hunt is a political comedy told through the eyes of two innocent secret service agents, both minorities, who are thrown in jail to protect a white ex-president, convicted of serious are tricked into taking the assignment.
While they are in prison, Witch hunt book country struggles to come together, even as it continues to be driven apart. Witch Hunt is a spectacular encyclopedia of what went on in the biggest hoax and scandal in American history.I highly recommend it; it is an awesome book.
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Witch Hunt is a downloadable content for Dragon Age: Origins that explores the whereabouts of Morrigan, the Witch of the Wilds, who aided the Warden during the Fifth Blight. The final DLC for Origins, it was released on September 7th, Witch Hunt was patched to version on September 20th, The dreaded Archdemon has been slain and Appearances: Dragon Age: Origins - Witch Hunt.
Book overview. This Hardcover Edition of Gregg Jarrett's Witch Hunt: The Story of the Greatest Mass Delusion in American Political History is autographed on a bookplate by Gregg Jarrett. Witch Hunt: The Story of the Greatest Mass Delusion in American Political History by Gregg Jarrett.
The author of the #1 New York Times bestseller The Russia Hoax picks up where that book ended with this hard-hitting, well-reasoned examination of the latest findings about "collusion" between the Trump Administration and the Russians.
The authors have presented a must read for everyone. This book should be part of the curriculum in every learning venue from high school to college. This book is an in depth reveal of the deep states most treacherous and shocking actions. Witch Hunt will be a book that.
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I highly recommend it; it is an awesome book." (Dan Bongino) "When this moment in history finally passes, history will have Gregg Jarrett's /5().
It's the Real Story of the Rigged Witch Hunt. — Donald J. Trump (@realDonaldTrump) August 2, In defending Trump, Jarrett makes a number of claims that raised our eyebrows. Witch parties, witch protests and a bevy of new books: We have reached peak witch.
Fifty-one years ago, a group of protesters calling themselves W.I.T.C.H. staged a Halloween "hex" on Wall. Senior officials at the FBI, blinded by their political bias and hatred of Trump, went after the wrong person.
At the DOJ, the deputy attorney general discussed secretly recording the president and recruiting members of the cabinet to depose Trump. Those behind the Witch Hunt have either been fired or resigned/5(34).
Witch Hunt | The author of the #1 New York Times bestseller The Russia Hoax picks up where that book ended with this hard-hitting, well-reasoned examination of the latest findings about "collusion" between the Trump Administration and the Russians, offering further proof that Special Counsel Robert Mueller's investigation is nothing more than a politically motivated witch did a small Brand: Broadside Books.
When swirling charges of rigged elections, witch hunts, and a coup plotted by the "deep state" are referred to as "conspiracy theory," this is not just a misnomer but a misunderstanding.
Open Library is an open, editable library catalog, building towards a web page for every book ever published. Witch-hunt by Marc Aronson,Atheneum Books for Young Readers edition, in English Witch-hunt ( edition) | Open LibraryPages: A few years after the fateful storm, the local legal authority invites Commissioner Absalom Cornet, a seasoned Scottish witch hunter, to Finnmark, where the "Devil's breath reeks.".
The author of the #1 New York Times bestseller The Russia Hoax picks up where that book ended with this hard-hitting, well-reasoned examination of the latest findings about "collusion" between the Trump Administration and the Russians, offering further proof that Special Counsel Robert Mueller's investigation is nothing more than a politically motivated witch hunt.1/5(1).
'Witch Hunt': New Book Claims Trump Victim of 'Dirtiest Trick in American Political History' What's coming up next. New Book Claims Trump Victim of 'Dirtiest Trick in American Political. The Malleus Maleficarum, a Latin book written in andis also known as "The Hammer of Witches." This is a translation of the title.
Authorship of the book is credited to two German Dominican monks, Heinrich Kramer and Jacob Sprenger. Even tho the Mueller witch hunt was just that the traitors do not cease and desist, they follow with impeachment witch hunt.
Perhaps the bad guys go back to alot of Dems—namely Pelosi, Nadler, Schiff and Schumer. Soros has got to be involved somehow. They have to be morally bankrupt to face the American people with their vicious lies and : Gregg Jarrett.
The book gives an analytical review of the history of witch-hunt historiography. The history of the witch-hunt research gives understanding of cultural and academic trends which direct any research even when scholars are not cognisent of their underlying premises.
#1 Bestseller in [pdf] [kindle] [epub] [tuebl] [mobi] [audiobook], #1 New Release >>. I read the book Witch Hunt, by Marc Aronson. Witch Hunt is a Non-Fiction story about the witch trials in old Salem.
Elizabeth Knapp was doing the daily jobs that she does while working for. Witch Hunt The Story of the Greatest Mass Delusion in American Political History (Book): Jarrett, Gregg: "Now that every detail and argument set forth in the #1 New York Times bestseller The Russia Hoax has been borne out by the Mueller report, the author is back with a hard-hitting, well-reasoned evisceration of what may be the dirtiest trick in political history" Witch-Hunt: Mysteries of the Salem Witch Trials by Marc Aronson Amazon/Barnes & Noble Published by: Atheneum Books for Young Readers Review by: Dani Hoots The mysteries behind the Salem Witch Trials has baffled scholars for many generations.
What was the truth behind the witch accusations. Did people really believe that Salem was plagued by witches or. WITCH HUNT is an exhilarating espionage thriller that hooks the audience once the key cast is introduced and fans get over the fact that Rebus is not here.
The story line moves quickly forward with several plots tied together through the Witch link in a sort of Sink the Bismarck kind of way as several groups independently give chase.5/5(5). Witch Hunt - Ebook written by Annie Bellet. Read this book using Google Play Books app on your PC, android, iOS devices.
Download for offline reading, highlight, bookmark or take notes while you read Witch Hunt/5(). Buy a cheap copy of Witch Hunt book by Wendy Corsi Staub. When Abbey Hanover's parents inherit an old house in Massachusetts, she discovers that Felicity Crane had been hanged there three hundred years ago as a witch, and Free shipping over $/5(5).
What will unfold is An investigation into what historians Will ConSIder one of the greatest political 'witch-hunts' in U.S. history. If justice is served, those responsible will be outed and prosecuted. The roughly page report is what it is and now it is available for the public.
After more than two years and national media consumption. Witch Hunt is entirely different and separate. The only similarities are the precise yet easy to grasp writing style and the thoroughly researched & referenced materials the author presented. Gregg Jarrett is a top-notch conveyor of legal truths, both verbally and in the written word.
I highly recommend Witch Hunt and The Russia Hoax/5(). Witch Hunt reminds us that our system of justice in America is designed to protect the innocent.
It is, in a word, unfair for prosecutors to smear people who have not been charged with anything. Despite this, Mueller's report is a string of one-sided accusations and out-of-context misbehavior that Mueller knew could never amount to a criminal Brand: Readerlink.
Ruth Warburton, Witch Hunt This is the second book in the Witch Finder series (sequel to Witch Finder) picking up right where the first book left off. Witch Hunt | How did a small group of powerful intelligence officials convince tens of millions of Americans that the president is a traitor, without a shred of evidence?Now that every detail and argument set forth in the #1 New York Times bestseller The Russia Hoax has been borne out by the Mueller report, the author is back with a hard-hitting, well-reasoned evisceration of what may be the Brand: HarperCollins.
Read "Witch Hunt An Urban Fantasy Mystery" by SM Reine available from Rakuten Kobo. A brutal murder. There are scratches on Cèsar Hawke's arms, a discharged Glock on his coffee table, and a dead woman in 4/5().
In this powerful book, Debbie Nathan and Mike Snedeker examine the forces fueling this blind panic. From inside the book.
What people are saying - Write a review. SATAN'S SILENCE: Ritual Abuse and the Making of a Modern American Witch-Hunt User Review - Kirkus.5/5(1). Witch-hunt definition: A witch-hunt is an attempt to find and punish a particular group of people who are being | Meaning, pronunciation, translations and examples.
Tony Fels, professor emeritus of history at the University of San Francisco, joined Ian Punnett to discuss his book, Switching Sides, which traces a shift in scholarly interpretations of the Salem witch hunt from World War II to the defined.
Directed by Elle Callahan. With Elizabeth Mitchell, Abigail Cowen, Christian Camargo, Gideon Adlon. In a modern America where witches are real and witchcraft is illegal, a sheltered teenager must face her own demons and prejudices as she helps two young witches avoid law enforcement and cross the southern border to asylum in Mexico.Witch-Hunt by Marc Aronson - Salem, Massachusetts, In a plain meetinghouse a woman stands before her judges.
The accusers, girls and young women, are Released on: Aug Pre-order a signed copy of Gregg Jarrett's book "Witch Hunt" and join him from anywhere for a virtual book signing and discussion.
coinclassifier.club - Witch hunt book © 2020


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How to File a Nebraska Biennial Report
One of the requirements of maintaining an LLC or corporation in Nebraska is filing a Biennial Report. The Biennial Report is used to confirm and update the company's information every other year with the Nebraska Secretary of State.
What is Needed to File a Nebraska Biennial Report
The Biennial Report can only be filed online by going to the Nebraska Secretary of State's website.
Entity Account Number – Find your Account Number by doing a name search with the Secretary of State.
Brief description of the business activities
Biennial Report Cost
The cost to file a Biennial Report in Nebraska varies on the type of business entity.
Corporations: Based on the value of capital stock – $26 minimum
LLCs: $13 online filing or $10 mail in forms
The State of Nebraska has different deadlines depending on the business entity.
Corporations: The Biennial Report is due for Corporations by March 1st every even-numbered year, starting after the year the Corporation was formed.
LLC: The Biennial Report is due for LLCs by April 1st every odd-numbered year, starting after the year the LLC was formed.
The Secretary of State's office emails a reminder in advance of the report due date to the Registered Agent. Even though a reminder is sent, it's important to make an additional reminder for yourself should you not receive it.
My business made little or no money. Do I still have to file the Biennial Report?
Even if your Corporation or LLC received no income or had no business activity, the Biennial Report is still required to be filed.
What happens if you don't file the Biennial Report on time?
While there isn't a fee for a late filing, if the Biennial Report isn't filed before June 1st, the entity will be administratively revoked by the Secretary of State.
Nebraska Secretary of State Contact Information
Nebraska Secretary of State
1201 N Street, Suite 120
If you have questions, they can be contacted at (402)-471-2554 or sos.corp@nebraska.gov.
How to Register for a Nebraska EIN
How to Form an LLC in Nebraska
What Business Licenses & Permits are Needed in Nebraska?
Steps to Hiring your First Employee in Nebraska
How to get a Resale Certificate in Nebraska
How to Register for a Sales Tax Permit in Nebraska