text:
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/gpio.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/slab.h>
#include <linux/of_device.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
#include <linux/pinctrl/pinconf.h>
/* Since we request GPIOs from ourself */
#include <linux/pinctrl/consumer.h>

#include <asm/mach/irq.h>

#include <plat/pincfg.h>
#include <plat/gpio-nomadik.h>

#include "pinctrl-nomadik.h"

/*
 * The GPIO module in the Nomadik family of Systems-on-Chip is an
 * AMBA device, managing 32 pins and alternate functions.  The logic block
 * is currently used in the Nomadik and ux500.
 *
 * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
 */

#define NMK_GPIO_PER_CHIP	32

struct nmk_gpio_chip {
	struct gpio_chip chip;
	struct irq_domain *domain;
	void __iomem *addr;
	struct clk *clk;
	unsigned int bank;
	unsigned int parent_irq;
	int secondary_parent_irq;
	u32 (*get_secondary_status)(unsigned int bank);
	void (*set_ioforce)(bool enable);
	spinlock_t lock;
	bool sleepmode;
	/* Keep track of configured edges */
	u32 edge_rising;
	u32 edge_falling;
	u32 real_wake;
	u32 rwimsc;
	u32 fwimsc;
	u32 rimsc;
	u32 fimsc;
	u32 pull_up;
	u32 lowemi;
};

struct nmk_pinctrl {
	struct device *dev;
	struct pinctrl_dev *pctl;
	const struct nmk_pinctrl_soc_data *soc;
};

static struct nmk_gpio_chip *
nmk_gpio_chips[DIV_ROUND_UP(ARCH_NR_GPIOS, NMK_GPIO_PER_CHIP)];

static DEFINE_SPINLOCK(nmk_gpio_slpm_lock);

#define NUM_BANKS ARRAY_SIZE(nmk_gpio_chips)

static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip,
				unsigned offset, int gpio_mode)
{
	u32 bit = 1 << offset;
	u32 afunc, bfunc;

	afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
	bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
	if (gpio_mode & NMK_GPIO_ALT_A)
		afunc |= bit;
	if (gpio_mode & NMK_GPIO_ALT_B)
		bfunc |= bit;
	writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
	writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
}

static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip,
				unsigned offset, enum nmk_gpio_slpm mode)
{
	u32 bit = 1 << offset;
	u32 slpm;

	slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC);
	if (mode == NMK_GPIO_SLPM_NOCHANGE)
		slpm |= bit;
	else
		slpm &= ~bit;
	writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC);
}

static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
				unsigned offset, enum nmk_gpio_pull pull)
{
	u32 bit = 1 << offset;
	u32 pdis;

	pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
	if (pull == NMK_GPIO_PULL_NONE) {
		pdis |= bit;
		nmk_chip->pull_up &= ~bit;
	} else {
		pdis &= ~bit;
	}

	writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);

	if (pull == NMK_GPIO_PULL_UP) {
		nmk_chip->pull_up |= bit;
		writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
	} else if (pull == NMK_GPIO_PULL_DOWN) {
		nmk_chip->pull_up &= ~bit;
		writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
	}
}

static void __nmk_gpio_set_lowemi(struct nmk_gpio_chip *nmk_chip,
				  unsigned offset, bool lowemi)
{
	u32 bit = BIT(offset);
	bool enabled = nmk_chip->lowemi & bit;

	if (lowemi == enabled)
		return;

	if (lowemi)
		nmk_chip->lowemi |= bit;
	else
		nmk_chip->lowemi &= ~bit;

	writel_relaxed(nmk_chip->lowemi,
		       nmk_chip->addr + NMK_GPIO_LOWEMI);
}

static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,
				  unsigned offset)
{
	writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
}

static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip,
				  unsigned offset, int val)
{
	if (val)
		writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATS);
	else
		writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATC);
}

static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip,
				  unsigned offset, int val)
{
	writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
	__nmk_gpio_set_output(nmk_chip, offset, val);
}

static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip,
				     unsigned offset, int gpio_mode,
				     bool glitch)
{
	u32 rwimsc = nmk_chip->rwimsc;
	u32 fwimsc = nmk_chip->fwimsc;

	if (glitch && nmk_chip->set_ioforce) {
		u32 bit = BIT(offset);

		/* Prevent spurious wakeups */
		writel(rwimsc & ~bit, nmk_chip->addr + NMK_GPIO_RWIMSC);
		writel(fwimsc & ~bit, nmk_chip->addr + NMK_GPIO_FWIMSC);

		nmk_chip->set_ioforce(true);
	}

	__nmk_gpio_set_mode(nmk_chip, offset, gpio_mode);

	if (glitch && nmk_chip->set_ioforce) {
		nmk_chip->set_ioforce(false);

		writel(rwimsc, nmk_chip->addr + NMK_GPIO_RWIMSC);
		writel(fwimsc, nmk_chip->addr + NMK_GPIO_FWIMSC);
	}
}

static void
nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned offset)
{
	u32 falling = nmk_chip->fimsc & BIT(offset);
	u32 rising = nmk_chip->rimsc & BIT(offset);
	int gpio = nmk_chip->chip.base + offset;
	int irq = NOMADIK_GPIO_TO_IRQ(gpio);
	struct irq_data *d = irq_get_irq_data(irq);

	if (!rising && !falling)
		return;

	if (!d || !irqd_irq_disabled(d))
		return;

	if (rising) {
		nmk_chip->rimsc &= ~BIT(offset);
		writel_relaxed(nmk_chip->rimsc,
			       nmk_chip->addr + NMK_GPIO_RIMSC);
	}

	if (falling) {
		nmk_chip->fimsc &= ~BIT(offset);
		writel_relaxed(nmk_chip->fimsc,
			       nmk_chip->addr + NMK_GPIO_FIMSC);
	}

	dev_dbg(nmk_chip->chip.dev, "%d: clearing interrupt mask\n", gpio);
}

static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
			     pin_cfg_t cfg, bool sleep, unsigned int *slpmregs)
{
	static const char *afnames[] = {
		[NMK_GPIO_ALT_GPIO]	= "GPIO",
		[NMK_GPIO_ALT_A]	= "A",
		[NMK_GPIO_ALT_B]	= "B",
		[NMK_GPIO_ALT_C]	= "C"
	};
	static const char *pullnames[] = {
		[NMK_GPIO_PULL_NONE]	= "none",
		[NMK_GPIO_PULL_UP]	= "up",
		[NMK_GPIO_PULL_DOWN]	= "down",
		[3] /* illegal */	= "??"
	};
	static const char *slpmnames[] = {
		[NMK_GPIO_SLPM_INPUT]		= "input/wakeup",
		[NMK_GPIO_SLPM_NOCHANGE]	= "no-change/no-wakeup",
	};

	int pin = PIN_NUM(cfg);
	int pull = PIN_PULL(cfg);
	int af = PIN_ALT(cfg);
	int slpm = PIN_SLPM(cfg);
	int output = PIN_DIR(cfg);
	int val = PIN_VAL(cfg);
	bool glitch = af == NMK_GPIO_ALT_C;

	dev_dbg(nmk_chip->chip.dev, "pin %d [%#lx]: af %s, pull %s, slpm %s (%s%s)\n",
		pin, cfg, afnames[af], pullnames[pull], slpmnames[slpm],
		output ? "output " : "input",
		output ? (val ? "high" : "low") : "");

	if (sleep) {
		int slpm_pull = PIN_SLPM_PULL(cfg);
		int slpm_output = PIN_SLPM_DIR(cfg);
		int slpm_val = PIN_SLPM_VAL(cfg);

		af = NMK_GPIO_ALT_GPIO;

		/*
		 * The SLPM_* values are normal values + 1 to allow zero to
		 * mean "same as normal".
		 */
		if (slpm_pull)
			pull = slpm_pull - 1;
		if (slpm_output)
			output = slpm_output - 1;
		if (slpm_val)
			val = slpm_val - 1;

		dev_dbg(nmk_chip->chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",
			pin,
			slpm_pull ? pullnames[pull] : "same",
			slpm_output ? (output ? "output" : "input") : "same",
			slpm_val ? (val ? "high" : "low") : "same");
	}

	if (output)
		__nmk_gpio_make_output(nmk_chip, offset, val);
	else {
		__nmk_gpio_make_input(nmk_chip, offset);
		__nmk_gpio_set_pull(nmk_chip, offset, pull);
	}

	__nmk_gpio_set_lowemi(nmk_chip, offset, PIN_LOWEMI(cfg));

	/*
	 * If the pin is switching to altfunc, and there was an interrupt
	 * installed on it which has been lazy disabled, actually mask the
	 * interrupt to prevent spurious interrupts that would occur while the
	 * pin is under control of the peripheral.  Only SKE does this.
	 */
	if (af != NMK_GPIO_ALT_GPIO)
		nmk_gpio_disable_lazy_irq(nmk_chip, offset);

	/*
	 * If we've backed up the SLPM registers (glitch workaround), modify
	 * the backups since they will be restored.
	 */
	if (slpmregs) {
		if (slpm == NMK_GPIO_SLPM_NOCHANGE)
			slpmregs[nmk_chip->bank] |= BIT(offset);
		else
			slpmregs[nmk_chip->bank] &= ~BIT(offset);
	} else
		__nmk_gpio_set_slpm(nmk_chip, offset, slpm);

	__nmk_gpio_set_mode_safe(nmk_chip, offset, af, glitch);
}

/*
 * Safe sequence used to switch IOs between GPIO and Alternate-C mode:
 *  - Save SLPM registers
 *  - Set SLPM=0 for the IOs you want to switch and others to 1
 *  - Configure the GPIO registers for the IOs that are being switched
 *  - Set IOFORCE=1
 *  - Modify the AFLSA/B registers for the IOs that are being switched
 *  - Set IOFORCE=0
 *  - Restore SLPM registers
 *  - Any spurious wake up event during switch sequence to be ignored and
 *    cleared
 */
static void nmk_gpio_glitch_slpm_init(unsigned int *slpm)
{
	int i;

	for (i = 0; i < NUM_BANKS; i++) {
		struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
		unsigned int temp = slpm[i];

		if (!chip)
			break;

		clk_enable(chip->clk);

		slpm[i] = readl(chip->addr + NMK_GPIO_SLPC);
		writel(temp, chip->addr + NMK_GPIO_SLPC);
	}
}

static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm)
{
	int i;

	for (i = 0; i < NUM_BANKS; i++) {
		struct nmk_gpio_chip *chip = nmk_gpio_chips[i];

		if (!chip)
			break;

		writel(slpm[i], chip->addr + NMK_GPIO_SLPC);

		clk_disable(chip->clk);
	}
}

static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
{
	static unsigned int slpm[NUM_BANKS];
	unsigned long flags;
	bool glitch = false;
	int ret = 0;
	int i;

	for (i = 0; i < num; i++) {
		if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C) {
			glitch = true;
			break;
		}
	}

	spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);

	if (glitch) {
		memset(slpm, 0xff, sizeof(slpm));

		for (i = 0; i < num; i++) {
			int pin = PIN_NUM(cfgs[i]);
			int offset = pin % NMK_GPIO_PER_CHIP;

			if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C)
				slpm[pin / NMK_GPIO_PER_CHIP] &= ~BIT(offset);
		}

		nmk_gpio_glitch_slpm_init(slpm);
	}

	for (i = 0; i < num; i++) {
		struct nmk_gpio_chip *nmk_chip;
		int pin = PIN_NUM(cfgs[i]);

		nmk_chip = nmk_gpio_chips[pin / NMK_GPIO_PER_CHIP];
		if (!nmk_chip) {
			ret = -EINVAL;
			break;
		}

		clk_enable(nmk_chip->clk);
		spin_lock(&nmk_chip->lock);
		__nmk_config_pin(nmk_chip, pin % NMK_GPIO_PER_CHIP,
				 cfgs[i], sleep, glitch ? slpm : NULL);
		spin_unlock(&nmk_chip->lock);
		clk_disable(nmk_chip->clk);
	}

	if (glitch)
		nmk_gpio_glitch_slpm_restore(slpm);

	spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);

	return ret;
}

/**
 * nmk_config_pin - configure a pin's mux attributes
 * @cfg: pin confguration
 *
 * Configures a pin's mode (alternate function or GPIO), its pull up status,
 * and its sleep mode based on the specified configuration.  The @cfg is
 * usually one of the SoC specific macros defined in mach/<soc>-pins.h.  These
 * are constructed using, and can be further enhanced with, the macros in
 * plat/pincfg.h.
 *
 * If a pin's mode is set to GPIO, it is configured as an input to avoid
 * side-effects.  The gpio can be manipulated later using standard GPIO API
 * calls.
 */
int nmk_config_pin(pin_cfg_t cfg, bool sleep)
{
	return __nmk_config_pins(&cfg, 1, sleep);
}
EXPORT_SYMBOL(nmk_config_pin);

/**
 * nmk_config_pins - configure several pins at once
 * @cfgs: array of pin configurations
 * @num: number of elments in the array
 *
 * Configures several pins using nmk_config_pin().  Refer to that function for
 * further information.
 */
int nmk_config_pins(pin_cfg_t *cfgs, int num)
{
	return __nmk_config_pins(cfgs, num, false);
}
EXPORT_SYMBOL(nmk_config_pins);

int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num)
{
	return __nmk_config_pins(cfgs, num, true);
}
EXPORT_SYMBOL(nmk_config_pins_sleep);

/**
 * nmk_gpio_set_slpm() - configure the sleep mode of a pin
 * @gpio: pin number
 * @mode: NMK_GPIO_SLPM_INPUT or NMK_GPIO_SLPM_NOCHANGE,
 *
 * This register is actually in the pinmux layer, not the GPIO block itself.
 * The GPIO1B_SLPM register defines the GPIO mode when SLEEP/DEEP-SLEEP
 * mode is entered (i.e. when signal IOFORCE is HIGH by the platform code).
 * Each GPIO can be configured to be forced into GPIO mode when IOFORCE is
 * HIGH, overriding the normal setting defined by GPIO_AFSELx registers.
 * When IOFORCE returns LOW (by software, after SLEEP/DEEP-SLEEP exit),
 * the GPIOs return to the normal setting defined by GPIO_AFSELx registers.
 *
 * If @mode is NMK_GPIO_SLPM_INPUT, the corresponding GPIO is switched to GPIO
 * mode when signal IOFORCE is HIGH (i.e. when SLEEP/DEEP-SLEEP mode is
 * entered) regardless of the altfunction selected. Also wake-up detection is
 * ENABLED.
 *
 * If @mode is NMK_GPIO_SLPM_NOCHANGE, the corresponding GPIO remains
 * controlled by NMK_GPIO_DATC, NMK_GPIO_DATS, NMK_GPIO_DIR, NMK_GPIO_PDIS
 * (for altfunction GPIO) or respective on-chip peripherals (for other
 * altfuncs) when IOFORCE is HIGH. Also wake-up detection DISABLED.
 *
 * Note that enable_irq_wake() will automatically enable wakeup detection.
 */
int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
{
	struct nmk_gpio_chip *nmk_chip;
	unsigned long flags;

	nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
	if (!nmk_chip)
		return -EINVAL;

	clk_enable(nmk_chip->clk);
	spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
	spin_lock(&nmk_chip->lock);

	__nmk_gpio_set_slpm(nmk_chip, gpio % NMK_GPIO_PER_CHIP, mode);

	spin_unlock(&nmk_chip->lock);
	spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
	clk_disable(nmk_chip->clk);

	return 0;
}

/**
 * nmk_gpio_set_pull() - enable/disable pull up/down on a gpio
 * @gpio: pin number
 * @pull: one of NMK_GPIO_PULL_DOWN, NMK_GPIO_PULL_UP, and NMK_GPIO_PULL_NONE
 *
 * Enables/disables pull up/down on a specified pin.  This only takes effect if
 * the pin is configured as an input (either explicitly or by the alternate
 * function).
 *
 * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is
 * configured as an input.  Otherwise, due to the way the controller registers
 * work, this function will change the value output on the pin.
 */
int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
{
	struct nmk_gpio_chip *nmk_chip;
	unsigned long flags;

	nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
	if (!nmk_chip)
		return -EINVAL;

	clk_enable(nmk_chip->clk);
	spin_lock_irqsave(&nmk_chip->lock, flags);
	__nmk_gpio_set_pull(nmk_chip, gpio % NMK_GPIO_PER_CHIP, pull);
	spin_unlock_irqrestore(&nmk_chip->lock, flags);
	clk_disable(nmk_chip->clk);

	return 0;
}

/* Mode functions */
/**
 * nmk_gpio_set_mode() - set the mux mode of a gpio pin
 * @gpio: pin number
 * @gpio_mode: one of NMK_GPIO_ALT_GPIO, NMK_GPIO_ALT_A,
 *	       NMK_GPIO_ALT_B, and NMK_GPIO_ALT_C
 *
 * Sets the mode of the specified pin to one of the alternate functions or
 * plain GPIO.
 */
int nmk_gpio_set_mode(int gpio, int gpio_mode)
{
	struct nmk_gpio_chip *nmk_chip;
	unsigned long flags;

	nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
	if (!nmk_chip)
		return -EINVAL;

	clk_enable(nmk_chip->clk);
	spin_lock_irqsave(&nmk_chip->lock, flags);
	__nmk_gpio_set_mode(nmk_chip, gpio % NMK_GPIO_PER_CHIP, gpio_mode);
	spin_unlock_irqrestore(&nmk_chip->lock, flags);
	clk_disable(nmk_chip->clk);

	return 0;
}
EXPORT_SYMBOL(nmk_gpio_set_mode);

int nmk_gpio_get_mode(int gpio)
{
	struct nmk_gpio_chip *nmk_chip;
	u32 afunc, bfunc, bit;

	nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
	if (!nmk_chip)
		return -EINVAL;

	bit = 1 << (gpio % NMK_GPIO_PER_CHIP);

	clk_enable(nmk_chip->clk);

	afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
	bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;

	clk_disable(nmk_chip->clk);

	return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
}
EXPORT_SYMBOL(nmk_gpio_get_mode);

/* IRQ functions */
static inline int nmk_gpio_get_bitmask(int gpio)
{
	return 1 << (gpio % NMK_GPIO_PER_CHIP);
}

static void nmk_gpio_irq_ack(struct irq_data *d)
{
	struct nmk_gpio_chip *nmk_chip;

	nmk_chip = irq_data_get_irq_chip_data(d);
	if (!nmk_chip)
		return;

	clk_enable(nmk_chip->clk);
	writel(nmk_gpio_get_bitmask(d->hwirq), nmk_chip->addr + NMK_GPIO_IC);
	clk_disable(nmk_chip->clk);
}

enum nmk_gpio_irq_type {
	NORMAL,
	WAKE,
};

static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
				  int gpio, enum nmk_gpio_irq_type which,
				  bool enable)
{
	u32 bitmask = nmk_gpio_get_bitmask(gpio);
	u32 *rimscval;
	u32 *fimscval;
	u32 rimscreg;
	u32 fimscreg;

	if (which == NORMAL) {
		rimscreg = NMK_GPIO_RIMSC;
		fimscreg = NMK_GPIO_FIMSC;
		rimscval = &nmk_chip->rimsc;
		fimscval = &nmk_chip->fimsc;
	} else  {
		rimscreg = NMK_GPIO_RWIMSC;
		fimscreg = NMK_GPIO_FWIMSC;
		rimscval = &nmk_chip->rwimsc;
		fimscval = &nmk_chip->fwimsc;
	}

	/* we must individually set/clear the two edges */
	if (nmk_chip->edge_rising & bitmask) {
		if (enable)
			*rimscval |= bitmask;
		else
			*rimscval &= ~bitmask;
		writel(*rimscval, nmk_chip->addr + rimscreg);
	}
	if (nmk_chip->edge_falling & bitmask) {
		if (enable)
			*fimscval |= bitmask;
		else
			*fimscval &= ~bitmask;
		writel(*fimscval, nmk_chip->addr + fimscreg);
	}
}

static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,
				int gpio, bool on)
{
	/*
	 * Ensure WAKEUP_ENABLE is on.  No need to disable it if wakeup is
	 * disabled, since setting SLPM to 1 increases power consumption, and
	 * wakeup is anyhow controlled by the RIMSC and FIMSC registers.
	 */
	if (nmk_chip->sleepmode && on) {
		__nmk_gpio_set_slpm(nmk_chip, gpio % NMK_GPIO_PER_CHIP,
				    NMK_GPIO_SLPM_WAKEUP_ENABLE);
	}

	__nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);
}

static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
{
	struct nmk_gpio_chip *nmk_chip;
	unsigned long flags;
	u32 bitmask;

	nmk_chip = irq_data_get_irq_chip_data(d);
	bitmask = nmk_gpio_get_bitmask(d->hwirq);
	if (!nmk_chip)
		return -EINVAL;

	clk_enable(nmk_chip->clk);
	spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
	spin_lock(&nmk_chip->lock);

	__nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable);

	if (!(nmk_chip->real_wake & bitmask))
		__nmk_gpio_set_wake(nmk_chip, d->hwirq, enable);

	spin_unlock(&nmk_chip->lock);
	spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
	clk_disable(nmk_chip->clk);

	return 0;
}

static void nmk_gpio_irq_mask(struct irq_data *d)
{
	nmk_gpio_irq_maskunmask(d, false);
}

static void nmk_gpio_irq_unmask(struct irq_data *d)
{
	nmk_gpio_irq_maskunmask(d, true);
}

static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
{
	struct nmk_gpio_chip *nmk_chip;
	unsigned long flags;
	u32 bitmask;

	nmk_chip = irq_data_get_irq_chip_data(d);
	if (!nmk_chip)
		return -EINVAL;
	bitmask = nmk_gpio_get_bitmask(d->hwirq);

	clk_enable(nmk_chip->clk);
	spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
	spin_lock(&nmk_chip->lock);

	if (irqd_irq_disabled(d))
		__nmk_gpio_set_wake(nmk_chip, d->hwirq, on);

	if (on)
		nmk_chip->real_wake |= bitmask;
	else
		nmk_chip->real_wake &= ~bitmask;

	spin_unlock(&nmk_chip->lock);
	spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
	clk_disable(nmk_chip->clk);

	return 0;
}

static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
{
	bool enabled = !irqd_irq_disabled(d);
	bool wake = irqd_is_wakeup_set(d);
	struct nmk_gpio_chip *nmk_chip;
	unsigned long flags;
	u32 bitmask;

	nmk_chip = irq_data_get_irq_chip_data(d);
	bitmask = nmk_gpio_get_bitmask(d->hwirq);
	if (!nmk_chip)
		return -EINVAL;
	if (type & IRQ_TYPE_LEVEL_HIGH)
		return -EINVAL;
	if (type & IRQ_TYPE_LEVEL_LOW)
		return -EINVAL;

	clk_enable(nmk_chip->clk);
	spin_lock_irqsave(&nmk_chip->lock, flags);

	if (enabled)
		__nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false);

	if (enabled || wake)
		__nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false);

	nmk_chip->edge_rising &= ~bitmask;
	if (type & IRQ_TYPE_EDGE_RISING)
		nmk_chip->edge_rising |= bitmask;

	nmk_chip->edge_falling &= ~bitmask;
	if (type & IRQ_TYPE_EDGE_FALLING)
		nmk_chip->edge_falling |= bitmask;

	if (enabled)
		__nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true);

	if (enabled || wake)
		__nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true);

	spin_unlock_irqrestore(&nmk_chip->lock, flags);
	clk_disable(nmk_chip->clk);

	return 0;
}

static unsigned int nmk_gpio_irq_startup(struct irq_data *d)
{
	struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);

	clk_enable(nmk_chip->clk);
	nmk_gpio_irq_unmask(d);
	return 0;
}

static void nmk_gpio_irq_shutdown(struct irq_data *d)
{
	struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);

	nmk_gpio_irq_mask(d);
	clk_disable(nmk_chip->clk);
}

static struct irq_chip nmk_gpio_irq_chip = {
	.name		= "Nomadik-GPIO",
	.irq_ack	= nmk_gpio_irq_ack,
	.irq_mask	= nmk_gpio_irq_mask,
	.irq_unmask	= nmk_gpio_irq_unmask,
	.irq_set_type	= nmk_gpio_irq_set_type,
	.irq_set_wake	= nmk_gpio_irq_set_wake,
	.irq_startup	= nmk_gpio_irq_startup,
	.irq_shutdown	= nmk_gpio_irq_shutdown,
};

static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
				   u32 status)
{
	struct nmk_gpio_chip *nmk_chip;
	struct irq_chip *host_chip = irq_get_chip(irq);
	unsigned int first_irq;

	chained_irq_enter(host_chip, desc);

	nmk_chip = irq_get_handler_data(irq);
	first_irq = nmk_chip->domain->revmap_data.legacy.first_irq;
	while (status) {
		int bit = __ffs(status);

		generic_handle_irq(first_irq + bit);
		status &= ~BIT(bit);
	}

	chained_irq_exit(host_chip, desc);
}

static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
{
	struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
	u32 status;

	clk_enable(nmk_chip->clk);
	status = readl(nmk_chip->addr + NMK_GPIO_IS);
	clk_disable(nmk_chip->clk);

	__nmk_gpio_irq_handler(irq, desc, status);
}

static void nmk_gpio_secondary_irq_handler(unsigned int irq,
					   struct irq_desc *desc)
{
	struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
	u32 status = nmk_chip->get_secondary_status(nmk_chip->bank);

	__nmk_gpio_irq_handler(irq, desc, status);
}

static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
{
	irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
	irq_set_handler_data(nmk_chip->parent_irq, nmk_chip);

	if (nmk_chip->secondary_parent_irq >= 0) {
		irq_set_chained_handler(nmk_chip->secondary_parent_irq,
					nmk_gpio_secondary_irq_handler);
		irq_set_handler_data(nmk_chip->secondary_parent_irq, nmk_chip);
	}

	return 0;
}

/* I/O Functions */

static int nmk_gpio_request(struct gpio_chip *chip, unsigned offset)
{
	/*
	 * Map back to global GPIO space and request muxing, the direction
	 * parameter does not matter for this controller.
	 */
	int gpio = chip->base + offset;

	return pinctrl_request_gpio(gpio);
}

static void nmk_gpio_free(struct gpio_chip *chip, unsigned offset)
{
	int gpio = chip->base + offset;

	pinctrl_free_gpio(gpio);
}

static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
{
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);

	clk_enable(nmk_chip->clk);

	writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);

	clk_disable(nmk_chip->clk);

	return 0;
}

static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
{
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);
	u32 bit = 1 << offset;
	int value;

	clk_enable(nmk_chip->clk);

	value = (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;

	clk_disable(nmk_chip->clk);

	return value;
}

static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
				int val)
{
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);

	clk_enable(nmk_chip->clk);

	__nmk_gpio_set_output(nmk_chip, offset, val);

	clk_disable(nmk_chip->clk);
}

static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
				int val)
{
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);

	clk_enable(nmk_chip->clk);

	__nmk_gpio_make_output(nmk_chip, offset, val);

	clk_disable(nmk_chip->clk);

	return 0;
}

static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
{
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);

	return irq_find_mapping(nmk_chip->domain, offset);
}

#ifdef CONFIG_DEBUG_FS

#include <linux/seq_file.h>

static void nmk_gpio_dbg_show_one(struct seq_file *s, struct gpio_chip *chip,
				  unsigned offset, unsigned gpio)
{
	const char *label = gpiochip_is_requested(chip, offset);
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);
	int mode;
	bool is_out;
	bool pull;
	u32 bit = 1 << offset;
	const char *modes[] = {
		[NMK_GPIO_ALT_GPIO]	= "gpio",
		[NMK_GPIO_ALT_A]	= "altA",
		[NMK_GPIO_ALT_B]	= "altB",
		[NMK_GPIO_ALT_C]	= "altC",
	};

	clk_enable(nmk_chip->clk);
	is_out = !!(readl(nmk_chip->addr + NMK_GPIO_DIR) & bit);
	pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & bit);
	mode = nmk_gpio_get_mode(gpio);

	seq_printf(s, " gpio-%-3d (%-20.20s) %s %s %s %s",
		   gpio, label ?: "(none)",
		   is_out ? "out" : "in ",
		   chip->get
		   ? (chip->get(chip, offset) ? "hi" : "lo")
		   : "?  ",
		   (mode < 0) ? "unknown" : modes[mode],
		   pull ? "pull" : "none");

	if (label && !is_out) {
		int		irq = gpio_to_irq(gpio);
		struct irq_desc	*desc = irq_to_desc(irq);

		/* This races with request_irq(), set_irq_type(),
		 * and set_irq_wake() ... but those are "rare".
		 */
		if (irq >= 0 && desc->action) {
			char *trigger;
			u32 bitmask = nmk_gpio_get_bitmask(gpio);

			if (nmk_chip->edge_rising & bitmask)
				trigger = "edge-rising";
			else if (nmk_chip->edge_falling & bitmask)
				trigger = "edge-falling";
			else
				trigger = "edge-undefined";

			seq_printf(s, " irq-%d %s%s",
				   irq, trigger,
				   irqd_is_wakeup_set(&desc->irq_data)
				   ? " wakeup" : "");
		}
	}
	clk_disable(nmk_chip->clk);
}

static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
{
	unsigned		i;
	unsigned		gpio = chip->base;

	for (i = 0; i < chip->ngpio; i++, gpio++) {
		nmk_gpio_dbg_show_one(s, chip, i, gpio);
		seq_printf(s, "\n");
	}
}

#else
static inline void nmk_gpio_dbg_show_one(struct seq_file *s,
					 struct gpio_chip *chip,
					 unsigned offset, unsigned gpio)
{
}
#define nmk_gpio_dbg_show	NULL
#endif

/* This structure is replicated for each GPIO block allocated at probe time */
static struct gpio_chip nmk_gpio_template = {
	.request		= nmk_gpio_request,
	.free			= nmk_gpio_free,
	.direction_input	= nmk_gpio_make_input,
	.get			= nmk_gpio_get_input,
	.direction_output	= nmk_gpio_make_output,
	.set			= nmk_gpio_set_output,
	.to_irq			= nmk_gpio_to_irq,
	.dbg_show		= nmk_gpio_dbg_show,
	.can_sleep		= 0,
};

void nmk_gpio_clocks_enable(void)
{
	int i;

	for (i = 0; i < NUM_BANKS; i++) {
		struct nmk_gpio_chip *chip = nmk_gpio_chips[i];

		if (!chip)
			continue;

		clk_enable(chip->clk);
	}
}

void nmk_gpio_clocks_disable(void)
{
	int i;

	for (i = 0; i < NUM_BANKS; i++) {
		struct nmk_gpio_chip *chip = nmk_gpio_chips[i];

		if (!chip)
			continue;

		clk_disable(chip->clk);
	}
}

/*
 * Called from the suspend/resume path to only keep the real wakeup interrupts
 * (those that have had set_irq_wake() called on them) as wakeup interrupts,
 * and not the rest of the interrupts which we needed to have as wakeups for
 * cpuidle.
 *
 * PM ops are not used since this needs to be done at the end, after all the
 * other drivers are done with their suspend callbacks.
 */
void nmk_gpio_wakeups_suspend(void)
{
	int i;

	for (i = 0; i < NUM_BANKS; i++) {
		struct nmk_gpio_chip *chip = nmk_gpio_chips[i];

		if (!chip)
			break;

		clk_enable(chip->clk);

		writel(chip->rwimsc & chip->real_wake,
		       chip->addr + NMK_GPIO_RWIMSC);
		writel(chip->fwimsc & chip->real_wake,
		       chip->addr + NMK_GPIO_FWIMSC);

		clk_disable(chip->clk);
	}
}

void nmk_gpio_wakeups_resume(void)
{
	int i;

	for (i = 0; i < NUM_BANKS; i++) {
		struct nmk_gpio_chip *chip = nmk_gpio_chips[i];

		if (!chip)
			break;

		clk_enable(chip->clk);

		writel(chip->rwimsc, chip->addr + NMK_GPIO_RWIMSC);
		writel(chip->fwimsc, chip->addr + NMK_GPIO_FWIMSC);

		clk_disable(chip->clk);
	}
}

/*
 * Read the pull up/pull down status.
 * A bit set in 'pull_up' means that pull up
 * is selected if pull is enabled in PDIS register.
 * Note: only pull up/down set via this driver can
 * be detected due to HW limitations.
 */
void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up)
{
	if (gpio_bank < NUM_BANKS) {
		struct nmk_gpio_chip *chip = nmk_gpio_chips[gpio_bank];

		if (!chip)
			return;

		*pull_up = chip->pull_up;
	}
}

int nmk_gpio_irq_map(struct irq_domain *d, unsigned int irq,
			  irq_hw_number_t hwirq)
{
	struct nmk_gpio_chip *nmk_chip = d->host_data;

	if (!nmk_chip)
		return -EINVAL;

	irq_set_chip_and_handler(irq, &nmk_gpio_irq_chip, handle_edge_irq);
	set_irq_flags(irq, IRQF_VALID);
	irq_set_chip_data(irq, nmk_chip);
	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);

	return 0;
}

const struct irq_domain_ops nmk_gpio_irq_simple_ops = {
	.map = nmk_gpio_irq_map,
	.xlate = irq_domain_xlate_twocell,
};

static int __devinit nmk_gpio_probe(struct platform_device *dev)
{
	struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
	struct device_node *np = dev->dev.of_node;
	struct nmk_gpio_chip *nmk_chip;
	struct gpio_chip *chip;
	struct resource *res;
	struct clk *clk;
	int secondary_irq;
	void __iomem *base;
	int irq;
	int ret;

	if (!pdata && !np) {
		dev_err(&dev->dev, "No platform data or device tree found\n");
		return -ENODEV;
	}

	if (np) {
		pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
		if (!pdata)
			return -ENOMEM;

		if (of_get_property(np, "supports-sleepmode", NULL))
			pdata->supports_sleepmode = true;

		if (of_property_read_u32(np, "gpio-bank", &dev->id)) {
			dev_err(&dev->dev, "gpio-bank property not found\n");
			ret = -EINVAL;
			goto out;
		}

		pdata->first_gpio = dev->id * NMK_GPIO_PER_CHIP;
		pdata->num_gpio   = NMK_GPIO_PER_CHIP;
	}

	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
	if (!res) {
		ret = -ENOENT;
		goto out;
	}

	irq = platform_get_irq(dev, 0);
	if (irq < 0) {
		ret = irq;
		goto out;
	}

	secondary_irq = platform_get_irq(dev, 1);
	if (secondary_irq >= 0 && !pdata->get_secondary_status) {
		ret = -EINVAL;
		goto out;
	}

	if (request_mem_region(res->start, resource_size(res),
			       dev_name(&dev->dev)) == NULL) {
		ret = -EBUSY;
		goto out;
	}

	base = ioremap(res->start, resource_size(res));
	if (!base) {
		ret = -ENOMEM;
		goto out_release;
	}

	clk = clk_get(&dev->dev, NULL);
	if (IS_ERR(clk)) {
		ret = PTR_ERR(clk);
		goto out_unmap;
	}
	clk_prepare(clk);

	nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
	if (!nmk_chip) {
		ret = -ENOMEM;
		goto out_clk;
	}

	/*
	 * The virt address in nmk_chip->addr is in the nomadik register space,
	 * so we can simply convert the resource address, without remapping
	 */
	nmk_chip->bank = dev->id;
	nmk_chip->clk = clk;
	nmk_chip->addr = base;
	nmk_chip->chip = nmk_gpio_template;
	nmk_chip->parent_irq = irq;
	nmk_chip->secondary_parent_irq = secondary_irq;
	nmk_chip->get_secondary_status = pdata->get_secondary_status;
	nmk_chip->set_ioforce = pdata->set_ioforce;
	nmk_chip->sleepmode = pdata->supports_sleepmode;
	spin_lock_init(&nmk_chip->lock);

	chip = &nmk_chip->chip;
	chip->base = pdata->first_gpio;
	chip->ngpio = pdata->num_gpio;
	chip->label = pdata->name ?: dev_name(&dev->dev);
	chip->dev = &dev->dev;
	chip->owner = THIS_MODULE;

	clk_enable(nmk_chip->clk);
	nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI);
	clk_disable(nmk_chip->clk);

#ifdef CONFIG_OF_GPIO
	chip->of_node = np;
#endif

	ret = gpiochip_add(&nmk_chip->chip);
	if (ret)
		goto out_free;

	BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips));

	nmk_gpio_chips[nmk_chip->bank] = nmk_chip;

	platform_set_drvdata(dev, nmk_chip);

	nmk_chip->domain = irq_domain_add_legacy(np, NMK_GPIO_PER_CHIP,
						NOMADIK_GPIO_TO_IRQ(pdata->first_gpio),
						0, &nmk_gpio_irq_simple_ops, nmk_chip);
	if (!nmk_chip->domain) {
		pr_err("%s: Failed to create irqdomain\n", np->full_name);
		ret = -ENOSYS;
		goto out_free;
	}

	nmk_gpio_init_irq(nmk_chip);

	dev_info(&dev->dev, "at address %p\n", nmk_chip->addr);

	return 0;

out_free:
	kfree(nmk_chip);
out_clk:
	clk_disable(clk);
	clk_put(clk);
out_unmap:
	iounmap(base);
out_release:
	release_mem_region(res->start, resource_size(res));
out:
	dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
		  pdata->first_gpio, pdata->first_gpio+31);
	if (np)
		kfree(pdata);

	return ret;
}

static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev)
{
	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);

	return npct->soc->ngroups;
}

static const char *nmk_get_group_name(struct pinctrl_dev *pctldev,
				       unsigned selector)
{
	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);

	return npct->soc->groups[selector].name;
}

static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
			      const unsigned **pins,
			      unsigned *num_pins)
{
	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);

	*pins = npct->soc->groups[selector].pins;
	*num_pins = npct->soc->groups[selector].npins;
	return 0;
}

static struct pinctrl_gpio_range *
nmk_match_gpio_range(struct pinctrl_dev *pctldev, unsigned offset)
{
	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
	int i;

	for (i = 0; i < npct->soc->gpio_num_ranges; i++) {
		struct pinctrl_gpio_range *range;

		range = &npct->soc->gpio_ranges[i];
		if (offset >= range->pin_base &&
		    offset <= (range->pin_base + range->npins - 1))
			return range;
	}
	return NULL;
}

static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
		   unsigned offset)
{
	struct pinctrl_gpio_range *range;
	struct gpio_chip *chip;

	range = nmk_match_gpio_range(pctldev, offset);
	if (!range || !range->gc) {
		seq_printf(s, "invalid pin offset");
		return;
	}
	chip = range->gc;
	nmk_gpio_dbg_show_one(s, chip, offset - chip->base, offset);
}

static struct pinctrl_ops nmk_pinctrl_ops = {
	.get_groups_count = nmk_get_groups_cnt,
	.get_group_name = nmk_get_group_name,
	.get_group_pins = nmk_get_group_pins,
	.pin_dbg_show = nmk_pin_dbg_show,
};

static int nmk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
{
	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);

	return npct->soc->nfunctions;
}

static const char *nmk_pmx_get_func_name(struct pinctrl_dev *pctldev,
					 unsigned function)
{
	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);

	return npct->soc->functions[function].name;
}

static int nmk_pmx_get_func_groups(struct pinctrl_dev *pctldev,
				   unsigned function,
				   const char * const **groups,
				   unsigned * const num_groups)
{
	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);

	*groups = npct->soc->functions[function].groups;
	*num_groups = npct->soc->functions[function].ngroups;

	return 0;
}

static int nmk_pmx_enable(struct pinctrl_dev *pctldev, unsigned function,
			  unsigned group)
{
	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
	const struct nmk_pingroup *g;
	static unsigned int slpm[NUM_BANKS];
	unsigned long flags;
	bool glitch;
	int ret = -EINVAL;
	int i;

	g = &npct->soc->groups[group];

	if (g->altsetting < 0)
		return -EINVAL;

	dev_dbg(npct->dev, "enable group %s, %u pins\n", g->name, g->npins);

	/*
	 * If we're setting altfunc C by setting both AFSLA and AFSLB to 1,
	 * we may pass through an undesired state. In this case we take
	 * some extra care.
	 *
	 * Safe sequence used to switch IOs between GPIO and Alternate-C mode:
	 *  - Save SLPM registers (since we have a shadow register in the
	 *    nmk_chip we're using that as backup)
	 *  - Set SLPM=0 for the IOs you want to switch and others to 1
	 *  - Configure the GPIO registers for the IOs that are being switched
	 *  - Set IOFORCE=1
	 *  - Modify the AFLSA/B registers for the IOs that are being switched
	 *  - Set IOFORCE=0
	 *  - Restore SLPM registers
	 *  - Any spurious wake up event during switch sequence to be ignored
	 *    and cleared
	 *
	 * We REALLY need to save ALL slpm registers, because the external
	 * IOFORCE will switch *all* ports to their sleepmode setting to as
	 * to avoid glitches. (Not just one port!)
	 */
	glitch = (g->altsetting == NMK_GPIO_ALT_C);

	if (glitch) {
		spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);

		/* Initially don't put any pins to sleep when switching */
		memset(slpm, 0xff, sizeof(slpm));

		/*
		 * Then mask the pins that need to be sleeping now when we're
		 * switching to the ALT C function.
		 */
		for (i = 0; i < g->npins; i++)
			slpm[g->pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(g->pins[i]);
		nmk_gpio_glitch_slpm_init(slpm);
	}

	for (i = 0; i < g->npins; i++) {
		struct pinctrl_gpio_range *range;
		struct nmk_gpio_chip *nmk_chip;
		struct gpio_chip *chip;
		unsigned bit;

		range = nmk_match_gpio_range(pctldev, g->pins[i]);
		if (!range) {
			dev_err(npct->dev,
				"invalid pin offset %d in group %s at index %d\n",
				g->pins[i], g->name, i);
			goto out_glitch;
		}
		if (!range->gc) {
			dev_err(npct->dev, "GPIO chip missing in range for pin offset %d in group %s at index %d\n",
				g->pins[i], g->name, i);
			goto out_glitch;
		}
		chip = range->gc;
		nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
		dev_dbg(npct->dev, "setting pin %d to altsetting %d\n", g->pins[i], g->altsetting);

		clk_enable(nmk_chip->clk);
		bit = g->pins[i] % NMK_GPIO_PER_CHIP;
		/*
		 * If the pin is switching to altfunc, and there was an
		 * interrupt installed on it which has been lazy disabled,
		 * actually mask the interrupt to prevent spurious interrupts
		 * that would occur while the pin is under control of the
		 * peripheral. Only SKE does this.
		 */
		nmk_gpio_disable_lazy_irq(nmk_chip, bit);

		__nmk_gpio_set_mode_safe(nmk_chip, bit, g->altsetting, glitch);
		clk_disable(nmk_chip->clk);
	}

	/* When all pins are successfully reconfigured we get here */
	ret = 0;

out_glitch:
	if (glitch) {
		nmk_gpio_glitch_slpm_restore(slpm);
		spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
	}

	return ret;
}

static void nmk_pmx_disable(struct pinctrl_dev *pctldev,
			    unsigned function, unsigned group)
{
	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
	const struct nmk_pingroup *g;

	g = &npct->soc->groups[group];

	if (g->altsetting < 0)
		return;

	/* Poke out the mux, set the pin to some default state? */
	dev_dbg(npct->dev, "disable group %s, %u pins\n", g->name, g->npins);
}

int nmk_gpio_request_enable(struct pinctrl_dev *pctldev,
			    struct pinctrl_gpio_range *range,
			    unsigned offset)
{
	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
	struct nmk_gpio_chip *nmk_chip;
	struct gpio_chip *chip;
	unsigned bit;

	if (!range) {
		dev_err(npct->dev, "invalid range\n");
		return -EINVAL;
	}
	if (!range->gc) {
		dev_err(npct->dev, "missing GPIO chip in range\n");
		return -EINVAL;
	}
	chip = range->gc;
	nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);

	dev_dbg(npct->dev, "enable pin %u as GPIO\n", offset);

	clk_enable(nmk_chip->clk);
	bit = offset % NMK_GPIO_PER_CHIP;
	/* There is no glitch when converting any pin to GPIO */
	__nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO);
	clk_disable(nmk_chip->clk);

	return 0;
}

void nmk_gpio_disable_free(struct pinctrl_dev *pctldev,
			   struct pinctrl_gpio_range *range,
			   unsigned offset)
{
	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);

	dev_dbg(npct->dev, "disable pin %u as GPIO\n", offset);
	/* Set the pin to some default state, GPIO is usually default */
}

static struct pinmux_ops nmk_pinmux_ops = {
	.get_functions_count = nmk_pmx_get_funcs_cnt,
	.get_function_name = nmk_pmx_get_func_name,
	.get_function_groups = nmk_pmx_get_func_groups,
	.enable = nmk_pmx_enable,
	.disable = nmk_pmx_disable,
	.gpio_request_enable = nmk_gpio_request_enable,
	.gpio_disable_free = nmk_gpio_disable_free,
};

int nmk_pin_config_get(struct pinctrl_dev *pctldev,
		       unsigned pin,
		       unsigned long *config)
{
	/* Not implemented */
	return -EINVAL;
}

int nmk_pin_config_set(struct pinctrl_dev *pctldev,
		       unsigned pin,
		       unsigned long config)
{
	static const char *pullnames[] = {
		[NMK_GPIO_PULL_NONE]	= "none",
		[NMK_GPIO_PULL_UP]	= "up",
		[NMK_GPIO_PULL_DOWN]	= "down",
		[3] /* illegal */	= "??"
	};
	static const char *slpmnames[] = {
		[NMK_GPIO_SLPM_INPUT]		= "input/wakeup",
		[NMK_GPIO_SLPM_NOCHANGE]	= "no-change/no-wakeup",
	};
	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
	struct nmk_gpio_chip *nmk_chip;
	struct pinctrl_gpio_range *range;
	struct gpio_chip *chip;
	unsigned bit;

	/*
	 * The pin config contains pin number and altfunction fields, here
	 * we just ignore that part. It's being handled by the framework and
	 * pinmux callback respectively.
	 */
	pin_cfg_t cfg = (pin_cfg_t) config;
	int pull = PIN_PULL(cfg);
	int slpm = PIN_SLPM(cfg);
	int output = PIN_DIR(cfg);
	int val = PIN_VAL(cfg);
	bool lowemi = PIN_LOWEMI(cfg);
	bool gpiomode = PIN_GPIOMODE(cfg);
	bool sleep = PIN_SLEEPMODE(cfg);

	range = nmk_match_gpio_range(pctldev, pin);
	if (!range) {
		dev_err(npct->dev, "invalid pin offset %d\n", pin);
		return -EINVAL;
	}
	if (!range->gc) {
		dev_err(npct->dev, "GPIO chip missing in range for pin %d\n",
			pin);
		return -EINVAL;
	}
	chip = range->gc;
	nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);

	if (sleep) {
		int slpm_pull = PIN_SLPM_PULL(cfg);
		int slpm_output = PIN_SLPM_DIR(cfg);
		int slpm_val = PIN_SLPM_VAL(cfg);

		/* All pins go into GPIO mode at sleep */
		gpiomode = true;

		/*
		 * The SLPM_* values are normal values + 1 to allow zero to
		 * mean "same as normal".
		 */
		if (slpm_pull)
			pull = slpm_pull - 1;
		if (slpm_output)
			output = slpm_output - 1;
		if (slpm_val)
			val = slpm_val - 1;

		dev_dbg(nmk_chip->chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",
			pin,
			slpm_pull ? pullnames[pull] : "same",
			slpm_output ? (output ? "output" : "input") : "same",
			slpm_val ? (val ? "high" : "low") : "same");
	}

	dev_dbg(nmk_chip->chip.dev, "pin %d [%#lx]: pull %s, slpm %s (%s%s), lowemi %s\n",
		pin, cfg, pullnames[pull], slpmnames[slpm],
		output ? "output " : "input",
		output ? (val ? "high" : "low") : "",
		lowemi ? "on" : "off" );

	clk_enable(nmk_chip->clk);
	bit = pin % NMK_GPIO_PER_CHIP;
	if (gpiomode)
		/* No glitch when going to GPIO mode */
		__nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO);
	if (output)
		__nmk_gpio_make_output(nmk_chip, bit, val);
	else {
		__nmk_gpio_make_input(nmk_chip, bit);
		__nmk_gpio_set_pull(nmk_chip, bit, pull);
	}
	/* TODO: isn't this only applicable on output pins? */
	__nmk_gpio_set_lowemi(nmk_chip, bit, lowemi);

	__nmk_gpio_set_slpm(nmk_chip, bit, slpm);
	clk_disable(nmk_chip->clk);
	return 0;
}

static struct pinconf_ops nmk_pinconf_ops = {
	.pin_config_get = nmk_pin_config_get,
	.pin_config_set = nmk_pin_config_set,
};

static struct pinctrl_desc nmk_pinctrl_desc = {
	.name = "pinctrl-nomadik",
	.pctlops = &nmk_pinctrl_ops,
	.pmxops = &nmk_pinmux_ops,
	.confops = &nmk_pinconf_ops,
	.owner = THIS_MODULE,
};

static const struct of_device_id nmk_pinctrl_match[] = {
	{
		.compatible = "stericsson,nmk_pinctrl",
		.data = (void *)PINCTRL_NMK_DB8500,
	},
	{},
};

static int __devinit nmk_pinctrl_probe(struct platform_device *pdev)
{
	const struct platform_device_id *platid = platform_get_device_id(pdev);
	struct device_node *np = pdev->dev.of_node;
	struct nmk_pinctrl *npct;
	unsigned int version = 0;
	int i;

	npct = devm_kzalloc(&pdev->dev, sizeof(*npct), GFP_KERNEL);
	if (!npct)
		return -ENOMEM;

	if (platid)
		version = platid->driver_data;
	else if (np)
		version = (unsigned int)
			of_match_device(nmk_pinctrl_match, &pdev->dev)->data;

	/* Poke in other ASIC variants here */
	if (version == PINCTRL_NMK_DB8500)
		nmk_pinctrl_db8500_init(&npct->soc);

	/*
	 * We need all the GPIO drivers to probe FIRST, or we will not be able
	 * to obtain references to the struct gpio_chip * for them, and we
	 * need this to proceed.
	 */
	for (i = 0; i < npct->soc->gpio_num_ranges; i++) {
		if (!nmk_gpio_chips[i]) {
			dev_warn(&pdev->dev, "GPIO chip %d not registered yet\n", i);
			devm_kfree(&pdev->dev, npct);
			return -EPROBE_DEFER;
		}
		npct->soc->gpio_ranges[i].gc = &nmk_gpio_chips[i]->chip;
	}

	nmk_pinctrl_desc.pins = npct->soc->pins;
	nmk_pinctrl_desc.npins = npct->soc->npins;
	npct->dev = &pdev->dev;
	npct->pctl = pinctrl_register(&nmk_pinctrl_desc, &pdev->dev, npct);
	if (!npct->pctl) {
		dev_err(&pdev->dev, "could not register Nomadik pinctrl driver\n");
		return -EINVAL;
	}

	/* We will handle a range of GPIO pins */
	for (i = 0; i < npct->soc->gpio_num_ranges; i++)
		pinctrl_add_gpio_range(npct->pctl, &npct->soc->gpio_ranges[i]);

	platform_set_drvdata(pdev, npct);
	dev_info(&pdev->dev, "initialized Nomadik pin control driver\n");

	return 0;
}

static const struct of_device_id nmk_gpio_match[] = {
	{ .compatible = "st,nomadik-gpio", },
	{}
};

static struct platform_driver nmk_gpio_driver = {
	.driver = {
		.owner = THIS_MODULE,
		.name = "gpio",
		.of_match_table = nmk_gpio_match,
	},
	.probe = nmk_gpio_probe,
};

static const struct platform_device_id nmk_pinctrl_id[] = {
	{ "pinctrl-stn8815", PINCTRL_NMK_STN8815 },
	{ "pinctrl-db8500", PINCTRL_NMK_DB8500 },
};

static struct platform_driver nmk_pinctrl_driver = {
	.driver = {
		.owner = THIS_MODULE,
		.name = "pinctrl-nomadik",
		.of_match_table = nmk_pinctrl_match,
	},
	.probe = nmk_pinctrl_probe,
	.id_table = nmk_pinctrl_id,
};

static int __init nmk_gpio_init(void)
{
	int ret;

	ret = platform_driver_register(&nmk_gpio_driver);
	if (ret)
		return ret;
	return platform_driver_register(&nmk_pinctrl_driver);
}

core_initcall(nmk_gpio_init);

MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
MODULE_DESCRIPTION("Nomadik GPIO Driver");
MODULE_LICENSE("GPL");


LINAK Service Data Tool – 2nd generation – is an accessory to help read-out performance data in linear actuator systems in healthcare applications.
It is essential to be familiar with the wear and tear of the actuators so that you know when it is time for a recommended service visit by a service technician.
The Service Data Tool enables easy read-out of lifetime actuator information, service data and battery state on a laptop.
As well as the easy to understand and user-friendly design, there are icons for integrated help and information. These can be used in, for example, patient lift manuals or checklists for service technicians to follow during service visits. A service report function is also integrated for easy documentation of service data and notes from the service visit.
See how the Service Data Tool for JUMBO Care 2nd Generation enables easy read-out of lifetime actuator information, service data and battery state on a laptop.


At long last, I have boarded the airship!
I've been hoping to write a poem about an airship for quite a while now, and have been a big fan of Steampunk airships for a very, very long time. Several days ago, a unique image popped into my head of just such a vessel, and with it a came a single descriptive line. Finally!
I immediately jumped on board, having no idea where the ship was heading. As of this posting, I'm still not entirely clear of either its course or its destination, but I am glad to finally be here. I'll begrudgingly jump off if reality beckons loudly enough, which generally involves hunger, thirst, or someone in my vicinity needing something, but ASAP I get right back on.
As I've said before, in order for me to write a poem I have to see it, smell it, feel it, and etc. The image has to become as tangible in my mind's eye as it would be in reality. If I wish to write about a piece of rigging, I'll focus until I can see what color it is, feel it's texture, and know it's weight in my hand.
I don't actually write down all of these details in the poem, but I do draw on them for those oh-so-subtle nuances that they alone can lend. If I can imagine something well enough, then you should be able to imagine it, too, or else I will have failed to do my job. Again, I'm being redundant here, but I believe it can stand being said yet again.
While writing Airship, which is the tentative title of this poem, I did a bit of research on sailing ships of the late 1800's, studied anatomical drawings of Eudraco magnificus occidentalis, (the western dragon), and viewed detail upon detail of Steampunk airships. I tend to do this whenever I need to improve my vocabulary relative to the items I need to site.
As of this posting, I am still happily working on Airship. When I think I'm about done I'll let it sit and germinate a while before entering it into the index of my next book of verse. For the moment, I am thoroughly enjoying this ride. Immersive writing does has some wonderful perks.


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There's always a major month-long online slot tournament taking place at Drake Casino known as the Monthly Tournament and each month throughout this event you get to play on a different slot. For example the latest monthly slot tourney is called the $5,000 Time Bender Monthly Tournament. This tourney has a $5.00 buy in fee and the total prize pool is fixed at $5,000.00.
Rebuys are also allowed at a cost of $5.00 each and the only game that you get to play on this month is the Time Bender slot from Arrow's Edge. The winner of this event will receive a guaranteed $2,000.00 cash prize. The runner up will receive a $1,000.00 cash prize and third place will receive a $750.00 cash prize.
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text:
FeaturedSwann TVPoliticsUS
Announcement: Ben Swann Named Anchor at CBS46 News
By TIMP Staff
TIMP Staff
Truth in Media Project announced today that Ben Swann will be joining CBS46 TV, Atlanta (WGCL) as an Anchor for its Early Evening and Late Newscasts. He will be starting on June 15th.
"Ben is an accomplished anchor who also has a lot of experience on the digital side. We look forward to putting him next to Sharon Reed and Tracye Hutchins on the news desk," said CBS46 Vice President/General Manager Mark Pimentel.
Swann has spent the last two years building the Truth in Media project through benswann.com and now truthinmedia.com. Through the generous support of thousands of backers Swann created 16 episodes of the Truth in Media project, a video series that has garnered millions of views and has impacted the national discussion on issues like cannabis and ISIS.
On the television side, Swann was most recently an Anchor/Reporter at WXIX in Cincinnati. While there Swann became the producer/anchor of a viral segment titled "Reality Check." Covering the 2012 Republican Presidential primary, Swann confronted problems in the American electoral process, the stranglehold of America's two party system and the suppression of voters' choices by mainstream media. During this time, Swann became the first journalist in the nation to take on President Barack Obama face to face regarding the Constitutionality of his "kill list" and is the only journalist to confront Mitt Romney about the railroading of duly elected delegates during the 2012 Republican National Convention.
Prior to that he was an Anchor/Reporter at KTSM in El Paso, TX. He got his start at KFOX in El Paso as an Anchor Reporter. While there he received three Edward R. Murrow Awards and two Emmy Awards.
"To be given an opportunity to be an Anchor in a city like Atlanta is a chance of a lifetime. I can't wait to get there and get started," said Swann. "The beauty of this agreement is that I will continue to oversee and contribute to the Truth in Media project, TruthinMedia.com and will be unveiling my own projects, as well as continuing to press hard and demand answers to tough questions in one of the largest television markets in the country."
"His work speaks for itself. He's very excited about getting started on-air and getting actively involved in the community," said CBS46 News Director Larry Perret.
Swann has a Bachelor of Liberal Arts Degree from Brigham Young University and a Master of Arts in Humanities Degree from California State University.
About WGCL-TV: WGCL is a CBS affiliate in the # 9 television market in the United States. The station delivers over 32 hours of weekly news product as well as hit CBS Programs such as: Survivor, The Amazing Race, The Big Bang Theory, Madam Secretary, The Good Wife and 60 Minutes. WGCL is owned by the Meredith Corporation.
sharon reed
wgcl
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redpajama_set_name: RedPajamaCommonCrawl


Join fellow U of T alumni and friends for a lecture that explores the best approach to encouraging sustainability-oriented behaviour change.
This event is sold out. If you would like to be added to the wait list, please email dua.events@utoronto.ca.
Conventional approaches to encouraging sustainability-oriented behaviour change focus on individual conscious choice, and are often based on an information-deficit model that assumes that providing better information on the unsustainable consequences of behaviour will cause behaviour change. Decades of research in multiple fields has shown that this approach is not effective. Using some results from analysis of behaviour in the Centre for Interactive Research on Sustainability in Vancouver, Professor Robinson's talk suggests that a social practice approach, recognizing the prevalence of unconscious and collective processes, may offer a more fruitful approach. Professor Robinson calls this approach normalizing sustainability.
Prof. Robinson's presentation is part of an ongoing series of compelling lectures for alumni, hosted at venues across the GTA. U of T in Your Neighbourhood brings the University right into your community. Stay informed, inspired and connected, because together we are boundless.


That's so cool, I would have loved that when I was a kid!
fun! we recently made invisible ink with baking soda and water, after it dries we brushed grape juice on it to make it appear. We'll have to try this version, as I think the "ink" would be more invisible. That looks like a book I may have to get.
I love playing that with the children, though I think I am loving your way of doing it so shall give it a go, thanks for sharing and thanks for the lovely wishes regarding Master Poppins. I am going to pop your little parcel in the post, only the hearts and a couple of little extra's. PLEASE I really do not want anything in return you were more than generous with your pretty fabric.
Mousy Brown, unfortunately everyone is still pretty ill. This was a couple of weeks ago before it all hit. There are a few less coughs though, so maybe this will all end eventually.
I love Jane Brocket's books too. I remember reading a review of Art of Domesticity and thinking I wouldn't buy it. Then I saw it at the bookstore and I fell in love!
I love Jane Brocket, too! I seem to remember holding our 'secret messages' over a hot light bulb as a kid (if you still have any that get hot, that is!).


Burnt Coffee Shadows caught our eye in The Newsagent recently. It's got a great title, for one thing, and feels like an old school zine -- no wonder, since the ongoing project from Paul Richards features fax machine prints and journal pages from the mid-'90s. It's very cool to see these monochrome experiments gathered together in a whopping 64-page digital tabloid newspaper.
"Too many late nights and lots of caffeine have led to the design of a typographic journal entitled 'Burnt Coffee Shadows'. This black & white, 64-page newspaper includes material taken from note and sketchbooks that date as far back as 1996. Featuring visuals generated from thoughts, scribbles and experiments with hardware (old fax machines feature prominently) this book uses impression and expression to create dark, brooding typographic landscapes — typescapes."
"These typescapes mirror the cacophony of noise around us, the visual and audio onslaught of the modern environment – be it amongst the sprawling mish-mash of London, the complexity of Tokyo, or the towering grids of New York. The constant barrage of half-heard conversations, snippets of thoughts, emotions and overlapping communications combine in a visual flux conjured from and inspired by the milieu."
"An on-going experiment, this newspaper is the first 'pause' in a continuous process. Taking inspiration from the music scene, this edition will be followed by a series of companion 'remix' titles, released as alternate versions including collaborations with other artists. Just like the contemporary website, blog or software, the material is in a constant state of renewal and versioning, with this initial release being the catalyst for additional volumes."
Burnt Coffee Shadows is for sale in The Newsagent now for £12.50, including postage. Thanks for sharing your project with us, Paul!


We wanted to create a quick user guide to help our users setup their accounts at minimum cost while establishing a productive content syndication method for their business or blog. Our goal is to help you establish a system that allows our platform to work for you in the best way possible. This means helping you get any new content you post in Syndr distributed to hundreds of people's social media profiles on the top 50 social media channels effectively. If you don't quite understand our service yet we suggest you view this post first.
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We have a unpredictable drip system that will send out your content in random bursts and it randomly selects a user to share your content at your determined rate. Our formula will have some people share your content almost every time, some people sometimes and others never. This helps keep our system unpredictable while helping you establish some sort of user base and most importantly keeping our network safe. We suggest sharing content steadily over a period of 15 days to 1 month. This will help you build up steady social signals just like popular viral content.
Reports can be found on the user Dashboard or on the submitter page. You will see who shared your content, when it was shared and where. Syndr does not do any publishing to the actual networks we just handle the syndication. We use Onlywire and Sendible to deliver the actual content.
Safety of the system is of the most importance and we try our best to distribute your content using natural share patterns as much as possible in an unpredictable manner. Our platform is very thorough at doing it's job if you can allow it to work for you. Syndr is not an extreme system that promises to flood your site with social media shares but its designed to evolve with your business. We suggest you work your way up and don't focus so much on shares, 20-50 is a good start and over time increase in increments. Since we send out shares in small random bursts until each post meets it's share requirements each post is guaranteed to have a different share time. Our system will come as close as possible to meet your required drip-rate. This way you are showing progress over time all resulting in a user base while showing steady addition of new unique accounts sharing your content over a set period you determine. If you have any questions please message on FaceBook, we will happily answer any questions or concerns.
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Russian Journalist Sentenced for Speaking Out on…
US Denounces Sudan Release of Killer of…
Ukraine Raids Tycoon's Home, Tax Office in…
FBI Agents Find No New Classified Documents…
Few demonstrators turn up for Zimbabwe protest in Bulawayo
Africa Latest Stories World
By Editor August 19, 2019 August 19, 2019
Few people have turned up for an opposition protest in Bulawayo, Zimbabwe's second city, on Monday as armed police maintained heavy presence on the streets and at a courthouse where the opposition is pressing to be allowed to hold the demonstration.
Business in Bulawayo's usually bustling downtown was subdued with the most traffic from police trucks, water cannons and dozens of police officers patrolling on foot.
The opposition party, the Movement for Democratic Change, had called the protest as part of a planned series of demonstrations to push President Emmerson Mnangagwa to agree to a transitional government amid a rapidly deteriorating economy and rising political tensions.
But the police banned the protest in the southern city, citing security concerns. A Bulawayo magistrate is hearing the opposition party's challenge to the ban.
The protest was planned as a follow up to demonstrations held in the capital, Harare, on Friday when several hundred demonstrators marched in defiance of a police ban that was upheld by the High Court. Police used tear gas and beatings with batons to quell the Harare protest.
Judge postpones 2nd corruption trial of Malaysia's former PM
Diamondbacks score 3 in 8th to rally past Rockies, 5-3
DGCA Allows Lessors To Retrieve Kingfisher Planes
PSG coach Tuchel must deliver in Europe after domestic loss
Messi moves closer to signing new contract with Barcelona
Special Correspondent July 17, 2021 July 17, 2021


Manufacturer of high-quality Light Emitting Diodes packaged in standard LED lamps, LED panel lights & application-specific LED assemblies. Specialize in the rapid design & manufacture of solid-state lighting solutions & offer a full range of LED colors, lenses & brightness levels for status indicators, backlighting & illumination. Provides engineered LED solutions to any application in the industrial, architectural, transportation, portable electronic, instrumentation, telecommunications, medical & utility industries.


Hillsboro School District serves the Community of Hillsboro and the greater surrounding rural areas of Hillsboro, Elroy, Wonewoc, Union Center and La Farge. The district lies in the drift less region which provides us with spectacular views and some of the most unique terrain in the State of Wisconsin. Our enrollment is approximately 540 students who benefit from strong academic, vocational, and extra curricular programs while maintaining a small town atmosphere.
The Hillsboro School District is proud of its parent, child and faculty collaboration for the success of our youth. We stand behind our mission that all students will: "Learn, Achieve, Succeed!"


Southeastern Alabama's Wiregrass Museum of Art is located in Dothan, Alabama. The museum's mission is to inspire a lifelong appreciation for the arts in each visitor through educational programming, display of the permanent collection, and temporary exhibits.
The Wiregrass Museum of Art collects American fine art, decorative arts and design work from the 20th century to the present. Most of the items in the collection are works on paper. Over 1,100 items make up the permanent collection, which includes the largest public collection of prints by the American artist Frank Stella, known for his minimalist and abstract paintings and sculptures. Other highlighted artists among the collection include Victor Vasarely, Joseph Albers and Robert Indiana. A collection focused on contemporary Alabama art includes the work of Scott Stephens, Carolyn Sherer, Beverly Erdreich and John Kelly Fitzpatrick.
An exhibit of works from the museum's collection is permanently on display. Pieces occasionally rotate, and works from the permanent collection often serve as inspiration for the museum's temporary exhibits.
History: The Wiregrass Museum of Art was founded in 1987 in response to a national magazine article that referenced Dothan's lack of a museum. The mayor at the time, Larry Register, quickly mobilized a panel of 13 citizens to study the feasibility of a public museum.
The Wiregrass Museum of Art is city managed and is housed in Dothan's historic Water and Electric Building. Originally built in 1912, the building is listed on the register of National Historic Places. The building was renovated and converted to a museum by local architects Joseph L. Donofro and Associates after twenty-one architectural firms were asked to submit proposals. The 30,000 square foot museum took approximately $3 million to complete.
The original feasibility committee was appointed as the museum's first board of directors, and a four-stage plan was hatched for fully readying the museum for the public. Three of the four phases are now complete including the completion of 18,000 square feet of gallery space, storage and preparation space and a conference center, plus the offering of educational programming, and the hosting of traveling exhibits.
Ongoing Programs and Education: Guided tours are offered daily by trained docents or museum educators. Group tours may be customized to meet the interests and needs of the group. Educator resources are available for teachers and other group leaders to supplement their group's visit. Topics include Alabama Landscape, Art from Recycled Materials, and Habitat Design among others.
Classes and workshops offered by the Wiregrass Museum include studio art classes for both youth and adults. Special workshops are led by visiting artists and have included indigo dying, origami and printmaking. Additional youth programming includes summer and winter art camps. First Saturday Family Day offers free arts and crafts activities for families, such as weaving, fabric dying, painting and sculpture. Youth Art Month takes place each March and displays juried artwork made by local children in addition to offer a variety of free educational and hands-on programming in studio arts and writing.
Events at the museum include Art After Hours, a quarterly celebration of new exhibits. The Thursday evening art openings offer food and small bites, and often include artist's talks. Screen on the Green is a quarterly film series. Guests are encouraged to bring their own chairs and blankets for the outdoor event, and food trucks provide snacks and dinner. Yoga in the Galleries takes place the first Friday of each month. Yard Party for Art is an annual art and live music festival that happens each August.
Past and Future Exhibits: Many of the museum's temporary exhibits are inspired by works in the permanent collection. "Echoes" is on display through December 2018 and displays work made by members of the Alabama Caucus for Women's Art in response to works in the permanent collection. Over 20 artists are featured in the exhibit, including Patty Driscoll, whose "Lydia's Purple," a 2015 oil on panel presents a traditional still life with a feminist theme.
"Walks in the South" will be on display from January through March 2019. The show will feature the 2016 photography of Sydney A. Foster. The Alabama artist captures stories of every day people on the streets of Montgomery, Alabama. Upcoming from April to June of 2019 is Beverly Erdreich's "Continuum" series. Each work on paper incorporates a detail from Goya's 1808 Disasters of War series, with contemporary elements that remind the viewer how little the world has changed.


Fire damage at this South Miami home began when a candle fell over in a first-floor room. While it was fortunate that the fire was contained within the room it started there was soot and smoke damage throughout the house. There was so much soot and smoke damage that the homeowners sought professional help. SERVPRO of South Miami offers twenty-four hour seven days a week emergency service for fire damage events such as this. You will receive a complete assessment of the damages and a comprehensive restoration plan for your home. We have the latest cleaning solutions and equipment as well as experienced industry certified technicians. You can have confidence that an industry leader is cleaning and restoring your fire damage.


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Tomb Raider(2013):Review
So, this game was recommended to me by my good friend HellyonWorks. If you don't know her, I urge you to really check out her art, and give her a commission sometime. The odd thing is, I knew of Tomb Raider: but it was through the Angelina Jolie movies. I barely remember theme, but I can say they got Lara's personality spot on. But this is a very different game to the one older fans may know.
Rules as always:
1.Spoilers are abounding, and depending on the game, can spoil the experience. While not super story heavy, be warned going into the review.
2. I will not put aside any bias, but will try to be fair for games I do not like. This is my personal opinion. If you want to send your opinion, please do so in the comments below.
3. I am reviewing the PC Version.
So, what does the reboot have in store for us? This is my review of the rebooted version of Tomb Raider.
Promo art for the game
Tomb Raider begins with Lara Croft(now a lot younger) heading on expedition into the Bermuda Triangle, and her and her crew considering of Sam, her best friend, Reyes, a mechanical expert, Jonah, a New Zealand cook, Roth ,Lara's Father figure, Grim, the ship captain and Dr.Whitman, the tag along, head to the Bermuda Triangle, and their ship(The endurance) get wreaked, leaving Lara captured and having to find a way to her crew. After this they try to escape twice and fail, Lara realises 2 thing: Himiko is controlling the storms and Whitman is a traitor. This is very obvious, but to play up the Drama, Sam is the soul needed to revive Himiko. This involves Lara running into a man named Matius, the main villan who we only see a few time, and only wants to review Himiko for the sake of reviving Himiko. Anyways, Matius is defeated, Himiko is destroyed and Lara is prepared to look for the truth. More on that when I get to Rise of the Tomb Raider.
How you finish Matitus is neat though, Classic Lara with a twist.
Overall, the story was enjoyable, you can really tell this is a younger Lara Croft who is not experienced at staying out in the wild. There is also a lot of death in this game, but the only one that meant a lot was Roth. Grim we only see once before his sacrifice, and I didn't mention Alex(since he is really insignificance), but his is at least somewhat meaningful, since he wants to be a hero, so he sacrifices himself on the endurance shipwreck. However, Roth means a lot to Lara. Remember, he when he dies, Lara has lost both her father and father figure. I felt very sorry for Lara. Speaking of, compared to the older games(or what I have see of them), she is much more emotional and I think this makes her a better character compared to the old Lara, just because it gives a lot more range than just her being a badass. Though I do need to play the older games.
And by soon you mean half an hour. We know how games work.
We have a lot to get through, so buckle up folks. The basic mechanics now involve your bow and arrow, instead of dual pistols. This was my go to weapon, and this because you can get some great upgrades through the salvage system. Salvage can be collected from fallen enemies, but for this and other skills you have to buy this with skill points, which is earned by killing enemies. Honestly while I should be mad about not having this from at the start, I'm not, because of the fact this game takes place in the wild, you have to learn all these skills. Though skill points do take a while to stack up.
Can I just say I love the cinematography for this game's cutscenes? Not as much in game... more on this later.
Another thing I like is that you don't have buy the extra weapons from a shop, you get them early in the game, and upgrades come through finding parts, or entering secret tombs or challenge tombs. These are small puzzles that shouldn't be too brain taxing, and you will need them for a 100% run of the game(which I wasn't going for, so I missed a lot of them). There are a lot of documents to find, if 16 hours of main story content is not enough for you, but I am satisfied.
This is one I think you can't assess by endgame due to where the tomb is. It may be the first one you find(the game tells you when you are near one) but just fair warning.
You can still climb walls, they have marked paint, and with your axe you can climb certain rocks and attack enemies in close range.However, I don't like the melee system in this game, it feels very sluggish. I get that's the point(more focus on the shooting gameplay), but I think some good melee is also helpful in the wild.
Still, the guns you get are really nice. A shotgun(my go to in a shooter...when I play them), assault rifle that gets a grenade launcher, and a pistol, with the option to have a sliencer on it. You get FIRE arrows and GRENADE ARROWS. That's awesome. There is a focus on using stealth to get past, and enemies are very aggressive when you go all gun-ho, so go all out with caution.
Finally, their are costumes(which are DLC) that while purely cosmetic, give a different look to Lara depending on what one you are wearing.
Counting the days till Shadow of the Tomb Raider, Lara?
Looks, Sound and Final Thoughts
This game looks amazing on PC, though GeForce Experience messed up on giving me the best graphical settings. I will warning you though, the game has a lot of blood and gore, though it makes sense here, considering that this game wants to be more darker than the others. Like I said before, I love the cutscene cinematography in this game. However, in game, there is a lot of quick time events and situations where you are given partial control of Lara. This happens WAY too many times for my liking.
The soundtrack is amazing, but I wouldn't find myself listening to any of these in the street or while working on a project. Still, it works, it's just fitted to the atmospheric. A bit odd.
Overall, I found this to be a great game bar none. Older Tomb Raider fans may find this a bit alienating, as a lot of new elements may leave them alienated, but for new fans, or some one looking for a great game to play, I recommend this game to you. You can get it on Steam, PS3, Xbox 360, or the Definitive edition on PS4 or Xbox One.
Sorry that this took so long! The games I'm currently playing are Action games or RPG, and that does not mesh well with school! I do plan on finishing more games this summer!
Either way, Thanks for Reading, have a great night, share if it's not too much trouble for you, and take care.
Written By Nana Marfo
Tomb Raider(C) Square Enix
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George Duke is listed in the credits for the following albums:
1984 Philip Bailey The Wonders of His Love Songwriter, Keyboards
1985 Leon Patillo Love Around the World Executive Producer
1986 Philip Bailey Triumph Producer, Songwriter
1995 The Winans Heart & Soul Producer, Keyboards
George Duke (January 12, 1946 – August 5, 2013) was a multi-faceted American musician, known as a keyboard pioneer, composer, singer and producer in both jazz and popular mainstream musical genres. He had worked with numerous acclaimed artists as arranger, music director, writer and co-writer, record producer and professor of music. He first made a name for himself with the album The Jean-Luc Ponty Experience with the George Duke Trio. He was known primarily for thirty-odd solo albums as well as for his collaborations with other musicians, particularly Frank Zappa.
Created by: siremidor on 26-July-2010 - Last Edited by admin on 07-January-2016


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Kenda Perez (born May 18, 1983) is an American model and television host for the UFC and FOX Sports.  Host of the internationally broadcast Best of Pride Fighting Championships running four seasons and the Best Of WEC on Fox Sports 1 running two seasons. Kenda also hosts a weekly online MMA show "The Ultimate Show" on BleacherReport.com and a weekly SiriusXM radio show on Faction Radio. Formally represented by  Famous Stars and Straps owned by Travis Barker.  Kenda is the wife of top ranked professional mixed martial artist Cub Swanson, currently fighting in the UFC.

Career
Kenda was discovered after entering Maxim magazine's Hometown Hotties competition. She was voted as a top four finalist and appeared in the magazine and website. Kenda has continued to work with Maxim Magazine on promotional events, including an appearance on the TV game show 1 vs. 100 and appearing in the magazine numerous times including the cover of the December 2012 issue.

UFC
In 2009, the UFC produced a new show called "The Best of Pride Fighting Championships."  The program showcases some of the best fights, and fighters from Pride. Perez auditioned, and was hired as the host after impressing producers with her natural ability in front of the camera and behind the microphone. The first episode aired on January 15, 2010 on Spike TV. Season two debuted January 3, 2012 on Fuel TV in the United States. The third season aired on Fox Sports 2.  She now currently hosts "The Best Of WEC" in its second season on Fox Sports 1.

The Ultimate Show (Bleacher Report)
She hosted a weekly online MMA show for BleacherReport.com called "The Ultimate Show" for two years, which debuted on August 4, 2011.

In media

Magazine appearances
Maxim Magazine - Dec 2007 // Oct 2012 // Dec 2012
UFC Magazine - Aug/Sept 2010 // Oct 2011//Aug/Sept 2014 (Australia Edition)
Muscle & Fitness - Jan 2011
944 magazine - June 2011 (O.C. Edition)
Fight! Magazine - Aug 2011
Maxim UK  - Dec 2011 (Online Only)
Fighters Only UK - Issue 84
Inside Fitness - Aug/Sept 2012 (with Arianny Celeste and Brittney Palmer)

Features
CNNSI's Hot Clicks "Lovely Lady of the Day" for August 4, 2010
Bleacher Report's "MMA Hottie of the Week" on February 22, 2011
CNNSI's Hot Clicks Photo Gallery of the Day for April 23, 2012
Appears in UFC Undisputed 3 as a PRIDE ring girl.

Personal
Kenda was born in Laguna Beach California and grew up in old-town Orange while attending Orangewood Adventist Academy. She currently resides in Newport Beach, California. Her father, Ken Perez, holds a black belt in Shitō-ryū. Kenda and Cub Swanson were married June 1, 2018 and have a daughter, Royal Rae Swanson born on August 21, 2017 and identical twin boys, Saint Cub Swanson and King Cub Swanson born September 2, 2018.

References

Living people
American female models
American people of Mexican descent
Mixed martial arts broadcasters
1985 births
People from Laguna Beach, California
21st-century American women

redpajama_set_name: RedPajamaWikipedia


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Q: Multiple pipes for Gnuplot input Is there a method to use multiple pipes when reading data with Gnuplot?
The following will plot data received directly from the SQL statement.
plot "< sqlite3 tomato-rstats.db  \"SELECT data FROM table;\""
What I'd like is to process that data before it reaches Gnuplot.
I know that I could pipe the SQL data through the script, output to an intermediary file, and plot that file, but I'd rather skip the temp file.  I imagined something along the lines of the following, but it's clearly not the correct syntax.
plot "< sqlite3 tomato-rstats.db  \"SELECT data FROM table;\" | process.pl"
or
plot "< process.pl < sqlite3 tomato-rstats.db  \"SELECT data FROM table;\""
Is this possible through some other syntax?

A: Using
plot "< sqlite3 tomato-rstats.db \"SELECT data FROM table;\" | process.pl"

as you suggested works just fine in gnuplot. You can use any combination of piped commands as an input for gnuplot, e.g.,
plot "< cat file.txt | cut -f 5 | head -n 100" w l

plots the first 100 items in the fifth row of file.txt. It should be noted that using this as an input for plotting is useless as this processing can be done from within gnuplot itself, but it shows the possibilities of using your UNIX command line and its pipes for preprocessing input.
Needless to say, this does not work on non-UNIX systems, like Windows.

redpajama_set_name: RedPajamaStackExchange


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Skivington named Exiles Captain
London Irish can today confirm that George Skivington will remain Club Captain for the 2015/16 campaign.
The lock forward is entering his fourth season with London Irish, and his second as Club Captain, after signing for the Exiles back in 2012.
During his career Skivington has captained the England Saxons and guided the team to victory in the 2010 Churchill Cup. He joined the Exiles from Leicester Tigers and prior to this he spent eight seasons at Wasps where he won both the Heineken Cup and Premiership titles.
Tom Coventry, London Irish's new Head Coach stated that Skivington is the right player to lead the Exiles this season. "Since taking over at London Irish 10 weeks ago I have paid great attention to how the players carry themselves, their actions and their values. George is a player that leads by example and commands the respect of his peers around the group. He is the right player to lead this group of men this season and will be well supported by the senior leadership group."
George Skivington, who will make his 60th appearance for the Club when he leads London Irish out against Harlequins this Friday 25th September, commented saying: "It is a privilege to be named captain of this Club for a second season as we head into an exciting new era. We have new coaches and new players and the extended pre-season period has played a big role in gelling this squad of players together. I will relish the opportunity to captain the team this season and look forward to firstly the Cunningham Duncombe series and secondly the start of the Aviva Premiership against Leicester".


A recent study led by Dr. Louis Pasquale of Harvard Medical School and the Massachusetts Eye Infirmary may provide valuable data for the correlation between sunlight and the risk of developing cataracts and glaucoma.
The condition, called exfoliation syndrome (XFS) is generally believed to lead to both diseases that largely contribute to blindness. The study concluded, however that the findings were inconsistent. To learn more about the correlation between exposure to UV rays and XFS, researchers studied 185 people in the U.S. and Israel with XFS with a control group of 178 people in two other countries without the condition.
It has long believed that sunlight reflected up into the eyes may harm vision. The study analyzed the latitude of the participants, along with the average number of hours they spent outdoors every week.
They concluded that, for each degree of average latitude a subject lived away from the equator, they experienced an 11 percent increased risk of developing XFS. Furthermore, for each hour per week spent outdoors during the summer, averaged over a lifetime, a 4 percent increased risk of XFS is expected.
Other discoveries included a 2 percent lower risk of XFS for every 1 percent increase in the use of sunglasses during summer in the U.S. However, this did not appear to be the case in Israel.
Additionally, Americans who routinely worked near water or snow were more likely to develop XFS and they found no direct link between wearing brimmed hats and XFS.
The findings are important, but these scientists hasten to add that no claim of a cause-and-effect relationship can be confirmed and encourage further studies to substantiate their hypothesis. "This work provides evidence for a role of reflected UV rays in contributing to XFS," Pasquale's team wrote, but they added that genetics and other environmental factors could also be significant factors. "If confirmed in other studies, there could be reason to consider more widespread use of UV-blocking eyewear in the prevention of XFS," they concluded.
Paradoxically, a 2010 study provided evidence that outdoor activity may actually help myopic progression in children.
Li Deng, PhD, and her associates at the New England College of Optometry (NECO) Department of Vision Science studied the results from a visual activity survey conducted by the Children's Vision Laboratory at NECO in 1999. Parents of 147 children 6 to 18 years old completed the questionnaire.
Reporting the number of weekly hours in which their children spent reading for pleasure, studying, watching TV, using the computer and playing video games, the parents also recorded the weekly time engaged in outdoor activities.
Myopes, or subjects with a spherical equivalent to worse then -0.5 spend fewer hours outdoors during the school year than non-myopes, or children with a spherical equivalent of -0.5 or more.
The most telling conclusion, however, was that both refractive groups spent more time outdoors in June, July and August, with less myopic progression reported during these months in general.
The relationship between UV waves and eye disease is a complex one. Further studies are required. In the meantime, we recommend protecting your eyes with UV blocking when playing or working outdoors.


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Il Quartetto per archi n. 1 in sol maggiore K. 80, detto Quartetto di Lodi, è il primo della serie di ventitré quartetti per archi di Wolfgang Amadeus Mozart, composto il 15 marzo 1770.

Mozart, all'epoca quattordicenne, ultimò questo quartetto, nella sua forma originaria in tre movimenti, durante il suo primo viaggio in Italia, più precisamente a Lodi, in un albergo dove lui e suo padre si erano fermati nel tragitto fra Milano e Bologna. Più tardi, forse nel 1773, Mozart aggiunse, come quarto movimento, il Rondò finale.

A fungere da modello per il giovane compositore furono probabilmente i Concertini a 4 istromenti soli di Giovanni Battista Sammartini, che erano stati pubblicati nel 1766-67; nel febbraio 1770, a Milano, Mozart conobbe personalmente Sammartini. Fra gli altri compositori che potrebbero aver influenzato questo primo quartetto mozartiano si possono annoverare Luigi Boccherini e Baldassarre Galuppi.

Il primo movimento, Adagio, in forma-sonata piuttosto rudimentale, presenta due temi fra loro simili, di carattere cantabile; lo sviluppo, appena accennato, si compone di sole tre battute.

Il secondo movimento, Allegro, è anch'esso bitematico, ma stavolta i due temi sono ben distinti fra loro; il primo tema vede la preminenza del primo violino, con gli altri tre strumenti ridotti al ruolo di accompagnamento; il secondo tema inizia con l'arpeggio di Re maggiore esposto in stile di fuga; lo sviluppo presenta un nuovo tema di carattere contrappuntistico.

Il terzo movimento offre un contrasto fra la solennità del Menuetto e la leggerezza del Trio in note staccate; il quarto movimento, Rondò, aggiunto da Mozart alcuni anni dopo l'ultimazione dei primi tre, è definito da Massimo Mila "grazioso ma alquanto tautologico".

Note

Bibliografia

Collegamenti esterni

Quartetti per archi di Wolfgang Amadeus Mozart
Cultura a Lodi


Australian Broadcasting Corporation (ABC) has created a simple interactive presentation using Google Map that allows gauging sentiment of population of Commonwealth Electorates on key social, moral, economic and policy issues that were debated during the 2013 federal election campaign.
Information is based on 1.4 million responses collected via the ABC's Vote Compass tool. Results were weighted against Census information and are presented as a thematic map.
What emerges is a very interesting picture of "great divides" in the Australian society. In particular, the maps illustrate differences in points of view between city folks and rural electorates, between regions in capital cities (for example, East and West Sydney), or between haves and have nots. It is a rich material for political research and sociologists.


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Activated Carbon: What It Is, How It Works And Benefits
Once, the activated carbon or charcoal was considered to be a universal antidote. Today, it remains to be promoted as a powerful natural treatment. It has a variety of considered benefits, ranging from water purification to whitening teeth and lowering cholesterol.
Activated carbon (also known as activated charcoal) is a refined black powder made out of peat, petroleum coke, bone char, coal, coconut shells, sawdust or olive pits. It is known to be highly useful absorbent.
Because of its high surface area, neat structure, and high level of reactive surface, activated carbon is used to dechlorinate, purify, deodorize and decolorize both vapor and liquid applications.
Currently, lots of activated carbon producers, such as Puragen, recognize that activated carbon is prudent adsorbent for many industries, and is utilized for water purification, automotive applications, cosmetology, food grade products, petroleum, industrial gas purification, and noble metal recovery (primarily for gold). Activated carbon manufacturers are aware of its broad usage, and that is why it is mass-produced.
How Does Activated Carbon Work?
Activated carbon works by entrapping chemicals and toxins in the gut, stopping their absorption. The carbon's penetrable texture possesses a negative electrical charge, and due to that it attracts positively charged molecules, like gases and toxins. That helps it to trap toxins and chemicals in the gut.
Since our bodies don't absorb activated carbon, it is able to carry the toxins on its surface out of our bodies. As a result of its toxin-binding characteristics, activated carbon has plenty of medical uses as well.
For example, activated carbon is frequently used in cases of poisoning. That is because it can bind a wide range of drugs, minimizing their effects. In humans, activated carbon has been used as a poison remedy since the 18th century. It can be used to cure prescription drug overdoses, and overdoses of non-prescription medications like acetaminophen, sedatives, and aspirin.Nevertheless, activated carbon shouldn't be confused with carbon briquettes that we use for lighting barbecues. While both are made from the same base material, carbon briquettes have not been activated at high temperatures. Furthermore, they comprise other substances that are poisonous to humans.
In Humans, Activated Carbon Promotes Kidney Function
Activated carbon promotes kidney function by minimizing the number of waste materials that the kidneys need to filter. It is especially beneficial in patients suffering from chronic kidney disease, which is a condition where kidneys can no longer appropriately filter waste materials.
Our kidneys are ordinarily well equipped to filter our blood without any additional support. However, individuals who suffer from chronic kidney disease normally have a difficult time removing the toxins from their bodies.
Activated carbon might have the capability to bind the toxins, helping the body to eliminate them easier. The waste materials pass from the bloodstream into the gut through a procedure called diffusion. In humans, activated carbon has been demonstrated to help enhance kidney function in people suffering from chronic kidney disease.
Other Known Benefits of Activated Carbon
Activated carbon is also a well-known home medicine with different purposes, although it's significant to note that not all of those are proven by science. Anyhow, its most distinguished home uses are:
Gas reduction: Some case studies show that activated carbon helps reduce gas production after consumption of a gas-producing food. It also helps improve the odor of gas.
Water filtration: Activated carbon is a renowned way to minimize fluoride content and heavy metal in water. However, it is not very efficient for removing bacteria, viruses, or hard minerals from the water.
Skin treatment: Applying activated carbon to your skin is solicited as an efficient treatment for acne and insect bites. Plenty of young adults are using it for making face masks at home, instead of buying them from drug stores.
Hangover prevention: Activated charcoal is occasionally used to treat hangovers. While consuming it may reduce blood alcohol levels when combined with alcohol, its effects on hangovers haven't been studied.
Tooth whitening: The use of activated carbon for brushing teeth is said to whiten them. That is accomplished by absorbing plaque and the other staining compounds.
Cholesterol levels reduction: Activated carbon might also help in minimizing cholesterol levels. That is because it is able to bind cholesterol and cholesterol-comprising bile acid sequestrants in the gut, preventing the body from absorbing them.
Activated carbon is a substance with a variety of uses across many industry sectors. It may also be used to lower cholesterol, treat poisoning, reduce gas, and improve kidney function. Thanks to its amazing characteristics it's widely used nowadays, and it provides great benefits to mankind.
The post Activated Carbon: What It Is, How It Works And Benefits appeared first on InsightsSuccess.
The Top 6 Things That Must Be Planned while Starting a Business
Business People Who Became Billionaires Thanks to The Casino Industry


Nine technologies promising to clean up our environment: Today, we are facing numerous environmental challenges; many are a byproduct of other human actions, and it appears as if we are always looking for the next big thing to solve them. So how successful is really our green revolution? Technologist Ramez Naam argues in his book The Infinite Resource that the green revolution has been beneficial even though it created problems that still plague us today. There are many already existing technologies that could help solve several environmental issues, if developed on a larger scale. Among them are: organic batteries, commercialized carbon, nuclear innovations, tree root protection, solution-focused GPS, flyover country, better maps, nature's tech, crowdsourcing. Learn more how each of there technologies can truly help.


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New Terminal to be Named After Ray LaHood
The Honorable Ray LaHood
(Central Illinois Proud) – Peoria Airport's new international terminal will have a special name on it. It will be known as the Ray LaHood International Terminal when it is dedicated April 12th.
Karen Jensen, Chairwoman of the Metropolitan Airport Authority of Peoria, says, "Secretary LaHood has done so much for central Illinois. He has been an earnest and humble public servant for more than a quarter of a century. It is our honor to recognize his career of public service by putting his name on this public building, a
building with ties not only to his hometown, but also his prestigious appointment as a U.S. Secretary of Transportation."
The $11 million terminal includes a full-service Customs and Border Protection facility, as well as two additional dual-purpose gates for domestic or international travel. The cost of the 22,000-square-foot, two-story terminal will be covered by current passenger facility fees.
The current Transportation Secretary Anthony Foxx will speak at the April 12 ceremony, as well as the head of the FAA, Michael Huerta.
The event will be closed to the public.
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