ITEM 1. BUSINESS
Overview
We design, develop, and market field programmable gate arrays (FPGAs) and supporting products and services. FPGAs are used by manufacturers of communications, computer, consumer, industrial, military and aerospace, and other electronic systems to differentiate their products and get them to market faster. We are the leading supplier of FPGAs based on flash and antifuse technologies. Our strategy is to offer innovative solutions to markets in which our technologies have a competitive advantage, including the value-based, high-reliability, and high-speed FPGA markets. In support of our FPGAs, we offer ASIC conversion products; intellectual property (IP) cores; development systems; programming hardware; debugging tool kits and demonstration boards; a Web-based Resource Center; and design and programming services.
We shipped our first FPGAs in 1988 and thousands of our development tools are in the hands of customers, including Abbott Laboratories (Abbott Labs); Alcatel; BAE Systems (BAE); The Boeing Company; Cisco Systems, Inc. (Cisco); Hewlett-Packard Company (HP); Honeywell International Inc. (Honeywell); LG Electronics Inc. (LG); Lockheed Martin Corporation (Lockheed Martin); Marconi Corporation plc (Marconi); Nokia; Nortel Networks Corporation (Nortel); Raytheon Company (Raytheon); Siemens AG (Siemens); and Varian Medical Systems, Inc. (Varian).
We have foundry relationships with BAE in the United States; Chartered Semiconductor Manufacturing Pte Ltd (Chartered) in Singapore; Infineon Technologies AG (Infineon) in Germany; Matsushita Electronics Company (MEC) in Japan; United Microelectronics Corporation (UMC) in Taiwan; and Winbond Electronics Corp. (Winbond) in Taiwan. Wafers purchased from our suppliers are assembled, tested, marked, and inspected by us and/or our subcontractors before shipment to customers.
We market our products through a worldwide, multi-tiered sales and distribution network. In 2003, sales made through distributors accounted for 69% of our net revenues. One distributor, Unique Technologies, Inc. (Unique), accounted for 41% of our net revenues in 2003. Unique has been our sole distributor in North America since March 1, 2003. In addition to Unique, our North American sales network includes about 19 sales offices and about 17 sales representative firms. Our European, Pan-Asia, and Rest of World (ROW) sales networks include about eight sales offices and about 20 distributors and sales representative firms. In 2003, sales to customers outside North America accounted for 39% of net revenues.
On August 18, 2003, we relocated our worldwide headquarters to a larger facility to better accommodate our existing employees and position ourselves for future growth. Our principal facilities and executive offices are now located at 2061 Stierlin Court, Mountain View, California 94043-4655, and our telephone number at that address is (650) 318-4200.
We were incorporated in California in 1985. Our website is located at http://www.actel.com. We provide free of charge through a link on our website access to our Annual Reports on Form 10-K, Quarterly Reports on Form 10-Q, and Current Reports on Form 8-K, as well as amendments to those reports, as soon as reasonably practicable after the reports are electronically filed with or furnished to the Securities and Exchange Commission (SEC). The Actel name and logo and Libero are registered trademarks of Actel. This Annual Report also includes unregistered trademarks of Actel as well as registered and unregistered trademarks of other companies.
Industry Background
The three principal types of integrated circuits (ICs) used in most digital electronic systems are microprocessor, memory, and logic circuits. Microprocessors are used for control and computing tasks; memory devices are used to store program instructions and data; and logic devices are used to adapt these processing and storage capabilities to a specific application. Logic circuits are found in practically every electronic system.
The logic design of competing electronic systems is often a principal area of differentiation. Unlike the microprocessor and memory markets, which are dominated by a relatively few standard designs, the logic market is highly fragmented and includes, among many other segments, low-capacity standard transistor-transistor logic circuits (TTLs) and custom-designed application specific ICs (ASICs). TTLs are standard logic circuits that can be purchased "off the shelf" and interconnected on a printed circuit board (PCB), but they tend to limit system performance and increase system size and cost compared with logic functions integrated at the circuit (rather than the PCB) level. ASICs are customized circuits that offer electronic system manufacturers the benefits of increased circuit integration: improved system performance, reduced system size, and lower system cost.
ASICs include conventional gate arrays, standard cells, and programmable logic devices (PLDs). Conventional gate arrays and standard cell circuits are customized to perform desired logical functions at the time the device is manufactured. Since they are "hard wired" at the wafer foundry by use of masks, conventional gate arrays and standard cell circuits are subject to the time and expense risks associated with any development cycle involving a foundry. Typically, conventional gate arrays and standard cell circuits are first delivered in production volumes months after the successful production of acceptable prototypes. In addition, hard-wired ASICs cannot be modified after they are manufactured, which subjects them to the risk of inventory obsolescence and constrains the system manufacturer's ability to change the logic design. PLDs, on the other hand, are manufactured as standard devices and customized "in the field" by electronic system manufacturers using computer-aided engineering (CAE) design and programming systems. PLDs are being used by a growing number of electronic system manufacturers to increase product differentiation and manufacturing flexibility and speed time to market.
PLDs include simple PLDs, complex PLDs (CPLDs), and FPGAs. CPLDs and FPGAs have gained market share because they generally offer greater capacity, lower total cost per usable logic gate, lower power consumption than TTLs and simple PLDs, and faster time to market and lower development costs than hard-wired ASICs. As mask costs continue to rise, CPLDs and particularly FPGAs are becoming a cost-effective alternative to hard-wired ASICs at higher volumes. Even in high volumes, the time-to-market and manufacturing-flexibility benefits of CPLDs and FPGAs often outweigh their price premium over hard-wired ASICs of comparable capacity for many electronic system manufacturers.
Before a CPLD or FPGA can be programmed, there are various steps that must be accomplished by a designer using CAE design software. These steps include defining the function of the circuit, verifying the design, and laying out the circuit. Traditionally, logic functions were defined using schematic capture software, which permits the designer to essentially construct a circuit diagram on the computer. As CPLDs and FPGAs have increased in capacity, the time required to create schematic diagrams using schematic capture tools has often become unacceptably long. To address this problem, designers are increasingly turning to hardware description languages (HDLs), also known as high-level description (HLD). VHDL and Verilog are the most common HDLs, which permit the designer to describe the circuit functions at an abstract level and to verify the performance of logic functions at that level. The HDL description of the desired CPLD or FPGA device function can then be fed into logic synthesis software that automatically converts the abstract description to a gate-level representation equivalent to that produced by schematic capture tools. After a gate-level representation of the logic function has been created and verified, it must be translated or "laid out" onto the generic logic modules of the CPLD or FPGA. This is achieved by placing the logic gates and routing their interconnections, a process referred to as "place and route." After the layout of the device has been verified by timing simulation, the CPLD or FPGA can be programmed. Multiple suppliers of electronic design automation (EDA) tools provide software to effectively accomplish these place and route and simulation tasks for CPLDs and FPGAs.
Electronic system manufacturers program a CPLD or FPGA to perform the desired logical functions by using a device programmer to change the state of the device's programming elements (such as antifuses or memory cells) through the application of an electrical signal. Programmers are typically available from both the company supplying the device and third parties, and programming services are often available from both the company supplying the device and its distributors. Most CPLDs are programmed with erasable programmable read only memories or other "floating gate" technologies. Many FPGAs are programmed with static random access memory (SRAM) technology. Our FPGAs use flash and antifuse programming elements. After programming, the functionality and performance of the programmed CPLD or FPGA in the electronic system must be verified.
To a large extent, the characteristics of a CPLD or FPGA are dictated by the technology used to make the device programmable. CPLDs and FPGAs based on programming elements controlled by floating gates or SRAMs must be configured by a separate boot device, such as the serial programmable read only memory (PROM) commonly used with SRAM FPGAs. The need to boot these devices makes them less reliable (in the sense of being more prone to generate system errors) and less secure and means they are not functional immediately on power-up and often require a separate boot device. In addition, SRAM FPGAs and CPLDs based on look-up tables (LUTs) tend to consume more power. FPGAs based on flash and antifuse programming elements do not need to be booted-up, which makes them more reliable, more secure, "live-at-power-up" single-chip solutions that tend to operate at lower power. These are all characteristics shared by hard-wired ASICs but not by SRAM FPGAs or CPLDs.
The technology used to make a CPLD or FPGA programmable also dictates whether the device is reprogrammable and whether it is volatile. CPLDs and FPGAs based on programming elements controlled by floating gates or SRAMs are reprogrammable but lose their circuit configuration in the absence of electrical power. FPGAs based on antifuse programming elements are one-time programmable and retain their circuit configuration permanently, even in the absence of power. FPGAs based on programming elements controlled by flash memory are reprogrammable and nonvolatile, retaining their circuit configuration in the absence of power.
SRAM memories are susceptible to being upset by neutrons and alpha particles. When SRAM memories are used for data storage, these neutron-induced errors are called "soft errors." When SRAM memories are used to store the configuration of an FPGA, these neutron-induced errors are called "firm errors." A firm error affects the device's configuration, which may cause the device to malfunction. In addition, firm errors are not transient but will persist until detected and corrected. There is a significant and growing risk of functional failure in SRAM-based FPGAs due to the corruption of configuration data. Historically a concern only for military, avionics, and space applications, firm errors have become more of a problem for ground-based applications with each manufacturing process generation. Radiation testing data show that antifuse and flash FPGAs are not subject to loss of configuration due to neutron-induced upsets.
Strategy
Our flash and antifuse technologies are different from, and have certain advantages over, the SRAM and other technologies used in competing PLDs. Our strategy is to offer innovative solutions to markets in which our technologies have a competitive advantage, including the value-based, high-reliability, and high-speed FPGA markets.
A general competitive advantage that our technologies have is design security. Our nonvolatile, single-chip FPGAs offer practically unbreakable design security. Decapping and stripping of our flash devices reveals only the structure of the flash cell, not the contents. Similarly, the antifuses that form the interconnections within our antifuse FPGAs do not leave a signature that can be electrically probed or visually inspected. Antifuse FPGAs also do not require a start-up bitstream, eliminating the possibility of configuration data being intercepted. In addition, special security fuses are hidden throughout the fabric of our flash and antifuse devices. These FlashLock and FuseLock security fuses cannot be accessed or bypassed without destroying the rest of the device, making both invasive and noninvasive attacks ineffective. Our flash and antifuse FPGAs are also practically immune to neutron-induced firm errors.
o Value-Based Market
Much of the logic market is driven by cost. We address this value-based market with our flash FPGAs and our general-purpose antifuse FPGAs. In addition to low cost, our FPGAs add the value of hard-wired ASICs to the benefits provided by other PLDs. Like other PLDs, our FPGAs reduce design risk, inventory investment, and time to market. Unlike other PLDs, our FPGAs are nonvolatile, "live-at-power-up," low-power, single-chip solutions. In addition, logic designers can choose to use either hard-wired ASIC or FPGA software tools and design methodologies, and the architectures of our FPGAs enable the utilization of predefined IP cores, which can be reused across multiple designs or product versions. We also offer our customers a wide selection of packages and industrial-grade devices.
o High-Reliability Market
Much of the logic market for military and aerospace applications is driven by reliability, volatility, and resistance to radiation effects. We address this market with our military, avionics, and space-grade FPGAs. Our antifuse and flash FPGAs are reliable, nonvolatile, and not susceptible to configuration corruption caused by radiation. We believe that we are the world's leading supplier of high reliability PLDs. During 2003, we introduced a new line of FPGAs targeted specifically for the automotive market; announced the availability of flash-based ProASIC Plus and antifuse-based Axcelerator FPGA devices qualified to military temperature specifications; and unveiled our next-generation, radiation-tolerant RTAX-S FPGA offerings. With the addition of ProASIC Plus to our automotive FPGA product portfolio in 2004, we believe that we have the PLD industry's broadest automotive offering..
o High-Speed Market
Much of the logic market for communications applications is driven by speed, which has been a strength of our antifuse FPGAs. During 2003, we announced the production qualification of the first high-density, high-speed Axcelerator FPGA devices and the availability of Axcelerator devices qualified to industrial specifications.
Products and Services
Our product line consists of FPGAs, including
reprogrammable FPGAs based on flash technology,
one-time programmable FPGAs based on antifuse technology, and
high-reliability (HiRel) FPGAs.
In 2003, FPGAs accounted for 96% of our net revenues, almost all of which was derived from the sale of antifuse FPGAs. In support of our FPGAs, we offer ASIC conversion products, IP cores, development systems, programming hardware, debugging tool kits and demonstration boards, a Web-based Resource Center, and design and programming services.
o FPGAs
The capacity of FPGAs is measured in "gates," which traditionally meant four transistors. As FPGAs grew larger and more complex, counting gates became more challenging and no standard counting technique emerged. The appearance of FPGAs with memory further complicated matters because memory gates cannot be counted in the same way as logic gates. When we use "gate" or "gates" to describe the capacity of FPGAs, we mean "maximum system equivalent gates" unless otherwise indicated.
To meet the diverse requirements of our customers, we offer all of our FPGAs (except the two radiation-hardened devices) in a variety of speed grades, package types, and/or ambient (environmental) temperature tolerances. Commercial devices are qualified to operate at ambient temperatures ranging from zero degrees Celsius (0(degree)C) to +70(0)C. Industrial devices are qualified to operate at ambient temperatures ranging from -40(degree)C to +85(degree)C. Automotive devices are qualified to operate at ambient temperatures ranging from - -40(degree)C to +125(0)C with junction temperatures up to 150(degree)C. Military devices are qualified to operate at ambient temperatures ranging from - -55(degree)C to +125(0)C. "High reliability" or "HiRel" devices are qualified to automotive or military temperature specifications.
o Flash FPGAs
Our flash-based FPGAs include the ProASIC Plus and ProASIC families. The combination of a fine-grained, single-chip ASIC-like architecture and nonvolatile flash configuration memory makes our flash-based FPGAs economical alternatives to ASICs for low- and medium-speed applications. Unlike other PLDs available on the market today, which are either volatile or non-reprogrammable, our flash FPGAs are nonvolatile and reprogrammable.
o ProASIC Plus
The ProASIC Plus family of FPGAs, which was first shipped for revenue in 2002, consists of seven devices: the 75,000-gate APA075; the 150,000-gate APA150; the 300,000-gate APA300; the 450,000-gate APA450; the 600,000-gate APA600; the 750,000-gate APA750; and the 1,000,000-gate APA1000. As our second-generation flash family, ProASIC Plus devices include added features and improved user-configurable inputs and outputs (I/Os) and in-system programmability (ISP). Manufactured on a 0.22-micron process at UMC, the family can be ordered in approximately 136 speed, package, and temperature variations.
o ProASIC
The ProASIC family of FPGAs, which was first shipped for revenue in 1999, consists of four products: the 100,000-gate A500K050; the 290,000-gate A500K130; the 370,000-gate A500K180; and the 475,000-gate A500K270. Manufactured on a 0.25-micron embedded flash process at Infineon, the family can be ordered in approximately 30 speed, package, and temperature variations.
o Antifuse FPGAs
Our antifuse-based FPGAs include the Axcelerator, eX, SX-A, SX, MX, and legacy families, all of which are nonvolatile, secure, reliable, live at power-up, single-chip solutions. Our antifuse FPGA devices span six process generations, with each offering higher performance, lower power consumption, and improved economies of scale.
o Axcelerator
The Axcelerator family of FPGAs, which was first shipped for revenue in 2002, consists of five devices: the 125,000-gate AX125; the 250,000-gate AX250; the 500,000-gate AX500; the 1,000,000-gate AX1000; and the 2,000,000-gate AX2000. Manufactured on a 0.15-micron, seven-layer metal process at UMC, the family can be ordered in approximately 176 speed, package, and temperature variations.
The Axcelerator family was targeted at high-speed communications and bridging applications and designed to deliver high performance with low power consumption, high logic utilization, and superior design security. We market the Axcelerator family as the fastest general-purpose FPGAs.
o eX
The eX family of FPGAs, which was first shipped for revenue in 2001, consists of three devices: the 3,000-gate eX64; the 6,000-gate eX128; and the 12,000-gate eX256. Manufactured on a 0.25-micron antifuse process at UMC, the family can be ordered in approximately 66 speed, package, and temperature variations.
The eX family was designed for the e-appliance market of internet-related consumer electronics and includes a sleep mode to conserve battery power. eX devices also provide a small form factor, high design security, and an undemanding design process. We market the eX family as single-chip programmable replacements for low-capacity ASICs.
o SX-A and SX
The SX-A family of FPGAs, which was first shipped for revenue in 1999, consists of four products: the 12,000-gate A54SX08A; the 24,000-gate A54SX16A; the 48,000-gate A54SX32A; and the 108,000-gate A54SX72A. Manufactured on a 0.22-micron antifuse process at UMC and on a 0.25-micron antifuse process at MEC, the family can be ordered in approximately 262 speed, package, and temperature variations.
The SX family of FPGAs, which was first shipped for revenue in 1998, consists of four products: the 12,000-gate A54SX08; the 24,000-gate A54SX16 and A54SX16P; and the 48,000-gate A54SX32. Manufactured on a 0.35-micron antifuse process at Chartered, the family can be ordered in approximately 201 speed, package, and temperature variations.
SX was the first family to be built on our fine-grained, "sea of modules" metal-to-metal architecture. We market the SX-A and SX families as programmable devices with ASIC-like speed, power consumption, and pricing in volume production. In addition, the SX-A family offers I/O capabilities that provide full support for "hot-swapping." Hot swapping allows system boards to be exchanged while systems are running, a capability important to many portable, consumer, networking, telecommunication, and fault-tolerant computing applications.
o MX
The MX family of FPGAs, which was first shipped for revenue in 1997, consists of six products: the 3,000-gate A40MX02; the 6,000-gate A40MX04; the 14,000-gate A42MX09; the 24,000-gate A42MX16; the 36,000-gate A42MX24; and the 54,000-gate A42MX36. Manufactured on 0.45-micron antifuse processes at Chartered and Winbond, the family can be ordered in approximately 330 speed, package, and temperature variations. We market the MX family as a line of low-cost, single-chip, mixed-voltage programmable ASICs for 5.0-volt applications.
o Legacy Products
The MX family incorporates the best features of our legacy FPGAs and over time should replace those earlier products in new 5.0-volt commercial designs. Legacy products include the DX, XL, ACT 3, ACT 2, and ACT 1 families.
o DX and XL
The 3200DX family of FPGAs, which was first shipped for revenue in 1995, consists of five products: the 12,000-gate A3265DX; the 20,000-gate A32100DX; the 24,000-gate A32140DX; the 36,000-gate A32200DX; and the 52,000-gate A32300DX. Manufactured on a 0.6-micron antifuse process at Chartered, the family can be ordered in approximately 171 speed, package, and temperature variations.
The 1200XL family of FPGAs, which was first shipped for revenue in 1995, consists of three products: the 6,000-gate A1225XL; the 9,000-gate A1240XL; and the 16,000-gate A1280XL. Manufactured on a 0.6-micron antifuse process at Chartered, the family can be ordered in approximately 126 speed, package, and temperature variations.
The DX and XL families were designed to integrate system logic previously implemented in multiple programmable logic circuits. The DX family also offers fast dual-port SRAM, which is typically used for high-speed buffering.
o ACT 3
The ACT 3 family of FPGAs, which was first shipped for revenue in 1993, consists of five products: the 3,000-gate A1415; the 6,000-gate A1425; the 9,000-gate A1440; the 11,000-gate A1460; and the 20,000-gate A14100. Manufactured on a 0.6-micron antifuse process at Chartered and a 0.8-micron antifuse process at Winbond, the family can be ordered in approximately 189 speed, package, and temperature variations. The family was designed for applications requiring high speed and a high number of I/Os.
o ACT 2
The ACT 2 family of FPGAs, which was first shipped for revenue in 1991, consists of three products: the 6,000-gate A1225; the 9,000-gate A1240; and the 16,000-gate A1280. Manufactured on 1.0- and 0.9-micron antifuse processes at MEC, the family can be ordered in approximately 73 speed, package, and temperature variations. ACT 2 was our second-generation FPGA family and featured a two-module architecture optimized for combinatorial and sequential logic designs.
o ACT 1
The ACT 1 family of FPGAs, which was first shipped for revenue in 1988, consists of two products: the 2,000-gate A1010 and the 4,000-gate A1020. Manufactured on 1.0- and 0.9-micron antifuse processes at MEC, the family can be ordered in approximately 95 speed, package, and temperature variations. ACT 1 was the original family of antifuse FPGAs.
o HiRel FPGAs
Our HiRel FPGAs include automotive products, which are offered in plastic packages; military/avionics (Mil/Av) products, which are offered in plastic or ceramic (hermetic) packages; and radiation tolerant (Rad Tolerant) and radiation hardened (Rad Hard) products, which are offered in hermetic packages. We believe that we are the leading supplier of high reliability FPGAs. Since 1990, our FPGAs have been designed into numerous military and aerospace applications, including command and data handling, attitude reference and control, communication payload, and scientific instrument interfaces. Our space-qualified FPGAs have been on board more than 100 launches and accepted for flight-unit applications on more than 300 satellites.
o Automotive
During 2003, we announced the availability of a new line of FPGAs targeted specifically for the automotive market. Characterized for operation from -40(degree)C to 125(degree)C ambient temperature and up to 150(degree)C junction temperature, the automotive offering included our eX, SX-A, and MX antifuse families. On February 9, 2004, we announced the availability of our flash-based ProASIC Plus FPGAs, with densities up to 1,000,000 gates, in extended automotive temperature range versions. Our automotive devices are appropriate for in-cab control and interconnect functions for a range of automotive applications, such as power train control, telematics, occupant safety, navigation, speech recognition, control/comfort systems, passenger monitors, and heads-up displays.
o Mil/Av
Our Mil/Av devices are offered in three packaging and screening options: military-temperature plastic (MTP), military-temperature hermetic (MTH), and MIL-STD 883 Class B hermetic (Class B). MTP devices are offered in plastic packages and screened to military temperature specifications (-55(degree)C to +125(degree)C). MTH devices are offered in hermetic packages and screened to military temperature specifications. Class B devices are offered in hermetic packages and screened to MIL-STD 883 Class B specifications.
All members of our antifuse FPGAs families (except for the AX125 and the three eX devices) are offered in MTP packaging and screening. We have received complete Qualified Manufacturers Listing (QML) certification for the full line of MTP antifuse FPGAs, which can be integrated into design applications that would otherwise require higher-cost ceramic-packaged devices. The QML plastic certification also permits customers to integrate commercial and military production without compromising quality or reliability.
We offer 22 devices in MTH or Class B packaging and screening: the 2,000-gate A1010B; the 4,000-gate A1020B; the 6,000-gate A1425A; the 9,000-gate A1240A; the 11,000-gate A1460A; the 16,000-gate A1280A and A1280XL; the 20,000-gate A14100A and A32100DX; the 24,000-gate A54SX16; the 36,000-gate A32200DX; the 48,000-gate A54SX32 and A54SX32A; the 54,000-gate A42MX36; the 108,000-gate A54SX72A; the 250,000-gate AX250; the 300,000-gate APA300; the 500,000-gate AX500; the 600,000-gate APA600; the 1,000,000-gate APA1000 and AX1000; and the 2,000,000-gate AX2000. Hermetic-packaged Mil/Av devices are appropriate for avionics, munitions, harsh industrial environments, and ground-based equipment when radiation survivability is not critical.
During 2003, we announced the availability of our flash-based ProASIC Plus and antifuse-based Axcelerator FPGAs tested and verified to operate over the full military temperature range. Military-qualified AX250, APA300, AX500, APA600, AX1000, APA1000, and AX2000 devices are offered in MTP, MTH, and Class B packaging and screening options. The low power consumption, high design security, and practical immunity to firm errors of the ProASIC Plus and Axcelerator families make these Mil/Av solutions suitable for a wide range of military, aerospace, and avionics applications, including ground-, air- and sea-based military systems and radar, command and control, and navigation systems.
o Rad Tolerant
During 2003, we introduced our next-generation, radiation-tolerant RTAX-S FPGA family. With densities up to 2,000,000 gates, RTAX-S devices will offer key features optimized for space applications, such as hardened registers that offer practical immunity to single-event upsets (SEUs) and usable error-corrected onboard RAM. These features position the RTAX-S family as a radiation-tolerant alternative to hard-wired ASICs that meets the density, performance, and radiation-resistance requirements of many satellite applications. RTAX-S devices will allow us to aggressively target bus and payload applications in low-, mid-, and geosynchronous-earth orbit satellites. On February 11, 2004, we announced the introduction of the 250,000-gate RTAX250S FPGA, extending the family to three devices.
On December 2, 2003, we introduced an advanced packaging technology small enough to enable the assembly of tested and programmed FPGAs into multi-chip modules (MCMs) for space applications. Capable of delivering products with a form factor similar to bare die, the new ceramic chip carrier land grid (CCLG) package eliminates the handling, testing, and programming challenges associated with using die in MCMs. We also announced the availability of the first product based on this technology, the RT54SX32S-CC256M, which is factory tested at both extremes of the military temperature range and at room temperature prior to shipment.
In addition to the offerings discussed above, our Rad Tolerant family of FPGAs consists of eight products: the 4,000-gate RT1020; the 6,000-gate RT1425A; the 11,000-gate RT1460A; the 16,000-gate RT1280A; the 20,000-gate RT14100A; the 24,000-gate RT54SX16; the 48,000-gate RT54SX32S; the 108,000-gate RT54SX72S. These Rad Tolerant FPGAs are offered with Class B or Class E (extended flow/space) qualification and total dose radiation test reports are provided on each segregated lot of devices.
Rad Tolerant FPGAs are designed to meet the logic requirements for all types of military, commercial, and civilian space applications, including satellites, launch vehicles, and deep-space probes. They provide cost-effective alternatives to radiation-hardened devices when radiation survivability is important but not essential. In addition, Rad Tolerant devices have design- and pin-compatible commercial versions for prototyping.
o Rad Hard
The Rad Hard family of FPGAs, which was first shipped for revenue in 1996, consists of two products: the 4,000-gate RH1020 and the 16,000-gate RH1280. Manufactured on a radiation-hardened 0.8-micron antifuse process by BAE, Rad Hard devices are shipped with full QML Class V screening. The Rad Hard family was designed to meet the demands of applications requiring guaranteed levels of radiation survivability. Rad Hard FPGAs are appropriate for military and civilian satellites, deep space probes, planetary missions, and other applications in which radiation survivability is essential.
o Supporting Products and Services
In support of our FPGAs, we offer ASIC conversion products, IP cores, development systems, programming hardware, debugging tool kits and demonstration boards, a Web-based Resource Center, and design and programming services.
o ASIC Conversion Products
We offer a conversion path for high-volume designs using our flash FPGAs by remapping the functionality of the FPGA into a cost-effective standard cell ASIC. These pin-for-pin replacements are designed from the existing FPGA database, which reduces the risk typically associated with ASIC design conversions.
We also offer a solution that permits customers to convert ASICs (or other obsolete components) to FPGA designs while preserving the existing ASIC footprint on a production board. Semiconductor device obsolescence is a growing problem in the electronics industry. Using one of our FPGAs and a thin adapter board, this pin-compatible component replacement solution can significantly extend the useful life of customer designs.
o IP Cores
IP cores are an integral part of our solution offering. Our CompanionCore Alliance Program is a cooperative effort between us and independent third-party IP core developers to produce and provide industry-standard synthesizable semiconductor IP cores that are optimized for use in our FPGAs. We offer IP cores generated, verified, and supported by us, called DirectCores, and by our alliance partners, called CompanionCores. Our offering includes approximately 34 bus interface, 61 communications, 22 data security, four memory control, 15 multimedia and error correction, and 25 processor and peripheral IP cores. Our DirectCore and CompanionCore offerings are available in either RTL or netlist formats. Targeting the aerospace, automotive, communications, consumer, industrial, and military markets, these IP cores complement the nonvolatile, secure, and low-power characteristics of our flash and antifuse FPGAs.
During 2003, we introduced the new Platform8051, an integrated platform solution initially consisting of six pre-integrated and pre-verified IP cores. Optimized for use with our FPGAs, the Platform8051 solution enables a flexible, cost-effective, highly-integrated embedded system for the consumer, communications, and automotive market segments as well as industrial, military, and aerospace applications. Designers may specify any configuration of the industry-standard IP cores and within one day receive the platform design files via a Web-based delivery system.
o DirectCores
During 2003, we announced the availability of UTOPIA CoreU1LL, CoreU1PHY, and CoreU2PHY DirectCores targeted at asynchronous transfer mode (ATM) communication system developers; a PCI-X IP core suitable for high-performance applications such as servers and workstations, as well as network and test equipment; a MIL-STD-1553B bus controller core for space, avionics, and military applications in which high-reliability and system redundancy are essential; and our Core8051 8-bit high-performance embedded microcontroller (MCU) IP core. Approximately 21 DirectCore IP cores are available for evaluation or licensing from us or through our distributors or sales representatives. We offer evaluation, single-use, and unlimited-use licenses for all of our IP cores.
o CompanionCores
On May 5, 2003, we announced that a new CompanionCore Alliance Program partner, Eureka Technology, Inc. (Eureka), had optimized three PowerPC interface IP cores for use with our ProASIC Plus, Axcelerator, SX-A, and RTSX-S FPGAs. On July 28, 2003, we announced that another new CompanionCore Alliance Program partner, 4i2i Communications, Ltd. (4i2i), had optimized its Viterbi and Reed-Solomon encoder and decoder IP cores for use with our ProASIC Plus, Axcelerator, SX-A, and RTSX-S FPGAs. In addition, 4i2i optimized its JPEG (Joint Photographic Experts Group) encoders and decoders for our high-performance Axcelerator device family. During 2003, we also announced the availability of the industry's first Gigabit FibreChannel IP cores designed for FPGA devices operating to military temperature specifications.
Approximately 96 CompanionCores are available from our CompanionCore Alliance Program partners, including eight from 4i2i; 11 from Amphion Semiconductor, Inc.; six from CAST, Inc.; five from Eureka; nine from Helion Technology Ltd.; 25 from Inicore, Inc. (Inicore); 23 from Memec Design; and nine from MorethanIP GmbH. A number of licensing models are available from our Alliance partners, including evaluation licenses in most cases.
On February 9, 2004, we announced that a new CompanionCore Alliance Program partner, Intelliga Integrated Design (Intelliga), had optimized its local interconnect network (LIN) and controller area network (CAN) cores to support our automotive- and industrial-temperature grade devices. We now offer more than 30 IP cores specifically designed and optimized for in-cab and under-the-hood automotive applications.
o Development Systems
Our strategy is to provide design software integrated with existing EDA software and design flows. We work closely with EDA vendors to provide early technical information on our new releases so that our partners can offer timely support. Our EDA partners include Aldec, Inc.; Cadence Design Systems, Inc. (Cadence); Celoxica Limited; Magma Design Automation, Inc. (Magma); Mentor Graphics; SynaptiCAD, Inc. (SynaptiCAD); Synopsys; and Synplicity.
o Libero
Our Libero tool suite is a comprehensive design environment that integrates leading design tools and streamlines the design flow; manages all design and report files; and passes necessary design data between tools. The Silver Edition of our Libero IDE (integrated design environment) includes Mentor Graphics' ViewDraw schematic capture tool; SynaptiCAD's WaveFormer Lite test bench generation system; Synplicity's Synplify synthesis software; our Silicon Explorer verification and logic analyzer tool; and our Designer place-and-route software. In addition, the Gold Edition of our Libero IDE includes Mentor Graphics' ModelSim simulation and design verification software, the Platinum Edition includes Synplicity's Synplify AE synthesis software, and the Platinum PS Edition includes Magma's PALACE physical synthesis tool.
During 2003, we announced the release of three versions of our Libero IDE. Enhancements included improvements to the Synplicity synthesis and our Designer place-and-route tools, which enable designers to improve the performance of our ProASIC Plus devices while reducing design-cycle time; the addition of FlashLock support for the Permanent Lock feature in ProASIC Plus FPGAs, which allows designers to secure the device by disabling the ability to reprogram or reverse engineer the device; and expanded interfaces to external tools, such as the Precision and LeonardoSpectrum synthesis tools from Mentor Graphics, the Synplify Pro synthesis software from Synplicity, and our programming and debugging tools. On February 2, 2004, we announced that our Libero IDE had again been enhanced to provide customers with faster timing closure and performance when using our flash-based ProASIC Plus FPGAs.
o Designer
Our Designer software is also available from us as a standalone interactive design implementation tool. The physical design tool suite allows designers to import a netlist generated from a third party CAE tool, place and route (layout) the design to achieve the timing required, and generate a programming file to program our FPGAs. Our Designer place-and-route software supports all of the established EDA standards and popular synthesis, schematic, and simulation tools from the leading EDA vendors, including Cadence, Mentor Graphics, Synopsys, and Synplicity. Several ease-of-use enhancements were made to our Designer physical design tool suite during 2003, including user-driven device floorplanning and a multi-view graphical interface. New features added in 2004 include software that enables programming or testing of ProASIC Plus FPGAs when included in a daisy chain of devices and support for the Linux platform.
o Programming Hardware
Programmers execute instructions included in files obtained from our Designer software to program our FPGAs. All of our FPGAs can be programmed by the Silicon Sculptor II programmer. The Silicon Sculptor II programmer is a compact, single-device programmer with stand-alone software for the personal computer (PC). Silicon Sculptor II was designed to allow concurrent programming of multiple units from the same PC. We also offer programming adapters, which must be used with the Silicon Sculptor II programmer; surface-mount sockets, which make it easier to prototype designs using our antifuse FPGAs; prototyping adapter boards; and accessories. In addition, we support programmers offered by BP Microsystems Inc.
Our flash FPGAs can also be programmed by the FlashPro programmers, which provide ISP for our ProASIC Plus and ProASIC FPGA families. Designers can configure our flash-based devices using only the portable FlashPro programmer and a cable connected to either the parallel or USB port of a PC. The ISP feature permits devices to be programmed after they are mounted on a PCB. During 2003, we announced the availability of a portable, low-cost FlashPro Lite programmer for use with our ProASIC Plus family of FPGAs. This next-generation programmer is a very compact product that allows customers to program devices using a laptop computer at any location.
o Debugging Tool Kits and Demonstration Boards
Our design diagnostics and debugging tool kits and accessories permit designers to improve productivity and reduce time to market by removing the guesswork typically associated with the process of system verification. We offer different tools kits for our flash and antifuse products. Our development kits and demonstration boards and accessories permit users to evaluate particular products.
o Design Diagnostics and Debugging Tool Kits
Our antifuse FPGAs contain internal circuitry that provides built-in access to every node in a design, enabling real-time observation and analysis of a device's internal logic nodes. Silicon Explorer II, an easy-to-use integrated verification and logic analysis tool kit for the PC, accesses the probe circuitry. The tool kit allows designers to complete the design verification process at their desks.
The FS2 CLAM (Configurable Logic Analyzer Module) System provides logic analyzer capabilities for our flash-based FPGAs. Embedded in our flash devices, the CLAM System provides an intuitive way to view internal signals and debug the logic design. The FS2 CLAM hardware probe is offered by First Silicon Solutions, Inc. (FS2). In addition, Synplicity offers the Identify RTL Debugger with support for our ProASIC Plus device family. This utility allows customers to debug their hardware directly from their RTL code.
o Development Kits and Demonstration Boards
On March 17, 2003, we announced the availability of a low-cost starter kit for our ProASIC Plus devices. The starter kit consists of an evaluation board with an APA075 ProASIC Plus device, our Libero Gold IDE, a FlashPro Lite programmer and programming cable, power supply, tutorials, and support documentation. With the new starter kit, Actel customers can efficiently evaluate the performance and functionality of their designs for cost-sensitive ASIC-alternative applications in the industrial, communications, networking, and avionics markets.
During 2003, we also announced the availability of Core 1553B and CorePCIX evaluation boards and the Platform8051 development kit. In addition, we offer Axcelerator, CorePCI, ProASIC Plus, and ProASIC Plus ISP evaluation boards.
On February 9, 2004, we announced the availability of the Actel Automotive Development Kit, which enables engineers to use our FPGAs to create designs for automotive applications. Developed by Memec Design and distributed globally by Unique Memec, the Kit combines an Actel FPGA-based development board with Memec Design's controller area network (CAN) IP core.
o Resource Center
On June 9, 2003, we announced the expansion of our Resource Center to include comprehensive information on power consumption, "green" packaging, and neutron-induced firm errors. The Web-based Resource Center provides customers, design engineers, and managers with information on issues that directly affect users of FPGAs and hard-wired ASICs. Launched in 2002 to provide information on design security issues and increase the awareness of design theft, the Web site includes technology tutorials, frequently-asked questions (FAQs), market overviews, application notes, white papers, extensive glossaries of industry terms, and links to other relevant articles and third-party resources. Additional topics and issues will be added as appropriate.
o Services
With our acquisition of the Protocol Design Services Group from GateField Corporation (GateField) in August 1998, we became the first FPGA provider to offer system-level design expertise. The Design Services organization operates out of a secure facility located in Mt. Arlington, New Jersey, and is certified to handle government, military, and proprietary designs. The Group provides varying levels of design services to customers, including FPGA, ASIC, and system design; software development and implementation; and development of prototypes, first articles, and production units. Our Design Services team has participated in the development of a wide range of applications, including optical networks, routers, cellular phones, digital cameras, embedded DSP systems, automotive electronics, navigation systems, compilers, custom processors, and avionics systems.
We program significant volumes of FPGAs for our customers each month. We offer high-volume programming for all device and package types in our programming center, which is located at our factory in Mountain View, California. We are ISO, QML, STACK, and PURE certified, permitting us to meet customer requirements for high-quality programmed devices. As part of the programming process, we offer ink marking for customer-specific marking needs. Volume programming charges are based on the type of device and quantity per order.
On November 17, 2003, we unveiled our new Solution Partners Program, which is a cooperative effort with third-party providers of FPGA design services, embedded software, and hardware products to help designers accelerate their time to market for Actel-based designs. The Program provides customers with access to additional design resources, application expertise, and products from strategic partners worldwide that complement our products and services. We also introduced an updated IP Web interface.
Markets and Applications
FPGAs can be used in a broad range of applications across nearly all electronic system market segments. Most customers use FPGAs in low to medium volumes in the final production form of their products. Some high-volume electronic system manufacturers use FPGAs as a prototyping vehicle and convert production to lower-cost hard-wired ASICs, while others with time-to-market constraints use FPGAs in the initial production and then convert to lower-cost ASICs. As product life cycles shorten, mask sets and foundry capacity become more expensive, FPGAs become less expensive, and new chip interface standards emerge (putting a premium on I/O flexibility), more high-volume electronic system manufacturers are electing to retain FPGAs in volume production.
o Military and Aerospace
In 2003, military and aerospace applications accounted for an estimated 36% of our net revenues. Rigorous quality and reliability standards, stringent volume requirements, and the need for design security are characteristics of the military and aerospace market. Our FPGAs have high quality and reliability and are almost impossible to copy or reverse engineer, making them appropriate for many military and aerospace applications. We believe we are the world's leading supplier of military and aerospace PLDs. Our customers in the military and aerospace market include: BAE, Raytheon, Honeywell, and Lockheed Martin.
Our antifuse FPGAs are especially well suited for space applications, due to the high radiation tolerance of the antifuse and our FPGA architecture. Thousands of our FPGAs have performed flight-critical functions aboard manned space vehicles, earth observation satellites, and deep-space probes, and our FPGAs often perform mission-critical functions on important scientific missions in space. We participate in programs administered by the Goddard, Johnson, and Marshall Space Flight Centers of the National Aeronautics Space Administration (NASA), including the Space Shuttle, International Space Station, and Hubble Space Telescope. We also participate in programs at California Institute of Technology's Jet Propulsion Laboratory, including the Mars Pathfinder and the Mars Spirit and Opportunity Rovers. Our FPGAs can also be found in spacecraft launched by practically every civilian space agency around the world, including the European Space Agency (ESA) and the Japanese National Space Development Agency.
For example, on July 14, 2003, we announced that our RTSX-S radiation-tolerant FPGAs had been selected for extensive use on the Herschel and Planck space probes, which are scheduled for launch by the ESA in 2007. The Herschel probe will study infrared radiation and the Planck probe will study cosmic background radiation. Our RT54SX32S and RT54SX72S parts will be used for many flight-critical functions on the space explorations, including interfacing and control, co-processing and data handling, as well as mission-critical functions within various scientific instruments.
o Industrial
In 2003, industrial control and instrumentation applications accounted for an estimated 26% of our net revenues. Industrial control and instrumentation applications often require complex electronic functions tailored to specific needs. FPGAs offer programmability and high density, making them attractive to this segment of the electronic equipment market. Our customers in the industrial market include: Abbott Labs, GE Medical Systems, Siemens, and Varian.
For example, on July 21, 2003, we announced that C-Map, a leading supplier of marine cartography, had adopted our SX-A FPGAs for use in its marine navigation system offerings. Our A54SX32A solution will be used as a graphics controller and display driver, allowing different resolutions, black/white or color displays, and a variety of other features, such as animated forecasting against vessel positioning. The SX-A FPGA was chosen for its secure and reliable operation in the rugged and harsh environments of alternate cold and heat and intense humidity in which the marine navigation equipment operates.
o Communications
In 2003, communications applications accounted for an estimated 26% of our net revenues. Increasingly complex equipment must frequently be designed to fit in the space occupied by previous product generations. In addition, the communications environment rewards short development times and early market entry. The high density, high performance, and low power consumption of our antifuse FPGAs make them suitable for use in high-speed communications equipment. The high capacity, low cost, low power consumption, and reprogrammability of our flash FPGAs make them appropriate for use in other communications applications. Our customers in the communications market include: Cisco, Marconi, Nokia, and Nortel.
o Consumer and Computer
In 2003, consumer and computer applications accounted for an estimated 12% of our net revenues. Like the communications market, the markets for consumer and computer products place a premium on early market entry for new products and are characterized by short product life cycles.
o Consumer
The high performance, low power consumption, and low cost of antifuse FPGAs make them appropriate for use in products enabling the portability of the internet, or "e-appliances," and other high-volume electronic systems targeted for consumers. E-appliance applications include MP3 "music-off-the-internet" players, digital cable set-top boxes, DSL and cable modems, digital cameras, digital film, multimedia products, and smart-card readers. Our customers in the consumer market include: Channel, Datel, Inc., IC Boss, LG, and Shinyoung Precision Co., Ltd.
For example, on November 24, 2003, we announced that X-traFun Inc. had selected our eX FPGA device to perform control, interface, and security functions in the X-traFun Bluetooth Wireless PDA Cartridge for Nintendo's Game Boy Advance hand held game console. Leveraging our FuseLock antifuse technology, the eX FPGA secures X-traFun's proprietary IP from reverse engineering. In addition, the eX FPGA's small form factor and high utilization enabled significant reductions in the size, weight, and total system cost of the production version of the X-traFun cartridge, which will allow users to enjoy next-generation interactive gaming and wireless Web, email, and chat applications on any Game Boy Advance handheld game console.
o Computer
FPGAs reduce the time to market for computer systems and facilitate early completion of production models so that development of hardware and software can occur in parallel. Our customers in the computer market include: Allied Telesis K.K., Dialogic Corporation, HP, and Sky Computer.
For example, on January 28, 2003, we announced that Dr. Kaiser Systemhaus had selected our SX-A FPGAs for use in the construction of its PRODASAFE, a BIOS extension produced as a PCI-compatible PC plug-in card. The PRODASAFE card protects the operating system, application programs, and configurations of the PC from illegal manipulation, alteration, and viruses. Our secure, nonvolatile 54SX08A FPGA serves as an interface between the boot-PROM and the PCI bus to provide the protection functions.
o Automotive
Today's automobiles contain miles of wiring, hundreds of circuits, and a wide variety of other electronic content. Increasing sophistication under the hood has required a wide range of systems in the cab to help operators monitor performance and control a variety of diagnostic and telematic functions. In addition, manufacturers are striving to differentiate their products with a variety of complex digital systems for entertainment and networked information appliances. As a result, in-car electronics content is increasing at a rapid rate. During 2003, we announced a new line of FPGAs targeted specifically for the automotive market. Our automotive products enable designers to realize the time-to market advantages of programmable logic while providing a solution that can meet the rapidly evolving diagnostic, telematic, and infotainment requirements of the automotive industry.
For example, on November 10, 2003, we announced that Life Racing, the electronics design arm of Advanced Engine Research Ltd., had successfully used our ProASIC Plus FPGAs in an automotive engine control unit. Competitive race car engine control units require complex tuning algorithms, optimized for each individual controller device, to manage engine timing. With standard Time Processor Unit (TPU) controllers, this critical software can require significant rework as application requirements change. Life Racing was able to replace off-the-shelf TPU controllers with our in-system programmable (ISP) APA450 ProASIC Plus devices. Implementing a flexible hardware solution enabled Life Racing to shorten software development time, reduce debug requirements, and speed overall time to market.
Sales and Distribution
We maintain a worldwide, multi-tiered selling organization that includes a direct sales force, independent sales representatives, and electronics distributors. Our North American sales force consists of about 47 sales and administrative personnel and field application engineers (FAEs) operating from about 19 sales offices located in major metropolitan areas. Direct sales personnel call on target accounts and support direct original equipment manufacturers (OEMs). Besides overseeing the activities of direct sales personnel, our sales managers also oversee the activities of about 17 sales representative firms operating from about office locations. The sales representatives concentrate on selling to major industrial companies in North America. To service smaller, geographically dispersed accounts in North America, we have a distributor agreement with Unique, which has about 35 offices in North America.
We generate a significant portion of our revenues from international sales. Sales to European customers accounted for 25% of net revenues in 2003. Our European sales organization consists of about 24 employees operating from four sales offices and about 11 distributors and sales representatives having about 26 offices (including Unique, which has nine offices in Europe). Sales to Japan and other international customers accounted for 14% of net revenues in 2003. Our Pan-Asia and Rest of World (ROW) sales organization consists of about 12 employees operating from four sales offices and about nine distributors and sales representatives having about 20 offices (including Unique, which has about nine offices in Pan-Asia and ROW).
Sales made through distributors accounted for 69% of our net revenues in 2003. Our North American distributors during 2003 were Unique and Pioneer-Standard Electronics, Inc. (Pioneer). On March 1, 2003, we consolidated our distribution channel by terminating our agreement with Pioneer, leaving Unique as our sole distributor in North America. As is common in the semiconductor industry, we generally grant price protection to distributors. Under this policy, distributors are granted a credit upon a price reduction for the difference between their original purchase price for products in inventory and the reduced price. From time to time, distributors are also granted credit on an individual basis for approved price reductions on specific transactions to meet competition. We also generally grant distributors limited rights to return products. To date, product returns under this policy have not been material. We maintain reserves against which these credits and returns are charged. Because of our price protection and return policies, we do not recognize revenue on products sold to distributors until the products are resold to end customers.
Our sales cycle for the initial sale of a design system is generally lengthy and often requires the ongoing participation of sales, engineering, and managerial personnel. After a sales representative or distributor evaluates a customer's logic design requirements and determines if there is an application suitable for our FPGAs, the next step typically is a visit to the qualified customer by a regional sales manager or an FAE from us or one of our distributors or sales representatives. The sales manager or FAE may then determine that additional analysis is required by engineers based at our headquarters.
Backlog
Our backlog was $32.3 million at January 4, 2004, compared with $17.3 million at January 5, 2003. We include in our backlog all OEM orders scheduled for delivery over the next nine months and all distributor orders scheduled for delivery over the next six months. We sell standard products that may be shipped from inventory within a short time after receipt of an order. Our business, and to a great extent that of the entire semiconductor industry, is characterized by short-term order and shipment schedules rather than volume purchase contracts. In accordance with industry practice, our backlog generally may be cancelled or rescheduled by the customer on short notice without significant penalty. As a result, our backlog may not be indicative of actual sales and therefore should not be used as a measure of future revenues.
Customer Service and Support
We believe that premiere customer service and technical support are essential for success in the FPGA market. We facilitate service and support through service team meetings that address particular aspects of the overall service strategy and support. Many of our customers regularly measure the most significant areas of customer service and technical support. Our customer service organization emphasizes dependable, prompt, accurate responses to questions about product delivery and order status.
Our FAEs located in Canada, France, Germany, Hong Kong, Italy, Japan, South Korea, Taiwan, the United Kingdom, and the United States provide technical support to customers worldwide. This network of experts is augmented by FAEs working for our sales representatives and distributors throughout the world. Customers in any stage of design may also obtain assistance from our technical support hotline or online interactive automated technical support system. In addition, we offer technical seminars on our products and comprehensive training classes on our software.
We generally warrant that our FPGAs will be free from defects in material and workmanship for one year, and that our software will conform to published specifications for 90 days. To date, we have not experienced significant warranty returns.
Manufacturing and Assembly
Our strategy is to utilize third-party manufacturers for our wafer requirements, which permits us to allocate our resources to product design, development, and marketing. Our FPGAs in production are manufactured by:
Chartered in Singapore using 0.45- and 0.35-micron design rules;
Infineon in Germany using 0.25-micron design rules;
MEC in Japan using 1.0-, 0.9-, 0.8-, and 0.25-micron design rules;
UMC in Taiwan using 0.22- and 0.15-micron design rules; and
Winbond in Taiwan using 0.8- and 0.45-micron design rules.
Wafers purchased from our suppliers are assembled, tested, marked, and inspected by us and/or our subcontractors before shipment to customers. We assemble most of our plastic commercial products in Hong Kong, South Korea, and Singapore. Hermetic package assembly, which is often required for military applications, is performed at one or more subcontractor manufacturing facilities, some of which are in the United States.
We are committed to continuous improvement in our products, processes, and systems and to making our quality and reliability systems conform to standards and requirements recognized worldwide. During 2003, we received ISO 9001:2000 certification after an extensive audit verifying our commitment to quality management principles, including customer satisfaction and control of product development and operational activities. ISO certification provides a globally recognized benchmark for the integrity of processes and procedures. In addition, our antifuse-based FPGAs received QML-38535 certification, which confirms that we have control of our processes and procedures in accordance with the standards set forth in the MIL-PRF-38535. A QML-approved quality system provides assurance to our customers regarding the suitability of our products for use in military and space applications that have stringent quality and reliability requirements. Many suppliers of microelectronic components have also implemented QML as their primary worldwide business standard. ISO and QML certification are granted by Defense Supply Center Columbus (DSCC).
We are also STACK and PURE certified. STACK International consists of major electronic equipment manufacturers serving the worldwide high-reliability and communications markets. Certification as a STACK International supplier confirms that our standard qualification procedure and product monitor program and manufacturing process meet or exceed the required specification. PURE, which stands for PEDs (plastic encapsulated devices) Used in Rugged Environments, is an association of European equipment makers dedicated to quality and reliability. Our PURE certification is for plastic quad flat pack (PQFP) packages.
Strategic Relationships
We enjoy ongoing strategic relationships with many of our customers, distributors, sales representatives, foundries, assembly houses, and other suppliers of goods and services, including the following:
o Magma
On October 14, 2003, Magma, a provider of chip design solutions, announced that Magma's PALACE (Physical And Logical Automatic Compilation Engine) physical synthesis software supports Actel's reprogrammable, flash-based ProASIC Plus FPGA device families. According to Magma, PALACE provides FPGA designers with significantly higher quality of results (QoR) and much faster timing closure. Other benefits of the software include lower design costs, and reduced design cycles.
On December 8, 2003, we announced that our Libero IDE had been enhanced to include Magma's PALACE physical synthesis tool. The PALACE software can provide higher performance for ProASIC Plus FPGAs. Through a new OEM agreement with Magma, the PALACE software is available from us as a standalone tool or bundled with our Libero IDE.
o Memec (Unique)
On April 7, 2003, the Memec Design and Unique Memec divisions of The Memec Group, a global semiconductor distributor, introduced the Actel Automotive Development Kit. The Kit was created and customized by Unique Memec, a leading global semiconductor distributor, and Memec Design, Memec's global design and engineering division, for use with Actel's SX-A automotive devices. Memec Design and Unique Memec engineers collaborated to meet Actel's requirements by enhancing an Actel FPGA-based development board with a controller area network (CAN) transceiver and a CAN core.
o Synplicity
On August 4, 2003, Synplicity, a leading supplier of FPGA software for the design and verification of semiconductors, announced that it had enhanced its FPGA synthesis software, Synplify, to provide optimized support for Actel's FPGAs. The Synplify 7.3 software with added support for the ProASIC Plus family was included within Actel's Libero IDE v5.0, aiding in the design and development of Actel's FPGA families. According to Synplicity, customers using the enhanced Synplify software could increase the performance of their flash-based ProASIC Plus devices while efficiently optimizing the device for increased area utilization. For customers requiring additional circuit performance, the Libero IDE also featured an expanded interface to Synplicity's Synplify Pro software, which contained additional support for ProASIC Plus devices.
Research and Development
In 2003, we spent $39.6 million on research and development, which represented 26.4% of net revenues. Our efforts to develop of new products based on existing or emerging technologies include circuit design, software development, and process technology activities. In the areas of circuit design and process technology, our research and development activities also involve continuing efforts to reduce the cost and improve the performance of current products, including "shrinks" of the design rules under which such products are manufactured. Our software research and development activities include enhancing the functionality, usability, and availability of high-level CAE tools and IP cores in a complete and automated desktop design environment on popular PC and workstation platforms.
Competition
The FPGA market is highly competitive, and we expect that to increase as the market grows. Our competitors include suppliers of standard TTLs and custom-designed ASICs, including conventional gate arrays and standard cells, simple PLDs, CPLDs, and FPGAs. Of these, we compete principally with suppliers of hard-wired ASICs, CPLDs, and FPGAs.
The primary advantages of hard-wired ASICs are high capacity, high density, high speed, and low cost in production volumes. These advantages are offset by long design cycles and high designs costs, including mask set and nonrecurring engineering (NRE) charges. We compete with hard-wired ASIC suppliers by offering lower design costs (including low or no NREs), shorter design cycles, and reduced inventory risks. Some customers elect to design and prototype with our products and then convert to hard-wired ASICs to achieve lower costs for volume production. For this reason, we also face competition from companies that specialize in converting CPLDs and FPGAs, including our products, into hard-wired ASICs.
We also compete with suppliers of CPLDs. Suppliers of these devices include Altera Corporation (Altera), which purchased the PLD business of Intel Corporation in 1994; Lattice Semiconductor Corporation (Lattice), which purchased the CPLD businesses of Vantis Corporation in 1999; and Xilinx, Inc. (Xilinx). The circuit architecture of CPLDs may give them a performance advantage in certain lower capacity applications, although we believe that FPGAs compete favorably with CPLDs. However, Lattice and particularly Altera are larger than us, offer broader product lines to more extensive customer bases, and have significantly greater financial, technical, sales, and other resources. In addition, many newer CPLDs are reprogrammable, which permits customers to reuse a circuit multiple times during the design process. While our flash FPGAs are reprogrammable, antifuse FPGAs are one-time programmable, permanently retaining their programmed configuration.
We compete most directly with established FPGA suppliers, such as Xilinx, Altera, and Lattice, which purchased the FPGA business of Agere Systems, Inc. in 2002. We announced our intention to develop SRAM-based FPGA products in 1996 and abandoned the development in 1999. While we believe our products and technologies are superior to those of Xilinx (as well as Altera and Lattice) in many applications requiring greater internal speed, lower cost, nonvolatility, lower power, and/or greater security, Xilinx is significantly larger than us, offers a broader product line to a more extensive customer base, and has substantially greater financial, technical, sales, and other resources. In addition, the FPGAs of Xilinx, Altera, and Lattice are reprogrammable. While our flash FPGAs are reprogrammable, antifuse FPGAs are one-time programmable.
Several companies have marketed antifuse-based FPGAs, including QuickLogic Corporation (QuickLogic). In 1995, we acquired the antifuse FPGA business of TI, which was the only second-source supplier of our products. Xilinx, which is a licensee of certain of our patents, introduced antifuse-based FPGAs in 1995 and abandoned its antifuse FPGA business in 1996. Cypress Semiconductor Corporation, which was a licensed second source of QuickLogic, sold its antifuse FPGA business to QuickLogic in 1997. We believe that we compete favorably with QuickLogic, which is also a licensee of certain of our patents.
To date, we are the only supplier of flash-based FPGAs. In 1998, we entered into a strategic alliance with GateField under which we acquired the exclusive right to market and sell standard ProASIC products in process geometries of 0.35-micron and less. In 1999, we introduced the flash-based ProASIC family of FGPAs. In 2000, we acquired GateField in a merger.
We believe that important competitive factors in our market are price; performance; capacity (total number of usable gates); density (concentration of usable gates); ease of use and functionality of development tools; installed base of development tools; reprogrammability; strength of sales organization and channels; power consumption; reliability; security; adaptability of products to specific applications and IP; ease, speed, cost, and consistency of programming; length of research and development cycle (including migration to finer process geometries); number of I/Os; reliability; wafer fabrication and assembly capacity; availability of packages, adapters, sockets, programmers, and IP; technical service and support; and utilization of intellectual property laws. Our failure to compete successfully in any of these areas could have a materially adverse effect on our business, financial condition, or results of operations.
Patents and Licenses
As of February 9, 2004, we had 233 United States patents and applications pending for an additional 77 United States patents. We also had 65 foreign patents and applications pending for 41 patents outside the United States. Our patents cover, among other things, circuit architectures, antifuse and flash structures, and programming methods. We expect to continue filing patent applications as appropriate to protect our proprietary technologies. We believe that patents, along with such factors as innovation, technological expertise, and experienced personnel, will become increasingly important.
In connection with the settlement of patent litigation in 1993, we entered into a Patent Cross License Agreement with Xilinx (Xilinx Agreement), under which Xilinx was granted a license under certain of our patents that permits Xilinx to make and sell antifuse-based PLDs, and we were granted a license under certain Xilinx patents to make and sell SRAM-based PLDs. Xilinx introduced antifuse-based FPGAs in 1995 and abandoned its antifuse FPGA business in 1996. We announced our intention to develop SRAM-based FPGA products in 1996 and abandoned the development in 1999.
In 1995, we entered into a License Agreement with BTR, Inc. (BTR) pursuant to which BTR licensed its proprietary technology to us for development and use in FPGAs and certain multichip modules. As partial consideration for the grant of the license, we pay to BTR non-refundable advance royalties.
In connection with the settlement of patent litigation in 1998, we entered into a Patent Cross License Agreement with QuickLogic that protects the products of both companies that were first offered for sale on or before September 4, 2000, or are future generations of such products.
As is typical in the semiconductor industry, we have been and expect to be notified from time to time of claims that we may be infringing patents owned by others. During 2003, we held discussions regarding potential patent infringement issues with several third parties. When probable and reasonably estimable, we have made provision for the estimated settlement costs of claims for alleged infringement. As we sometimes have in the past, we may obtain licenses under patents that we are alleged to infringe. While we believe that reasonable resolution will occur, there can be no assurance that these claims will be resolved or that the resolution of these claims will not have a materially adverse effect on our business, financial condition, or results of operations. In addition, our evaluation of the impact of these pending disputes could change based upon new information learned by us. Subject to the foregoing, we do not believe that the resolution of any pending patent dispute is likely to have a materially adverse effect on our business, financial condition, or results of operations.
Employees
At the end of 2003, we had 543 full-time employees, including 149 in marketing, sales, and customer support; 200 in R&D; 156 in operations; and 38 in administration and finance. This compares with 538 full-time employees at the end of 2002, an increase of 1%. Net revenues were approximately $276,000 per employee for 2003 compared with approximately $250,000 for 2002. This represents an increase of 10%. We have no employees represented by a labor union, have not experienced any work stoppages, and believe that our employee relations are satisfactory.
Risk Factors
Our shareholders and prospective investors should carefully consider, along with the other information in this Annual Report on Form 10-K, the following:
o Our future revenues and operating results are likely to fluctuate and may fail to meet expectations, which could cause our stock price to decline.
Our quarterly revenues and operating results are subject to fluctuations resulting from general economic conditions and a variety of risks specific to us or characteristic of the semiconductor industry, including booking and shipment uncertainties, supply problems, and price erosion. These and other factors make it difficult for us to accurately project quarterly revenues and operating results, which may fail to meet our expectations. Any failure to meet expectations could cause our stock price to decline significantly.
o A variety of booking and shipping uncertainties may cause us to fall short of our quarterly revenue expectations.
When we fall short of our quarterly revenue expectations, our operating results are likely to be adversely affected because most of our expenses are fixed and therefore do not vary with revenues.
o We derive a large percentage of our quarterly revenues from bookings received during the quarter, making quarterly revenues difficult to predict.
Our backlog (which generally may be cancelled or deferred by customers on short notice without significant penalty) at the beginning of a quarter typically accounts for about half of our revenues during the quarter. This means that we generate about half of our quarterly revenues from orders received during the quarter and "turned" for shipment within the quarter, and that any shortfall in "turns" orders will have an immediate and adverse impact on quarterly revenues. There are many factors that can cause a shortfall in turns orders, including declines in general economic conditions or the businesses of our customers, excess inventory in the channel, or conversion of our products to hard-wired ASICs or other competing products for price or other reasons.
o We derive a significant percentage of our quarterly revenues from shipments made in the final weeks of the quarter, making quarterly revenues difficult to predict.
Historically, we shipped a disproportionately large percentage of our quarterly revenues in the final weeks of the quarter, which makes it difficult to accurately project quarterly revenues. Any failure to effect scheduled shipments by the end of a quarter would have an immediate and adverse impact on quarterly revenues.
o Our military and aerospace shipments tend to be large and are subject to complex scheduling uncertainties, making quarterly revenues difficult to predict.
Orders from the military and aerospace customers tend to be large and irregular, which contributes to fluctuations in our net revenues and gross margins. These sales are also subject to more extensive governmental regulations, including greater import and export restrictions. Historically, it has been difficult to predict if and when export licenses will be granted, if required. In addition, products for military and aerospace applications require processing and testing that is more lengthy and stringent than for commercial applications, which increases the complexity of scheduling and forecasting as well as the risk of failure. It is often impossible to determine before the end of processing and testing whether products intended for military or aerospace applications will fail and, if they do fail, it is generally not possible for replacements to be processed and tested in time for shipment during the same quarter. All of these factors make it difficult to accurately estimate quarterly revenues.
o We derive a majority of our quarterly revenues from products resold by our distributors, making quarterly revenues difficult to predict.
We typically generate more than half of our quarterly revenues from sales made through distributors. Since we do not recognize revenue on the sale of a product to a distributor until the distributor resells the product, our quarterly revenues are dependent on, and subject to fluctuations in, shipments by our distributors. We are also highly dependent on the timeliness and accuracy of our resale reports from our distributors. Late or inaccurate resale reports, particularly in the last month of the quarter, contribute to our difficulty in predicting and reporting our quarterly revenues and results of operations.
o An unanticipated shortage of products available for sale may cause us to fall short of expected quarterly revenues and operating results.
In a typical semiconductor manufacturing process, silicon wafers produced by a foundry are sorted and cut into individual die, which are then assembled into individual packages and tested. The manufacture, assembly, and testing of semiconductor products is highly complex and subject to a wide variety of risks, including defects in masks, impurities in the materials used, contaminants in the environment, and performance failures by personnel and equipment. Semiconductor products intended for military and aerospace applications and new products, such as our ProASIC Plus and Axcelerator FPGA families, are often more complex and/or more difficult to produce, increasing the risk of manufacturing-related defects. In addition, we may not discover defects or other errors in new products until after we have commenced volume production. Our failure to effect scheduled shipments by the end of a quarter due to unexpected supply constraints would have an immediate and adverse impact on quarterly revenues.
o Unanticipated increases, or the failure to achieve anticipated reductions, in the cost of our products may cause us to fall short of expected quarterly operating results.
As is also common in the semiconductor industry, our independent wafer suppliers from time to time experience lower than anticipated yields of usable die. Wafer yields can decline without warning and may take substantial time to analyze and correct, particularly for a company like us that does not operate our own manufacturing facility, but instead utilizes independent facilities, almost all of which are offshore. Yield problems are most common on new processes or at new foundries, particularly when new technologies are involved. Our FPGAs are also manufactured using customized processing steps, which may increase the incidence of production yield problems as well as the amount of time needed to achieve satisfactory, sustainable wafer yields on new processes and new products. Lower than expected yields of usable die could reduce our gross margin, which would adversely affect our quarterly operating results. In addition, in order to win designs, we generally must price new products on the assumption that manufacturing cost reductions will be achieved, which often do not occur as soon as expected. The failure to achieve expected manufacturing cost reductions could reduce our gross margin, which would adversely affect our quarterly operating results.
o Unanticipated reductions in the average selling prices of our products may cause us to fall short of expected quarterly revenues and operating results.
The semiconductor industry is characterized by intense price competition. The average selling price of a product typically declines significantly between introduction and maturity. We sometimes are required by competitive pressures to reduce the prices of our new products more quickly than cost reductions can be achieved. We also sometimes approve price reductions on specific sales for strategic or other reasons. Declines in the average selling prices of our products will reduce quarterly revenues unless offset by greater unit sales or a shift in the mix of products sold toward higher-priced products. Declines in the average selling prices of our products will also reduce quarterly gross margin unless offset by reductions in manufacturing costs or by a shift in the mix of products sold toward higher-margin products.
o In preparing our financial statements, we make good faith estimates and judgments that may change or turn out to be erroneous.
In preparing our financial statements in conformity with accounting principles generally accepted in the United States, we must make estimates and judgments that affect the reported amounts of assets, liabilities, revenues, and expenses and the related disclosure of contingent assets and liabilities. The most difficult estimates and subjective judgments that we make concern inventories, impairment of investments in other companies, intangible assets and goodwill, income taxes, and legal matters. We base our estimates on historical experience and on various other assumptions that we believe to be reasonable under the circumstances, the results of which form the basis for making judgments about the carrying values of assets and liabilities that are not readily apparent from other sources. Actual results may differ materially from these estimates. In addition, if these estimates or their related assumptions change in the future, our operating results for the periods in which we revise our estimates or assumptions could be adversely and perhaps materially affected.
o Our gross margin may decline as we increasingly compete with hard-wired ASICs and serve the value-based market.
The price we can charge for our products is constrained principally by our competition. While it has always been intense, we believe that price competition for new designs is increasing. This may be due in part to the transition toward high-level design methodologies. Designers can now wait until later in the design process before selecting a PLD or hard-wired ASIC and it is easier to convert between competing PLDs or between PLDs and hard-wired ASICs. The increased price competition may also be due in part to the increasing penetration of PLDs into price-sensitive markets previously dominated by hard-wired ASICs. We have strategically targeted many of our products at the value-based marked, which is defined by low prices. If our strategy is successful, low-price products will constitute increasingly greater percentages of our net revenues, which may make it more difficult to maintain our gross margin at our historic levels. Any long-term decline in our gross margin would have an adverse effect on our operating results.
o We may not win sufficient designs, or the designs we win may not generate sufficient revenues, for us to maintain or expand our business.
In order for us to sell an FPGA to a customer, the customer must incorporate our FPGA into the customer's product in the design phase. We devote substantial resources, which we may not recover through product sales, to persuade potential customers to incorporate our FPGAs into new or updated products and to support their design efforts (including, among other things, providing development systems). These efforts usually precede by many months (and often a year or more) the generation of FPGA sales, if any. The value of any design win, moreover, depends in large part upon the ultimate success of our customer's product in its market. Our failure to win sufficient designs, or the failure of the designs we win to generate sufficient revenues, could have a materially adverse effect on our business, financial condition, or results of operations.
o Ongoing investigations regarding the reliability of our RTSX-S space-qualified FPGAs could have a material adverse effect on our financial results and business in both the short and long term.
Our RTSX-S family was designed specifically to address heavy ion-induced single-event upsets in space. First shipped in 2001, the family accounted for approximately 15% of our net revenues for 2003 and 2002. Some of the potential risks associated with ongoing investigations regarding the reliability of our RTSX-S space-qualified FPGAs are discussed below.
o Background
During 2003, several U.S. government contractors reported a small percentage of functional failures in our RTSX-S and SX-A antifuse devices manufactured on a 0.25 micron antifuse process at one of the foundries we use.
o Actel Failure Analyses
Four of the U.S. government contractors reporting functional failures submitted their devices to us for failure analysis. Our failure analyses concluded that each of the submitted devices had been damaged by electrical overstress.
o Other Actel Experiments and Conclusions to Date
In addition to the failure analyses, we have conducted numerous experiments to (among other things) characterize the susceptibility of programmed 0.25-micron antifuses to electrical overstress and determine if we can detect and screen-out 0.25-micron antifuse devices that are particularly susceptible to electrical overstress. The experiments are ongoing, but to date we have:
observed electrical overstress damage only in 0.25-micron antifuse RTSX-S and SX-A FPGAs that we believe were subjected to voltages outside of our published datasheet specifications; and
concluded that a small percentage of our 0.25-micron antifuse RTSX-S and SX-A FPGAs are particularly susceptible to electrical overstress damage when exposed to voltages outside of our published datasheet specifications.
o Industry Group and Tiger Team
An ad-hoc industry group lead by The Aerospace Corporation (Aerospace) was established to examine the electrical overstress problem. The industry group formed a "Tiger Team" to develop and analyze experimental data, characterize antifuse electrical overstress damage, and identify the root cause of electrical overstress damage.
o Aerospace Closure Plan
On February 13, 2004, Aerospace presented to the industry group a Closure Plan consisting of 12 projects to resolve the electrical overstress issue (Closure Plan). Of the 12 proposed Closure Plan projects, six would be performed by Aerospace, four by us, and two by other Tiger Team members. One key project is an experiment by us to determine the rate (if any) at which 0.25-micron antifuse devices fail when they are not exposed to voltages outside of our published datasheet limits. Our failure rate measurement experiment will be performed on at least 800 RTSX-S FPGAs and is scheduled to be completed in August 2004. Data from the Closure Plan projects will be shared with the industry group as soon as it is available.
o A recall of our 0.25-micron antifuse FPGAs could have a materially 	 adverse effect on our revenues and operating results.
We think there is only a slight chance that we will determine, as a result of conducting the experiments proposed by Aerospace as part of its Closure Plan, that our RTSX-S devices experience antifuse damage when operated within the maximum voltage limitation set forth in our published datasheet specifications, and that the failure rate exceeds the range specified in the Aerospace Closure Plan. However, if we were to make those determinations, we may recall our RTSX-S FPGAs, and possibly some of our 0.25-micron SX-A FPGAs. In any recall, we would try to replace the recalled parts. If we were unable to replace the recalled parts with acceptable parts, we would offer refunds to our customers for the recalled parts and, in addition, would be unable to fill new orders for these parts. This would have a materially adverse effect on our revenues and operating results.
o While the Actel and Aerospace investigations are continuing, our customers may defer placing new orders, defer the shipment of existing orders, or cancel existing orders.
The electrical overstress problem has caused more anxiety among some members of the industry group than others. While most members have continued to order parts from us, some are behaving more cautiously. To whatever extent our customers take a "wait-and-see" attitude while the Actel and Aerospace investigations are continuing, our revenues and operating results could be adversely affected. Some customers may also explore alternatives, which might cause us to lose existing or future orders irrespective of any conclusions reached by Actel or Aerospace regarding the root cause of the electrical overstress problem.
o The electrical overstress problem may harm our reputation in the industry, which could have a long-term materially adverse affect on our business.
The questions raised by the electrical overstress problem concerning the reliability of our space-grade RTSX-S devices may undermine our reputation in an industry to which we have been a major supplier. To whatever extent our customers have doubts about the reliability of our parts, they may seek to use other suppliers, which could be harmful to our business over time.
o We may be unsuccessful in defining, developing, or selling competitive new or improved products at acceptable margins.
The market for our products is characterized by rapid technological change, product obsolescence, and price erosion, making the timely introduction of new or improved products critical to our success. Our failure to design, develop, and sell new or improved products that satisfy customer needs, compete effectively, and generate acceptable margins may adversely affect our business, financial condition, and results of operations. While most of our product development programs have achieved a level of success, some have not. For example:
We announced our intention to develop SRAM-based FPGA products in 1996 and abandoned the development in 1999 principally because the product would no longer have been competitive.
We introduced our VariCore embeddable reprogrammable gate array (EPGA) logic core based on SRAM technology in 2001. Revenues from VariCore EPGAs did not materialize and the development of a more advanced VariCore EPGA has been cancelled. In this case, a market that we believed would develop did not emerge.
In 2001, we also launched our BridgeFPGA initiative to address the I/O problems created within the high-speed communications market by the proliferation of interface standards. The adoption of these interface standards has created the need for designers to implement bridging functions to connect incompatible interface standards. We introduced Axcelerator, a high-speed antifuse FPGA with dedicated high-speed I/O circuits that can support multiple interface standards, in 2002. However, the development of subsequent BridgeFPGA products, which were expected to include embedded high-speed interface protocol controllers, was postponed in 2002. This was due principally to the prolonged downturn in the high-speed communications market. The development was cancelled in 2003 principally because the subsequent BridgeFPGA products would no longer have been competitive.
o Numerous factors can cause the development or introduction of new products to fail or be delayed.
To develop and introduce a product, we must successfully accomplish all of the following:
anticipate future customer demand and the technology that will be available to meet the demand;
define the product and its architecture, including the technology, silicon, programmer, IP, software, and packaging specifications;
obtain access to advanced manufacturing process technologies;
design and verify the silicon;
develop and release evaluation software;
lay out the architecture and implement programming;
tape out the product;
generate a mask of the product and evaluate the software;
manufacture the product at the foundry;
verify the product; and
qualify the process, characterize the product, and release production software.
Each of these steps is difficult and subject to failure or delay. In addition, the failure or delay of any step can cause the failure or delay of the entire development and introduction. We can offer you no assurance that our development and introduction schedules for new products or the supporting software or hardware will be met, that new products will gain market acceptance, or that we will respond effectively to new technological changes or new product announcements by others. Any failure to successfully define, develop, market, manufacture, assemble, test, or program competitive new products could have a materially adverse effect on our business, financial condition, and results of operations.
o New products are subject to greater operational risks.
Our future success is highly dependent upon the timely development and introduction of competitive new products at acceptable margins. However, there are greater operational risks associated with new products. The inability of our wafer suppliers to produce advanced products; delays in commencing or maintaining volume shipments of new products; the discovery of product, process, software, or programming defects or failures; and any related product returns could each have a materially adverse effect on our business, financial condition, or results of operation.
o New products are subject to greater technology risks.
As is common in the semiconductor industry, we have experienced from time to time in the past, and expect to experience in the future, difficulties and delays in achieving satisfactory, sustainable yields on new products. The fabrication of antifuse and flash wafers is a complex process that requires a high degree of technical skill, state-of-the-art equipment, and effective cooperation between us and the foundry to produce acceptable yields. Minute impurities, errors in any step of the fabrication process, defects in the masks used to print circuits on a wafer, and other factors can cause a substantial percentage of wafers to be rejected or numerous die on each wafer to be non-functional. Yield problems increase the cost of as well as time it takes us to bring our new products to market, which can create inventory shortages and dissatisfied customers. Any prolonged inability to obtain adequate yields or deliveries of new products could have a materially adverse effect on our business, financial condition, or results of operations.
o New products generally have lower gross margins.
Our gross margin is the difference between the cost of our products and the revenues we receive from the sale of our products. One of the most important variables affecting the cost of our products is manufacturing yields. With our customized antifuse and flash manufacturing process requirements, we almost invariably experience difficulties and delays in achieving satisfactory, sustainable yields on new products. Until satisfactory yields are achieved, gross margins on new products are generally lower than on mature products. Depending upon the rate at which sales of new products ramp and the extent to which they displace mature products, the lower gross margins typically associated with new products could have a materially adverse effect on our operating results.
o We face intense competition and have some competitive disadvantages that we may not be able to overcome.
The semiconductor industry is intensely competitive. Our competitors include suppliers of hard-wired ASICs, CPLDs, and FPGAs. Our direct competitors are Xilinx, a supplier of SRAM-based FPGAs; Altera, a supplier of CPLDs and SRAM-based FPGAs; Lattice, a supplier of CPLDs and SRAM-based FPGAs; and QuickLogic, a supplier of antifuse-based FPGAs. We also face competition from companies that specialize in converting our products into hard-wired ASICs. In addition, we may face competition from suppliers of logic products based on new or emerging technologies. While we seek to monitor developments in existing and emerging technologies, our technologies may not remain competitive.
o Most of our current and potential competitors are larger and have more resources.
Many of our current competitors have broader product lines, more extensive customer bases, and significantly greater financial, technical, manufacturing, and marketing resources than us. Additional competition is possible from major domestic and international semiconductor suppliers. All such companies are larger and have broader product lines, more extensive customer bases, and substantially greater financial and other resources than us, including the capability to manufacture their own wafers. We may not be able to overcome these competitive disadvantages.
o Our antifuse technology is not reprogrammable, which is a competitive disadvantage in most cases.
All existing FPGAs not based on antifuse technology and certain CPLDs are reprogrammable. The one-time programmability of our antifuse FPGAs is necessary or desirable in some applications, but logic designers generally prefer to prototype with a reprogrammable logic device. This is because the designer can reuse the device if an error is made. The visibility associated with discarding a one-time programmable device often causes designers to select a reprogrammable device even when an alternative one-time programmable device offers significant advantages. This bias in favor of designing with reprogrammable logic devices appears to increase as the size of the design increases. Although we now offer reprogrammable flash devices, we may not be able to overcome this competitive disadvantage.
o Our flash and antifuse technologies are not manufactured on standard processes, which is a competitive disadvantage.
Our antifuse-based FPGAs and (to a lesser extent) flash-based ProASIC FPGAs are manufactured using customized steps that are added to otherwise standard manufacturing processes of independent wafer suppliers. There is considerably less operating history for the customized process steps than for the foundries' standard manufacturing processes. Our dependence on customized processing steps means that, in contrast with competitors using standard manufacturing processes, we generally have more difficulty establishing relationships with independent wafer manufacturers; take longer to qualify a new wafer manufacturer; take longer to achieve satisfactory, sustainable wafer yields on new processes; may experience a higher incidence of production yield problems; must pay more for wafers; and will not obtain early access to the most advanced processes. Any of these factors could be a material disadvantage against competitors using standard manufacturing processes. As a result of these factors, our products typically have been fabricated using processes one or two generations behind the processes used by competing products. As a consequence, we generally have not fully realized the benefits of our technologies. Although we are attempting to accelerate the rate at which our products are reduced to finer process geometries and obtain earlier access to advanced processes, we may not be able to overcome these competitive disadvantages.
o Our business and operations may be disrupted by events that are beyond our control or the control of our business partners.
Our performance is subject to events or conditions beyond our control, and the performance of each of our foundries, suppliers, subcontractors, distributors, agents, and customers is subject to events or conditions beyond their control. These events or conditions include labor disputes, acts of public enemies or terrorists, war or other military conflicts, blockades, insurrections, riots, epidemics, quarantine restrictions, landslides, lightning, earthquakes, fires, storms, floods, washouts, arrests, civil disturbances, restraints by or actions of governmental bodies acting in a sovereign capacity (including export or security restrictions on information, material, personnel, equipment, or otherwise), breakdowns of plant or machinery, and inability to obtain transport or supplies. This type of disruption could impair our ability to ship products in a timely manner, which may have a materially adverse effect on our business, financial condition, and results of operations.
Our corporate offices are located in California, which was subject to power outages and shortages during 2001 and 2002. More extensive power shortages in the state could disrupt our operations and interrupt our research and development activities. Our foundry partners in Japan and Taiwan and our operations in California are located in areas that have been seismically active in the recent past. In addition, many of the countries outside of the United States in which our foundry partners and assembly and other subcontractors are located have unpredictable and potentially volatile economic, social, or political conditions, including the risks of conflict between Taiwan and the People's Republic of China or between North Korea and South Korea. In addition, an outbreak of Severe Acute Respiratory Syndrome (SARS) occurred in Hong Kong, Singapore, and China in 2003. The occurrence of these or similar events or circumstances could disrupt our operations and may have a materially adverse effect on our business, financial condition, and results of operations.
o Our business depends on numerous independent third parties whose interests may diverge from our interests.
We rely heavily on, but generally have little control over, our independent foundries, suppliers, subcontractors, and distributors.
o Our independent wafer manufacturers may be unable or unwilling to satisfy our needs in a timely manner, which could harm our business.
We do not manufacture any of the semiconductor wafers used in the production of our FPGAs. Our wafers are currently manufactured by Chartered in Singapore, Infineon in Germany, MEC in Japan, UMC in Taiwan, and Winbond in Taiwan. Our reliance on independent wafer manufacturers to fabricate our wafers involves significant risks, including lack of control over capacity allocation, delivery schedules, the resolution of technical difficulties limiting production or reducing yields, and the development of new processes. Although we have supply agreements with several of our wafer manufacturers, a shortage of raw materials or production capacity could lead any of our wafer suppliers to allocate available capacity to other customers, or to internal uses, which could impair our ability to meet our product delivery obligations and may have a materially adverse effect on our business, financial condition, and results of operations.
o Our limited volume and customized process requirements generally make us less attractive to independent wafer manufacturers.
The semiconductor industry has from time to time experienced shortages of manufacturing capacity, and may again be entering a period in which capacity is constrained. When production capacity is tight, the relatively small amount of wafers that we purchase from any foundry and the customized process steps that are necessary for our technologies put us at a disadvantage to foundry customers who purchase more wafers manufactured on standard processes. To secure an adequate supply of wafers, we may consider various transactions, including the use of substantial nonrefundable deposits, contractual purchase commitments, equity investments, or the formation of joint ventures. Any of these transactions may have a materially adverse effect on our business, financial condition, and results of operations.
o Identifying and qualifying new independent wafer manufacturers is difficult and might be unsuccessful.
If our current independent wafer manufacturers were unable or unwilling to manufacture our products as required, we would have to identify and qualify additional foundries. No additional wafer foundries may be able or available to satisfy our requirements on a timely basis. Even if we are able to identify a new third party manufacturer, the costs associated with manufacturing our products may increase. In any event, the qualification process typically takes one year or longer, which could cause product shipment delays, and qualification may not be successful.
o Our independent assembly subcontractors may be unable or unwilling to meet our requirements, which could delay product shipments and result in the loss of customers or revenues.
We rely primarily on foreign subcontractors for the assembly and packaging of our products and, to a lesser extent, for testing of our finished products. Our reliance on independent subcontractors involves certain risks, including lack of control over capacity allocation and delivery schedules. We generally rely on one or two subcontractors to provide particular services and have from time to time experienced difficulties with the timeliness and quality of product deliveries. We have no long-term contracts with our subcontractors and certain of those subcontractors sometimes operate at or near full capacity. Any significant disruption in supplies from, or degradation in the quality of components or services supplied by, our subcontractors could have a materially adverse effect on our business, financial condition, and results of operations.
o Our independent software and hardware developers and suppliers may be unable or unwilling to satisfy our needs in a timely manner, which could impair the introduction of new products or the support of existing products.
We are dependent on independent software and hardware developers for the development, supply, maintenance, and support of some of our IP cores, development systems, programming hardware, design diagnostics and debugging tool kits, demonstration boards, and ASIC conversion products (or certain elements of those products). Our reliance on independent software and hardware developers involves certain risks, including lack of control over delivery schedules and customer support. Any failure of or significant delay by our independent developers to complete software and/or hardware under development in a timely manner could disrupt the release of our software and/or the introduction of our new FPGAs, which might be detrimental to the capability of our new products to win designs. Any failure of or significant delay by our independent suppliers to provide updates or customer support could disrupt our ability to ship products or provide customer support services, which might result in the loss of revenues or customers. Any of these disruptions could have a materially adverse effect on our business, financial condition, or results of operations.
o Our future performance will depend in part on the effectiveness of our independent distributors in marketing, selling, and supporting our products.
In 2003, sales made through distributors accounted for 69% of our net revenues. Our distributors offer products of several different companies, so they may reduce their efforts to sell our products or give higher priority to other products. A reduction in sales effort, termination of relationship, failure to pay for products ordered from us, or discontinuance of operations because of financial difficulties or for other reasons by one or more of our current distributors could have a materially adverse effect on our business, financial condition, and results of operations.
o Distributor contracts generally can be terminated on short notice.
Although we have contracts with our distributors, the agreements are terminable by either party on short notice. On March 1, 2003, we consolidated our distribution channel by terminating our agreement with Pioneer, which accounted for 26% of our net revenues in 2002. We also consolidated our distribution channel in 2001 by terminating our agreement with Arrow, which accounted for 13% of our net revenues in 2001. Unique, which accounted for 41% of our net revenues in 2003, has been our sole distributor in North America since March 1, 2003. The loss of Unique as a distributor could have a materially adverse effect on our business, financial condition, or results of operations.
o Fluctuations in inventory levels at our distributors can affect our operating results.
Our distributors have occasionally built inventories in anticipation of significant growth in sales and, when such growth did not occur as rapidly as anticipated, substantially reduced the amount of product ordered from us in subsequent quarters. Such a slowdown in orders generally reduces our gross margin on future sales of newer products because we are unable to take advantage of any manufacturing cost reductions while the distributor depletes its inventory at lower average selling prices.
o We are subject to all of the risks and uncertainties associated with the conduct of international business.
o We depend on international operations for almost all of our products.
We purchase almost all of our wafers from foreign foundries and have almost all of our commercial products assembled, packaged, and tested by subcontractors located outside the United States. These activities are subject to the uncertainties associated with international business operations, including trade barriers and other restrictions, changes in trade policies, governmental regulations, currency exchange fluctuations, reduced protection for intellectual property, war and other military activities, terrorism, changes in social, political, or economic conditions, and other disruptions or delays in production or shipments, any of which could have a materially adverse effect on our business, financial condition, or results of operations.
o We depend on international sales for a substantial portion of our revenues.
Sales to customers outside North America accounted for 39% of net revenues in 2003, and we expect that international sales will continue to represent a significant portion of our total revenues. International sales are subject to the risks described above as well as generally longer payment cycles, greater difficulty collecting accounts receivable, and currency restrictions. We also maintain foreign sales offices to support our international customers, distributors, and sales representatives, which are subject to local regulation.
In addition, international sales are subject to the export laws and regulations of the United States and other countries. The Strom Thurmond National Defense Authorization Act for 1999 required, among other things, that communications satellites and related items (including components) be controlled on the U.S. Munitions List. The effect of the Act was to transfer jurisdiction over commercial communications satellites from the Department of Commerce to the Department of State and to expand the scope of export licensing applicable to commercial satellites. The need to obtain additional export licenses has caused significant delays in the shipment of some of our FPGAs. Any future restrictions or charges imposed by the United States or any other country on our international sales could have a materially adverse effect on our business, financial condition, or results of operations.
o Our revenues and operating results have been and may again be adversely affected by downturns or other changes in the general economy, in the semiconductor industry, in our major markets, or at our major customers.
We have experienced substantial period-to-period fluctuations in revenues and results of operations due to conditions in the overall economy, in the general semiconductor industry, in our major markets, or at our major customers. We may again experience these fluctuations, which could be adverse and may be severe.
o Our revenues and operating results may be adversely affected by future downturns in the semiconductor industry.
The semiconductor industry historically has been cyclical and periodically subject to significant economic downturns, which are characterized by diminished product demand, accelerated price erosion, and overcapacity. Beginning in the fourth quarter of 2000, we experienced (and the semiconductor industry in general experienced) reduced bookings and backlog cancellations due to excess inventories at communications, computer, and consumer equipment manufacturers and a general softening in the overall economy. During this downturn, which was severe and prolonged, we experienced lower revenues, which had a substantial negative effect on our results of operations. Any future downturns in the semiconductor industry may likewise have an adverse effect on our revenues and results of operations.
o Our revenues and operating results may be adversely affected by future downturns in the communications market.
We estimate that sales of our products to customers in the communications market accounted for 26% of our net revenues for 2003 and 25% for 2002, compared with 49% for 2001 and 56% for 2000. Like the semiconductor industry in general, the communications market has been cyclical and periodically subject to significant downturns. Beginning with the fourth quarter of 2000, the communications market suffered its worst downturn in recent history. As a result, we experienced reduced revenues and results of operations. Any future downturns in the communications market may likewise have an adverse effect on our revenues and results of operations.
o Our revenues and operating results may be adversely affected by future downturns in the military and aerospace market.
We estimate that sales of our products to customers in the military and aerospace industries, which carry higher overall gross margins than sales of products to other customers, accounted for 36% of our net revenues for 2003, compared with 41% for 2002 and 26% for 2001. In general, we believe that the military and aerospace industries have accounted for a significantly greater percentage of our net revenues since the introduction of our Rad Hard FPGAs in 1996 and our Rad Tolerant FPGAs in 1998. Any future downturn in the military and aerospace market may have an adverse effect on our revenues and results of operations.
o Our revenues and operating results may be adversely affected by changes in the military and aerospace market.
In 1994, Secretary of Defense William Perry directed the Department of Defense to avoid government-unique requirements when making purchases and rely more on the commercial marketplace. Under the "Perry initiative," the Department of Defense must strive to increase access to commercial state-of-the-art technology and facilitate the adoption by its suppliers of business processes characteristic of world-class suppliers. Integration of commercial and military development and manufacturing facilitates the development of "dual-use" processes and products and contributes to an expanded industrial base that is capable of meeting defense needs at lower costs. To that end, many of the cost-driving specifications that had been part of military procurements for many years were cancelled in the interest of buying best-available commercial products. We believe that this trend toward the use of commercial off-the-shelf products has on balance helped our business. However, if this trend continued to the point where defense contractors customarily purchased commercial-grade parts rather than military-grade parts, the revenues and gross margins that we derive from sales to customers in the military and aerospace industries would erode, which could have a materially adverse effect on our business, financial condition, and results of operations. On the other hand, there are some signs that this trend toward the use of commercial off-the-shelf products is reversing. If defense contractors were to begin using more customized ASICs and fewer commercial off-the-shelf products, the revenues and gross margins that we derive from sales to customers in the military and aerospace industries may erode, which could have a materially adverse effect on our business, financial condition, and results of operations.
o Our revenues and operating results may be adversely affected by future downturns at any our major customers.
A relatively small number of customers are responsible for a significant portion our net revenues. Lockheed Martin accounted for 11% of our net revenues during 2003, compared with 3% during 2002 and 2001. We have experienced periods in which sales to our major customers declined as a percentage of our net revenues due to push-outs or cancellations of orders, or delays or failures to place expected orders. For example, Nortel accounted for 11% of our net revenues in 2000, compared with 2% in 2001. We believe that sales to a limited number of customers will continue to account for a substantial portion of net revenues in future periods. The loss of a major customer, or decreases or delays in shipments to major customers, could have a materially adverse effect on our business, financial condition, and results of operations.
o Any acquisition we make may harm our business, financial condition, or operating results.
We have a mixed history of success in our acquisitions. For example:
In 1999, we acquired AutoGate Logic, Inc. (AGL) for consideration valued at $7.2 million. We acquired AGL for technology used in the unsuccessful development of an SRAM-based FPGA.
In 2000, we acquired Prosys Technology, Inc. (Prosys) for consideration valued at $26.2 million. We acquired Prosys for technology used in our VariCore EPGA logic core, which was introduced in 2001 but for which no market emerged.
Also in 2000, we completed our acquisition of GateField for consideration valued at $45.7 million. We acquired GateField for its flash technology and ProASIC FPGA family. We introduced the next-generation ProASIC Plus product family in 2002 and are currently the only company offering nonvolatile, reprogrammable FPGAs.
In pursuing our business strategy, we may acquire other products, technologies, or businesses from third parties. Identifying and negotiating these acquisitions may divert substantial management time away from our operations. An acquisition could absorb substantial cash resources, require us to incur or assume debt obligations, and/or involve the issuance of additional our equity securities. The issuance of additional equity securities may dilute, and could represent an interest senior to the rights of, the holders of our Common Stock. An acquisition could involve significant write-offs (possibility resulting in a loss for the fiscal year(s) in which taken) and would require the amortization of any identifiable intangibles over a number of years, which would adversely affect earnings in those years. Any acquisition would require attention from our management to integrate the acquired entity into our operations, may require us to develop expertise outside our existing business, and could result in departures of management from either us or the acquired entity. An acquired entity may have unknown liabilities, and our business may not achieve the results anticipated at the time it is acquired by us. The occurrence of any of these circumstances could disrupt our operations and may have a materially adverse effect on our business, financial condition, or results of operations.
o We may face significant business and financial risk from claims of intellectual property infringement asserted against us, and we may be unable to adequately enforce our intellectual property rights.
As is typical in the semiconductor industry, we are notified from time to time of claims that we may be infringing patents owned by others. During 2003, we held discussions regarding potential patent infringement issues with several third parties. As we sometimes have in the past and did during 2003, we may obtain licenses under patents that we are alleged to infringe. Although patent holders commonly offer licenses to alleged infringers, no assurance can be given that licenses will be offered or that we will find the terms of any offered licenses acceptable. We cannot assure you that any claim of infringement will be resolved or that the resolution of any claims will not have a materially adverse effect on our business, financial condition, or results of operations.
Our failure to obtain a license for technology allegedly used by us could result in litigation. In addition, we have agreed to defend our customers from and indemnify them against claims that our products infringe the patent or other intellectual rights of third parties. All litigation, whether or not determined in favor of us, can result in significant expense and divert the efforts of our technical and management personnel. In the event of an adverse ruling in any litigation involving intellectual property, we could suffer significant (and possibly treble) monetary damages, which could have a materially adverse effect on our business, financial condition, or results of operations. We may also be required to discontinue the use of infringing processes; cease the manufacture, use, and sale or licensing of infringing products; expend significant resources to develop non-infringing technology; or obtain licenses under patents that we are infringing. In the event of a successful claim against us, our failure to develop or license a substitute technology on commercially reasonable terms could also have a materially adverse effect on our business, financial condition, and results of operations.
We have devoted significant resources to research and development and believe that the intellectual property derived from such research and development is a valuable asset important to the success of our business. We rely primarily on patent, trademark, and copyright laws combined with nondisclosure agreements and other contractual provisions to protect our proprietary rights. We cannot assure you that the steps we have taken will be adequate to protect our proprietary rights. In addition, the laws of certain territories in which our products are developed, manufactured, or sold, including Asia and Europe, may not protect our products and intellectual property rights to the same extent as the laws of the United States. Our failure to enforce our patents, trademarks, or copyrights or to protect our trade secrets could have a materially adverse effect on our business, financial condition, or results of operations.
o We may be unable to retain or attract the personnel necessary to successfully operate, manage, or grow our business.
Our success is dependent in large part on the continued service of our key managerial, engineering, marketing, sales, and support employees. Particularly important are highly skilled design, process, software, and test engineers involved in the manufacture of existing products and the development of new products and processes. The loss of our key employees could have a materially adverse effect on our business, financial condition, or results of operations. In the past we have experienced growth in the number of our employees and the scope of our operations, resulting in increased responsibilities for management personnel. To manage future growth effectively, we will need to attract, hire, train, motivate, manage, and retain a growing number of employees. During strong business cycles, we expect to experience difficulty in filling our needs for qualified engineers and other personnel. Any failure to attract and retain qualified employees, or to manage our growth effectively, could delay product development and introductions or otherwise have a materially adverse effect on our business, financial condition, or results of operations.
o We have some arrangements that may not be neutral toward a potential change of control and our Board of Directors could adopt others.
We have adopted an Employee Retention Plan that provides for payment of a benefit to our employees who hold unvested stock options in the event of a change of control. Payment is contingent upon the employee remaining employed for six months after the change of control (unless the employee is terminated without cause during the six months). Each of our executive officers has also entered into a Management Continuity Agreement, which provides for the acceleration of stock options unvested at the time of a change of control in the event the executive officer's employment is actually or constructively terminated other than for cause following the change of control. While these arrangements are intended to make executive officers and other employees neutral towards a potential change of control, they could have the effect of biasing some or all executive officers or employees in favor of a change of control.
Our Articles of Incorporation authorize the issuance of up to 5,000,000 shares of "blank check" Preferred Stock with designations, rights, and preferences determined by our Board of Directors. Accordingly, our Board is empowered, without approval by holders of our Common Stock, to issue Preferred Stock with dividend, liquidation, redemption, conversion, voting, or other rights that could adversely affect the voting power or other rights of the holders of our Common Stock. Issuance of Preferred Stock could be used to discourage, delay, or prevent a change in control. In addition, issuance of Preferred Stock could adversely affect the market price of our Common Stock.
On October 17, 2003, we announced that our Board of Directors adopted a Shareholder Rights Plan. Under the Plan, we issued a dividend of one right for each share of Common Stock held by shareholders of record as of the close of business on November 10, 2003. The provisions of the Plan can be triggered only in certain limited circumstances following the tenth day after a person or group announces acquisitions of, or tender offers for, 15% or more of our Common Stock. The Shareholder Rights Plan is designed to guard against partial tender offers and other coercive tactics to gain control of Actel without offering a fair and adequate price and terms to all shareholders. Nevertheless, the Plan could make it more difficult for a third party to acquire us, even if our shareholders support the acquisition.
o Our stock price may decline significantly, possibly for reasons unrelated to our operating performance.
The stock markets broadly, technology companies generally, and our Common Stock in particular have experienced extreme price and volume volatility in recent years. Our Common Stock may continue to fluctuate substantially on the basis of many factors, including:
quarterly fluctuations in our financial results or the financial results of our competitors or other semiconductor companies;
changes in the expectations of analysts regarding our financial results or the financial results of our competitors or other semiconductor companies;
announcements of new products or technical innovations by us or by our competitors; and
general conditions in the semiconductor industry, financial markets, or economy.
ITEM 2.
ITEM 2. PROPERTIES
In 2003, we relocated our worldwide headquarters to a larger facility to better accommodate our existing employees and position ourselves for future growth. Our principal facilities and executive offices are located in Mountain View, California, in two buildings that comprise approximately 158,000 square feet. These buildings are leased through June 2013. We have a renewal option for an additional ten-year term.
We also lease sales offices in the vicinity of Atlanta, Boston, Chicago, Dallas, Denver, Hong Kong, London, Los Angeles, Milan, Minneapolis/St. Paul, Munich, New York, Orlando, Paris, Ottawa (Ontario), Philadelphia, Raleigh, Seattle, Seoul, Taipei, Tokyo, and Washington D.C., as well as the facilities of the Design Services Group in Mt. Arlington, New Jersey. We believe our facilities will be adequate for our needs in 2004.
ITEM 3.
ITEM 3. LEGAL PROCEEDINGS
There are no pending legal proceedings of a material nature to which we are a party or of which any of our property is the subject. We know of no legal proceeding contemplated by any governmental authority.
ITEM 4.
ITEM 4. SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS
No matters were submitted to a vote of security holders during the fourth quarter of the fiscal year covered by this report.
PART II
ITEM 5.
ITEM 5. MARKET FOR THE REGISTRANT'S COMMON STOCK AND RELATED SHAREHOLDER MATTERS
Our Common Stock has been traded on the Nasdaq National Market under the symbol "ACTL" since our initial public offering on August 2, 1993. On February 16, 2004, there were 150 shareholders of record. Since many shareholders have their shares held of record in the names of their brokerage firms, we estimate the actual number of shareholders to be about 9,000. The following table sets forth, for the fiscal years and quarters indicated, the high and low sale prices per share of our Common Stock as reported on the Nasdaq National Market.
On March 12, 2004, the reported last sale of our Common Stock on the Nasdaq National Market was $22.00.
We have never declared or paid a cash dividend on our Common Stock and do not anticipate paying any cash dividends in the foreseeable future. Any future declaration of dividends is within the discretion of our Board of Directors and will be dependent on our earnings, financial condition, and capital requirements as well as any other factors deemed relevant by our Board of Directors.
ITEM 6.
ITEM 6. SELECTED FINANCIAL DATA
ACTEL CORPORATION
SELECTED CONSOLIDATED FINANCIAL DATA (in thousands, except per share data)
ACTEL CORPORATION
SELECTED CONSOLIDATED FINANCIAL DATA (Continued) (in thousands)
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(1) Beginning in 2002, we ceased to amortize goodwill in accordance with Statement of Financial Accounting Standards (SFAS) No. 142, "Goodwill and Other Intangible Assets." Instead, goodwill is subject to annual impairment tests and written down only when identified as impaired. Non-goodwill intangible assets with definite lives continue to be amortized under SFAS No. 141 and 142. See Notes 1 and 2 of Notes to Consolidated Financial Statements for further information.
(2) During the second quarter of 1999, we completed a restructuring plan that resulted in a reduction in force along with the elimination of certain projects and non-critical activities.
(3) The 2000 expenses represent charges for in-process research and development arising from our acquisitions of Prosys Technology, Inc. ($5.6 million) and GateField Corporation (GateField) ($5.0 million). The 1999 expense represents a charge for in-process research and development incurred in the fourth quarter of 1999 in connection with our acquisition of AutoGate Logic, Inc.
(4) During 2002, we realized losses on sales and write downs of our strategic equity investments. See Note 3 of Notes to Consolidated Financial Statements for further information.
(5) During the second quarter of 2000, we sold all of our shares of Chartered Semiconductor Manufacturing Ltd. common stock for proceeds of $39.0 million, resulting in a one-time gain of $28.3 million.
(6) Represents our equity share of net losses of GateField in accordance with the equity method of accounting prior to our acquisition of GateField, which was completed on November 15, 2000.
ITEM 7.
ITEM 7. MANAGEMENT'S DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND RESULTS OF OPERATIONS
Overview
The purpose of this overview is to provide context for the discussion and analysis of our financial statements that follows by briefly summarizing the most important known trends and uncertainties, as well as the key performance indicators, on which our executives are primarily focused for both the short and long term.
We design, develop, and market field programmable gate arrays (FPGAs) and supporting products and services. FPGAs are integrated circuits (ICs) that adapt the processing and memory capabilities of electronic systems to specific applications. FPGAs are used by designers of communications, computer, consumer, industrial, military and aerospace, and other electronic systems to differentiate their products and get them to market faster. We are the leading supplier of FPGAs based on flash and antifuse technologies.
o Semiconductors
According to the Semiconductor Industry Association (SIA), worldwide sales of semiconductors rose to $166 billion in 2003, up 18% from $141 billion in 2002. However, the industry reached its peak of $204 billion in 2000 before falling 32% to $139 billion in 2001. Thus, the semiconductor industry (which has always been cyclical) appears to have resumed a pattern of growth after a setback of historic proportions. It is possible, though, that the industry has matured to the point where it will no longer be able to achieve the long-term growth rates it has experienced in the past.
o Logic
According to SIA, worldwide sales of digital logic ICs were $24 billion in 2002, of which application specific ICs (ASICs) accounted for $9 billion. ASICs include conventional gate arrays, standard cells, and programmable logic devices (PLDs). As they have gotten faster and cheaper over the last decade, PLDs have gained a sizeable share of the ASIC market. We believe that this long-term trend will continue because customers are willing to forego some of the price and performance advantages of "hard-wired" ASICs in order to obtain the "time to market" as well as the design and manufacturing flexibility benefits of PLDs.
o PLDs
PLDs include simple PLDs, complex PLDs (CPLDs), and FPGAs. FPGAs have gained share in the PLD market because they generally offer greater capacity, lower total cost per usable logic gate, and lower power consumption than simple PLDs and CPLDs. We believe that this long-term trend will continue. Our three larger competitors, Xilinx Corporation (Xilinx), Altera Corporation (Altera), and Lattice Semiconductor Corporation (Lattice), offer CPLDs as well as FPGAs.
o Strategy
As the fourth biggest vendor in our market, we do not believe that we can compete across the board, but must choose technologies and markets in which to differentiate ourselves. Our strategy involves considerable risk. Unique technologies and products can take years to develop, if at all, and markets that we target may fail to emerge. We have in fact sometimes faltered in these areas. Still, we believe that our strategic positioning is the best it has ever been in our history.
o Technologies
Our flash and antifuse technologies are non-volatile, so they retain their circuit configuration even in the absence of power. In contrast to the SRAM and other memory technologies used by our larger competitors, our FPGAs don't need a separate boot device, are "live at power up," generally require less power, and offer practically unbreakable design security.
o Antifuse
The one-time programmability of our antifuse FPGAs is desirable in certain military and aerospace applications, but commercial customers generally prefer to use reprogrammable FPGAs, and FPGAs based on all other types of technologies are reprogrammable. In addition, we are the only sizeable company that uses antifuse technology, which means that we bear the entire burden of developing and proving antifuse processes (including yields and reliability) and products (including switching elements and architectures). It also means that our FGPAs using antifuse technology are one or more generations behind the FPGAs of our competitors using SRAM and other technologies manufactured on standard processes.
o Flash
We believe that our long-term future lies with flash technology, which permits us to make FPGAs that are both non-volatile and reprogrammable. While our flash technology is unique, the process is very similar to the standard flash memory process, so we will be able to share with others most of the burden of developing and proving the process. Since flash technology has trailed SRAM technology by about half a generation, our flash FPGAs are still the better part of one generation behind the SRAM FPGAs of our competitors.
o Markets
The inherent advantages of our non-volatile technologies give us a big advantage with some groups of customers, but are of little or no value to others.
o Value-Based
We think that this market, which is all about cost, will grow the most and is the best fit for our technologies. Xilinx and Altera are also aggressively offering low-priced products, so we might not gain share even in this segment of the FPGA market, but we're optimistic because we think these customers most value the advantages of our technologies. Selling more low-price products may make it more difficult to maintain our gross margins, although we think it can be done.
o High-Reliability
We believe that we are the world's leading supplier of military, avionics, and space-grade FPGAs, but we are seeing increased competition from Xilinx and Aeroflex Incorporated. This is a market in which the customers are extremely conscientious and demand the very highest levels of quality and reliability. To that end, we have conducted analysis of and experiments on the reliability of our RTSX-S space-qualified FPGAs for the last six months at the behest of an ad-hoc industry group, and we anticipate that those investigations will continue for at least several more months. See the Risk Factors set forth at the end of Part I of this Annual Report on Form 10-K for more information.
o High-Speed
Speed has historically been a strength of our antifuse technology, but the high-speed FPGA market is dominated by telecommunications and the SRAM technology offered by our larger competitors is a better fit for many of these applications. Yet our technologies are a better fit than SRAM in certain subsets of this very large market, so we continue to believe that we can develop and maintain a business in this area based on our differentiation.
o Key Indicators
Although we measure the condition and performance of our business in numerous ways, the key quantitative indicators that we generally use to manage the business are bookings, design wins, margins, yields, and backlog. We also carefully monitor the progress of our product development efforts. Of these, we think that bookings and backlog are the best indicators of short-term performance and that designs wins and product development progress are the best indicators of long-term performance. Our bookings (measured as end-customer orders placed on us and our distributors) were higher during 2003 than during 2002, and our backlog was higher at the end of 2003 than at the end of 2002. Our design wins were higher in 2003 than in 2002, with most of the growth coming in flash. Our product development progress was mixed.
Results of Operations
The following table sets forth certain financial data from the Consolidated Statements of Operations expressed as a percentage of net revenues:
Our fiscal year ends on the first Sunday after December 30. Fiscal 2003 ended on January 4, 2004; fiscal 2002 ended on January 5, 2003; and fiscal 2001 ended on January 6, 2002. Fiscal 2001 was a 53 week fiscal year, rather than a normal 52 week fiscal year. For ease of presentation, December 31 has been indicated as the year end for all fiscal years.
o Net Revenues
We derive our revenues primarily from the sale of FPGAs, which accounted for 96% of net revenues in 2003, 2002, and 2001. Non-FPGA revenues are derived from our Protocol Design Services organization, royalties, and the licensing of software and sale of hardware used to design and program our FPGAs. We believe that we derived more than 60% of our revenues in 2003, 2002, and 2001 from sales of FPGAs to customers serving the military and aerospace and the communications markets. We have experienced, and may again in the future experience, substantial period-to-period fluctuations in operating results due to conditions in each of these markets as well as in the general economy.
Net revenues in 2003 were $149.9 million, a 12% increase over 2002. This increase was due primarily to a 15% increase in the number of FPGA units shipped, which was partially offset by a 3% decrease in the overall average selling price (ASP) of FPGAs. The increase in unit shipments was broad-based, with increases in both our new and mature groups of product families. The new product group includes our ProASIC Plus, ProASIC, RTSX-S, SX-A, eX, and ASIC conversion product families. The overall ASP declined principally because we derived a lower percentage of our revenues from FPGA shipments to our military and aerospace customers, which we estimate accounted for 36% of our revenues in 2003 compared with 41% in 2002. FPGAs shipped to military and aerospace customers tend to be higher cost to produce, on average, and have higher ASPs than FPGAs shipped to our other customers.
Net revenues in 2002 were 8% less than in 2001. This decline was due primarily to an 8% decrease in the overall ASP of FPGAs. The overall ASP declined principally because we derived a higher percentage of our revenues from FPGA shipments to customers serving the consumer/e-appliance and computing markets, which we estimate accounted for 17% of net revenues in 2002 compared with 6% in 2001. FPGAs shipped to customers serving the consumer/e-appliance and computing markets tend to have lower ASPs.
We shipped approximately 69% of our net revenues through the distribution sales channel in 2003, compared with 65% in 2002 and 68% in 2001. Our North American distributors during 2003 were Unique Technologies, Inc. (Unique) and Pioneer-Standard Electronics, Inc. (Pioneer). On March 1, 2003, we consolidated our distribution channel by terminating our agreement with Pioneer, leaving Unique as our sole distributor in North America. We also consolidated our distribution channel during 2001, when we terminated our agreement with Arrow Electronics, Inc. (Arrow). The following table sets forth the percentage of revenues derived from each customer that accounted for 10% or more of our net revenues in any of the last three years:
We do not recognize revenue on product shipped to a distributor until the distributor resells the product to its customer.
Sales to customers outside the United States accounted for 39% of net revenues in 2003, 38% in 2002, and 38% in 2001. The largest portion of export sales was to European customers, which accounted for 25% of net revenues in 2003, 23% in 2002, and 28% in 2001.
o Gross Margin
Gross margin was 60% of revenues in 2003 compared with 61% in 2002 and 57% in 2001. Gross margin was favorably impacted in 2003 by the sell through of $4.1 million of inventory that was reserved in previous periods, a benefit of 2.7% to gross margin, and in 2002 by the sell through of $3.2 million of inventory, a benefit of 2.4% to gross margin. Gross margin was lower in 2001 than in 2003 and 2002 primarily because of higher than normal inventory write-offs that resulted from higher inventory levels coupled with lower forecasted customer demand.
We seek to reduce costs by improving wafer yields, negotiating price reductions with suppliers, increasing the level and efficiency of our testing and packaging operations, achieving economies of scale by means of higher production levels, and increasing the number of die produced per wafer, principally by shrinking the die size of our products. No assurance can be given that these efforts will be successful. Our capability to shrink the die size of our FPGAs is dependent on the availability of more advanced manufacturing processes. Due to the custom steps involved in manufacturing antifuse and (to a lesser extent) flash FPGAs, we typically obtain access to new manufacturing processes later than our competitors using standard manufacturing processes.
o Research and Development (R&D)
R&D expenditures were $39.6 million, or 26% of net revenues, in 2003 compared with $39.3 million, or 29% of net revenues, in 2002 and $38.2 million, or 26% of net revenues, in 2001. R&D expenditures have experienced slight annual increases over each of the past three years as a result of our efforts to concurrently research and develop future generations of flash- and antifuse-based product families as well as radiation tolerant versions of both flash and antifuse product families. As a percent of revenues, R&D expenditures were a lower percentage of revenues in 2003 than in 2002 due to the 12% increase in revenues in 2003 combined with our efforts to hold spending as flat as possible while still achieving our R&D goals.
Our R&D consists of circuit design, software development, and process technology activities. We believe that continued substantial investment in R&D is critical to maintaining a strong technological position in the industry. Since our antifuse and flash FPGAs are manufactured using customized processes, our R&D expenditures will probably always be higher as a percentage of net revenues than that of our major competitors using standard manufacturing processes.
o Selling, General, and Administrative (SG&A)
SG&A expenses in 2003 were $44.7 million, or 30% of net revenues, compared with $43.0 million, or 32% of net revenues in 2002 and $41.5 million, or 28% of net revenues, in 2001. SG&A expenses in 2003 increased by $1.7 million compared with 2002 primarily as a result of higher sales bonuses associated with increased net revenues. SG&A was favorably impacted by a $0.6 million reduction in accruals for estimated legal liabilities in the third quarter of 2003. SG&A expenses in 2002 increased by 4% compared with 2001 primarily due to an increase in SG&A headcount during 2002 and the full effect of additional headcount added over the course of the year in 2001. The introduction and rollout of our ProASIC Plus and Axcelerator product families in 2002 also increased our sales and marketing costs. These increases in 2002 were partially offset by lower selling expenses (primarily sales bonuses and outside sales commissions) associated with the 8% decrease in net revenues for 2002 compared with 2001.
o Amortization of Goodwill and Other Acquisition-Related Intangibles
Amortization of goodwill and other acquisition-related intangibles was $2.7 million in both 2003 and 2002, compared with $14.8 million in 2001. The reduction of amortization from 2001 to 2002 and 2003 was due to the implementation of Statement of Financial Accounting Standards (SFAS) No. 142, "Goodwill and Other Intangible Assets," at the beginning of fiscal 2002, which eliminated the amortization of goodwill. See Notes 1 and 2 of Notes to Consolidated Financial Statements for further information regarding the impact of SFAS No. 142. In 2001, the portion of the amortization expense that related to goodwill was $11.7 million.
o Interest Income and Other, Net of Expense
Interest income and other, net of expense, was $3.2 million in 2003, $5.5 million in 2002, and $7.3 million in 2001. The decrease in interest and other income experienced in both 2003 and 2002 compared with preceding years was primarily a result of lower interest rates available in the market and lower gains realized on our short-term investments, which were partially offset by higher cash balances. For 2003, our average investment portfolio return on investment was 2.5% compared with 4.7% in 2002 and 5.3% in 2001. Our average investment portfolio balance was $135.0 million in 2003 compared with $121.5 million in 2002 and $126.3 million in 2001. We invest excess liquidity in investment portfolios consisting primarily of corporate bonds, floating rate notes, and federal and municipal obligations. In periods where market interest rates are falling, and for some time after rates stabilize, we typically experience declines in interest income and other as our older debt investments at higher interest rates mature and are replaced by new investments at the lower rates available in the market.
o Losses on Sales and Write-Downs of Equity Investments
We occasionally make equity investments in public or private companies for the promotion of business and strategic objectives. During 2002, we realized losses and recorded impairment write-downs totaling $3.7 million in connection with our strategic equity investments, which consisted of $1.6 million related to an equity investment in a publicly traded company and $2.1 million related to an equity investment in a private company. The $1.6 million of losses related to the investment in a publicly traded company was comprised of $0.7 million of realized losses on shares sold during the first and second quarters of 2002 and $0.9 million of impairment write-downs recorded in the second and fourth quarters of 2002. These impairment write-downs were recorded as a result of declines in the market value of shares still held by us. The $2.1 million loss related to the equity investment in a private company consisted entirely of an impairment write-down that was recorded when the estimated fair value of the private company was determined to be below its carrying value after the private company received new financing in the fourth quarter of 2002 at a per share price significantly less than our initial investment. We sold all of our remaining strategic equity investment in a publicly traded company in 2003, realizing a gain of $0.1 million from the sale. As of December 31, 2003, we had $0.1 million of strategic equity investments remaining on the balance sheet.
o Tax (Benefit)/Provision
Significant components affecting the effective tax rate include pre-tax net income or loss, federal R&D tax credits, income from tax-exempt securities, the state composite tax rate, and recognition of certain deferred tax assets subject to valuation allowances. Our tax provision for 2003 was $0.3 million, which represents an effective tax rate of 5% for the year. Our $1.9 million tax benefit for 2002 was based on the combined effects of a pre-tax loss and R&D tax credits. Excluding the effect of non-deductible goodwill amortization, our effective tax rate was 8.9% for 2001. The exclusion of non-deductible goodwill amortization from tax calculations resulted in a net income for tax purposes and a net tax expense for 2001.
Financial Condition, Liquidity, and Capital Resources
Our total assets were $316.8 million at the end of 2003 compared with $293.3 million at the end of 2002. The increase in total assets was attributable principally to increases in cash, cash equivalents, and short-term investments. The following table sets forth certain financial data from the consolidated balance sheets expressed as a percentage change from December 31, 2002, to December 31, 2003:
o Cash, Cash Equivalents, and Short-Term Investments
Our cash, cash equivalents, and short-term investments were $158.4 million at the end of 2003 compared with $133.8 million at the end of 2002. This increase of $24.6 million from the end of 2002 was due primarily to $19.9 million of net cash provided by operating activities and $16.2 million from the issuance of Common Stock under employee stock plans. These increases were partially offset by $11.2 million of property and equipment purchases.
The significant components within operating activities that provided cash during 2003 included $12.4 million of net tax refunds received during the year and $16.5 million from the net results for the year adjusted for non-cash items ($10.2 million of which relates to depreciation and amortization). The significant components within operating activities that resulted in a reduction of cash from operations in 2003 included $4.1 million in cash used to increase inventories and a $3.9 million decrease in deferred income on shipments to distributors.
Spending on property and equipment amounted to $11.2 million in 2003, compared with $8.8 million in 2002 and $9.5 million in 2001. The increase in spending on property and equipment in 2003 related primarily to leasehold improvements on our new worldwide headquarters which we moved into in August of 2003. Our capital budget for 2004 is $21.4 million.
Cash from the issuance of Common Stock under employee stock plans amounted to $16.2 million in 2003, $9.4 million in 2002, and $7.7 million in 2001. The increase in employee stock plan activity that occurred in 2003 was mostly driven by the increase in the market price of our Common Stock, which had an average closing price per share of $21.95 in 2003, $18.25 in 2002, and $21.63 in 2001. Employee stock activity was especially heavy during the last six months of 2003, when the average closing price was $25.50 per share.
We meet all of our funding needs for ongoing operations with internally generated cash flows from operations and with existing cash and short-term investment balances. We believe that existing cash, cash equivalents, and short-term investments, together with cash generated from operations, will be sufficient to meet our cash requirements for 2004. A portion of available cash may be used for investment in or acquisition of complementary businesses, products, or technologies. Wafer manufacturers have at times demanded financial support from customers in the form of equity investments and advance purchase price deposits, which in some cases have been substantial. Should we require additional capacity, we may be required to incur significant expenditures to secure such capacity.
The following represents contractual commitments not accrued on the balance sheet associated with operating leases and royalty and licensing agreements as of December 31, 2003:
Purchase orders or contracts for the purchase of raw materials and other goods and services are not included in the table above. We are not able to determine the aggregate amount of such purchase orders that represent contractual obligations as purchase orders may represent authorizations to purchase rather than binding agreements. For the purposes of this table, contractual obligations for purchase of goods or services are defined as agreements that are enforceable and legally binding on us and that specify all significant terms, including: fixed or minimum quantities to be purchased; fixed, minimum or variable price provisions; and the approximate timing of the transaction. Our purchase orders are based on our current manufacturing needs and fulfilled by our vendors within short time horizons. We do not have significant agreements for the purchase of raw materials or other goods specifying minimum quantities or set prices that exceed our expected requirements for three months. We also enter into contracts for outsourced services; however, the obligations under these contracts were not significant and the contracts generally contain clauses allowing for cancellation without significant penalty.
We believe that the availability of adequate financial resources is a substantial competitive factor. To take advantage of opportunities as they arise, or to withstand adverse business conditions when they occur, it may become prudent or necessary for us to raise additional capital. No assurance can be given that additional capital would become available on acceptable terms if needed.
o Accounts Receivable
Our net accounts receivable was $20.5 million at the end of 2003 compared with $17.6 million at the end of 2002. This increase was due primarily to the 19% increase in revenues in the fourth quarter of 2003, compared with the fourth quarter of 2002. Revenue was $40.6 million in the fourth quarter of 2003 compared with $34.1 million in the fourth quarter of 2002. Net accounts receivable represented 44 days of sales outstanding (DSOs) at the end of both 2003 and 2002.
o Inventories
Our net inventories were $38.7 million at the end of 2003 compared with $34.6 million at the end of 2002. The growth in inventory was primarily the result of last time inventory purchases from two wafer manufacturers for some of our mature product families. Last time buys occur when a wafer supplier is about to shut down the manufacturing line used to make a product and current inventories are insufficient to meet foreseeable future demand. Inventory purchased in last time buy transactions will be evaluated on an ongoing basis for indications of excess or obsolescence based on rates of actual sell through, expected future demand for those products, and any other qualitative factors that may indicate the existence of excess or obsolete inventory. Inventory at December 31, 2003, included $5.4 million of inventory purchased under last time buy type purchases. Inventory days of supply decreased from 234 days at the end of 2002 to 230 days at the end of 2003 due to the higher cost of sales associated with increased revenues. Excluding the impact of inventory purchased under last time buy type purchases, inventory days of supply were 198 days at the end of 2003. Our FPGAs are manufactured using customized steps that are added to the standard manufacturing processes of our independent wafer suppliers, so our manufacturing cycle is generally longer and more difficult to adjust in response to changing demands or delivery schedules. Accordingly, our inventory model will probably always be higher than that of our major competitors using standard processes.
o Property and Equipment
Our net property and equipment was $19.9 million at the end of 2003, compared with $16.2 million at the end of 2002. We invested $11.2 million in property and equipment in 2003 compared with $8.8 million in 2002. The increase in capital expenditures was related primarily to $2.3 million of leasehold improvements at our new principal facilities and executive offices in Mountain View, California, which we relocated to in August 2003. Other capital expenditures during the past two years have been primarily for engineering, manufacturing, and office equipment. Depreciation of property and equipment was $7.5 million in 2003 compared with $7.3 million in 2002. Our capital budget for 2004 is $21.4 million.
o Goodwill
Our net goodwill was $32.1 million at the end of both 2003 and 2002. Goodwill is recorded when consideration paid in an acquisition exceeds the fair value of the net tangible and intangible assets acquired. At the beginning of 2002, we adopted SFAS No. 142, "Goodwill and Other Intangible Assets," which addresses the financial accounting and reporting standards for goodwill and other intangible assets subsequent to their acquisition. Following our adoption of SFAS No. 142, we no longer amortize goodwill, but instead test for impairment annually or more frequently if certain events or changes in circumstances indicate that the carrying value may not be recoverable. We completed our annual goodwill impairments tests during the fourth quarter of 2003, and noted no indicators of impairment.
o Other Assets
Our other assets were $24.7 million at the end of 2003 compared with $25.9 million at the end of 2002. The decrease was due primarily to $2.7 million amortization of identified intangible assets, which was partially offset by a $1.2 million increase in our non-current deferred tax asset that was the result of a reclassification between current and non-current deferred tax assets.
o Current Liabilities
Our total current liabilities were $48.9 million at the end of 2003 compared with $49.1 million at the end of 2002. The decrease was due in part to a reduction of $3.9 million in deferred income on shipments to distributors. During 2003, we consolidated our distribution channel, leaving Unique as our sole distributor in North America, which had the effect of reducing the amount of product being held in the distribution channel as a single distributor is more efficient in inventory management and does not need to hold as much inventory to meet customer demand as two or more distributors would. The decrease in deferred income on shipments to distributors was partially offset by an increase in income taxes payable of $2.7 million in 2003 as there were no income taxes payable in 2002.
o Shareholders' Equity
Shareholders' equity was $264.4 million at the end of 2003 compared with $242.3 million at the end of 2002. The increase included retained earnings from 2003 net income of $6.2 million and an increase to additional paid-in capital of $16.2 million from the sale of Common Stock under employee stock plans.
Impact of Recently Issued Accounting Standards
In May, 2003, the Financial Accounting Standards Board (FASB) issued SFAS No. 150, "Accounting for Certain Financial Instruments with Characteristics of both Liabilities and Equity." SFAS No. 150 requires certain financial instruments to be accounted for as liabilities that previously were accounted for as equity. The financial instruments affected include mandatory redeemable stock; certain financial instruments that require or may require the issuer to buy back some of its shares in exchange for cash or other assets; and certain obligations that can be settled with shares of stock. SFAS No. 150 is effective for all financial instruments entered into or modified after May 31, 2003, and otherwise is effective at the beginning of the first interim period beginning after June 15, 2003. We do not currently have any financial instruments that are subject to the provisions of SFAS No. 150, so the adoption of SFAS No. 150 had no impact on our consolidated financial position or results of operations.
In January 2003, the FASB issued Financial Standards Accounting Board Interpretation (FIN) No. 46 (FIN 46), "Consolidation of Variable Interest Entities," an interpretation of Accounting Research Bulletin (ARB) No. 51, "Consolidated Financial Statements." FIN 46, which amended the interpretation in December 2003, establishes accounting guidance for consolidation of a variable interest entity (VIE). FIN 46 requires an investor with a majority of the variable interests (primary beneficiary) in a variable interest entity (VIE) to consolidate the entity and also requires majority and significant variable interest investors to provide certain disclosures. A VIE is an entity in which the equity investors do not have a controlling interest or the equity investment at risk is insufficient to finance the entity's activities without receiving additional subordinated financial support from the other parties. Development-stage entities that have sufficient equity invested to finance the activities they are currently engaged in and entities that are businesses as defined in the Interpretation are not considered VIEs. The provisions of FIN 46 were effective immediately for all arrangements entered into with new VIEs created after January 31, 2003. We do not currently have any contractual relationship or other business relationship with a VIE, so the adoption of FIN 46 had no impact on our consolidated financial position or results of operations.
Critical Accounting Policies and Estimates
Our discussion and analysis of our financial condition and results of operations is based upon our consolidated financial statements, which have been prepared in accordance with accounting principles generally accepted in the United States (GAAP). The preparation of these financial statements requires us to make estimates and judgments that affect the reported amounts of assets, liabilities, revenues, and expenses and the related disclosure of contingent assets and liabilities. The U.S. Securities and Exchange Commission has defined the most critical accounting policies as those that are most important to the portrayal of our financial condition and results and also require us to make the most difficult and subjective judgments, often as a result of the need to make estimates of matters that are inherently uncertain. Based upon this definition, our most critical policies include inventories, intangible assets and goodwill, income taxes, and legal matters. These policies, as well as the estimates and judgments involved, are discussed below. We also have other key accounting policies that either do not generally require us to make estimates and judgments that are as difficult or as subjective or they are less likely to have a material impact on our reported results of operations for a given period. We base our estimates on historical experience and on various other assumptions that we believe to be reasonable under the circumstances, the results of which form the basis for making judgments about the carrying values of assets and liabilities that are not readily apparent from other sources. Actual results may differ materially from these estimates. In addition, if these estimates or their related assumptions change in the future, it could result in material expenses being recognized on the income statement.
o Inventories
We believe that a certain level of inventory must be carried to maintain an adequate supply of product for customers. This inventory level may vary based upon orders received from customers or internal forecasts of demand for these products. Other considerations in determining inventory levels include the stage of products in the product life cycle, design win activity, manufacturing lead times, customer demands, strategic relationships with foundries, and competitive situations in the marketplace. Should any of these factors develop other than anticipated, inventory levels may be materially and adversely affected.
We write down our inventory for estimated obsolescence or unmarketable inventory equal to the difference between the cost of inventory and the estimated realizable value based upon assumptions about future demand and market conditions. To address this difficult, subjective, and complex area of judgment, we apply a methodology that includes assumptions and estimates to arrive at the net realizable value. First, we identify any inventory that has been previously written down in prior periods. This inventory remains written down until sold, destroyed, or otherwise dispositioned. Second, our quality assurance personnel examine inventory line items that may have some form of obsolescence due to non-conformance with electrical and mechanical standards. Third, we assess the inventory not otherwise identified to be written down against product history and forecasted demand (typically for the next six months). Finally, we analyze the result of this methodology in light of the product life cycle, design win activity, and competitive situation in the marketplace to derive an outlook for consumption of the inventory and the appropriateness of the resulting inventory levels. If actual future demand or market conditions are less favorable than those we have projected, additional inventory write-downs may be required. During 2001, we had significant write-downs of inventory due to a sharp decrease in forecasted demand related to the general economic slowdown.
During 2003, we modified our inventory valuation policies to properly account for "last time buy" inventory purchases. Last time buys occur when a wafer supplier is about to shut down the manufacturing line used to make a product and current inventories are insufficient to meet foreseeable future demand. We made last time buys of certain products from our wafer suppliers in 2003. Since this inventory was not acquired to meet current demand, we did not believe the application of our existing inventory write down policy was appropriate, so a discrete write down policy was established for inventory purchased in last time buy transactions. As a consequence, these transactions and the related inventory are excluded from the standard excess and obsolescence write down policy. Inventory purchased in last time buy transactions will be evaluated on an ongoing basis for indications of excess or obsolescence based on rates of actual sell through; expected future demand for those products over a longer time horizon; and any other qualitative factors that may indicate the existence of excess or obsolete inventory. In the event that actual sell through does not meet expectations and estimations of expected future demand decrease, last time buy inventory could be written down in the future. Evaluations of last time buy inventory in 2003 did not result in any write downs.
o Intangible Assets and Goodwill
In past years we made business acquisitions that resulted in the recording of a significant amount of goodwill and identified intangible assets.
Historically and through the end of 2001, goodwill was amortized on a straight-line basis over its useful life. At the beginning of 2002, we adopted SFAS No. 142, "Goodwill and Other Intangible Assets," which addresses the financial accounting and reporting standards for goodwill and other intangible assets subsequent to their acquisition. In accordance with SFAS No. 142, we ceased to amortize goodwill and instead test for impairment annually or more frequently if certain events or changes in circumstances indicate that the carrying value may not be recoverable. We completed our annual goodwill impairment tests during the fourth quarter of 2003 and noted no impairment. The initial test of goodwill impairment requires us to compare our fair value with our book value, including goodwill. We are a single reporting unit as defined by SFAS 142 and use the entity wide approach to compare fair value to book value. Based on our total market capitalization, which we believe represents the best indicator of our fair value, we determined that our fair value was in excess of our book value. Since we found no indication of impairment, we did not proceed with step 2 of the annual impairment analysis.
At December 31, 2003, we had identified intangible assets arising from prior business acquisitions which are being amortized on a straight line basis over their estimated lives. In accordance with SFAS No. 144, "Accounting for the Impairment or Disposal of Long-Lived Assets," we recognize impairment losses on identified intangible assets when indicators of impairment are present and the undiscounted cash flows estimated to be generated by those assets are less than the net book value of those assets. The impairment loss is measured by comparing the fair value of the asset to its carrying value. Fair value is based on discounted cash flows using present value techniques identified in SFAS No. 144. We assessed our identified intangible assets for impairment in accordance with SFAS No. 144 as of December 31, 2003, and noted no impairment. If these estimates or their related assumptions change in the future, it could result in lower estimated future cash flows that may not support the current carrying value of these assets, which would require us to record impairment charges for these assets.
o Income Taxes
We account for income taxes in accordance with SFAS No. 109, "Accounting for Income Taxes," which requires that deferred tax assets and liabilities be recognized using enacted tax rates for the effect of temporary differences between the book and tax bases of recorded assets and liabilities. SFAS No. 109 also requires that deferred tax assets be reduced by a valuation allowance if it is more likely than not that some or all of the deferred tax assets will not be realized. We evaluate annually the realizability of our deferred tax assets by assessing our valuation allowance and, if necessary, we adjust the amount of such allowance. The factors used to assess the likelihood of realization include our forecast of future taxable income and available tax planning strategies that could be implemented to realize the net deferred tax assets.
o Legal Matters
As is typical in the semiconductor industry, we have been and expect to be notified from time to time of claims, including claims that we may be infringing patents owned by others. During 2003, we held settlement discussions with several third parties. When probable and reasonably estimable, we make provision for estimated liabilities. As we sometimes have in the past, we may settle disputes and/or obtain licenses under patents that we are alleged to infringe. During 2003, we settled a threatened patent infringement claim and obtained licenses under the patents that we were alleged to infringe. As a result of the settlement, we reduced our accruals for estimated legal liabilities by $0.6 million, which had a favorable impact on SG&A spending in the third quarter of 2003,. We can offer no assurance that any pending or threatened claim will be resolved or that the resolution of any such claims will not have a materially adverse effect on our business, financial condition, or results of operations. In addition, our evaluation of the impact of these pending and threatened claims could change based upon new information learned by us. Subject to the foregoing, we do not believe that the resolution of any pending or threatened legal claim is likely to have a materially adverse effect on our business, financial condition, or results of operations.
Risks
Our operating results are subject to general economic conditions and a variety of risks characteristic of the semiconductor industry or specific to us, including booking and shipment uncertainties, wafer supply fluctuations, and price erosion, any of which could cause our operating results to differ materially from past results. See the Risk Factors set forth at the end of Part I of this Annual Report on Form 10-K.
Quarterly Information
The table on the next page presents certain unaudited quarterly results for each of the eight quarters in the period ended December 31, 2003. In our opinion, this information has been presented on the same basis as the audited consolidated financial statements appearing elsewhere in this Annual Report on Form 10-K and all necessary adjustments (consisting only of normal recurring accruals) have been included in the amounts stated below to present fairly the unaudited quarterly results when read in conjunction with our audited consolidated financial statements and notes thereto. However, these quarterly operating results are not indicative of the results for any future period.
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(1) For the fourth quarter of 2002, we incurred a quarterly net loss and the inclusion of stock options in the shares used for computing diluted earnings per share would have been anti-dilutive and reduced the loss per share. Accordingly, all Common Stock equivalents (such as stock options) have been excluded from the shares used to calculate diluted earnings per share for that period.
(2) During the first, second, and fourth quarters of 2002, we realized losses on sales and write downs of our strategic equity investments amounting to $0.1 million in the first quarter, $1.0 million in the second quarter, and $2.6 million in the fourth quarter. See Note 3 of Notes to Consolidated Financial Statements for further information.
ITEM 7A.
ITEM 7A. QUANTITATIVE AND QUALITATIVE DISCLOSURES ABOUT MARKET RISK
As of December 31, 2003, our investment portfolio consisted primarily of corporate bonds, floating rate notes, and federal and municipal obligations. The principal objectives of our investment activities are to preserve principal, meet liquidity needs, and maximize yields. To meet these objectives, we invest excess liquidity only in high credit quality debt securities with average maturities of less than two years. We also limit the percentage of total investments that may be invested in any one issuer. Corporate investments as a group are also limited to a maximum percentage of our investment portfolio.
Our debt security investments, which totaled $144.8 million at December 31, 2003, are subject to interest rate risk. An increase in interest rates could subject us to a decline in the market value of our investments. These risks are mitigated by our ability to hold these investments to maturity. A hypothetical 100 basis point increase in interest rates compared with interest rates at December 31, 2003, and December 31, 2002, would result in a reduction of approximately $1.4 million in the fair value of our available-for-sale debt securities held at December 31, 2003, and $1.1 million in the fair value of our available-for-sale debt securities held at December 31, 2002
The potential changes noted above are based upon sensitivity analyses performed on our financial position and expected operating levels at December 31, 2003. Actual results may differ materially.
ITEM 8.
ITEM 8. FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA
ACTEL CORPORATION
CONSOLIDATED BALANCE SHEETS (in thousands, except share and per share amounts)
See Notes to Consolidated Financial Statements
ACTEL CORPORATION
CONSOLIDATED STATEMENTS OF OPERATIONS (in thousands, except per share amounts)
See Notes to Consolidated Financial Statements
ACTEL CORPORATION
See Notes to Consolidated Financial Statements
ACTEL CORPORATION
See Notes to Consolidated Financial Statements
ACTEL CORPORATION
CONSOLIDATED STATEMENTS OF CASH FLOWS (in thousands)
See Notes to Consolidated Financial Statements
ACTEL CORPORATION
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS
1. Organization and Summary of Significant Accounting Policies
Actel Corporation (Actel or us, we, or our) was incorporated under the laws of California on October 16, 1985. We design, develop, and market field programmable gate arrays (FPGAs) and supporting products and services. Net revenues from the sale of FPGAs accounted for 96% of our net revenues in 2003, 2002, and 2001. Our Protocol Design Services organization accounted for 1% of our net revenues in 2003, 2002, and 2001. Royalties and the licensing of software and sale of hardware that are used to design and program FPGAs accounted for 3% of our net revenues in 2003, 2002, and 2001.
FPGAs are integrated circuits that adapt the processing and memory capabilities of electronic systems to specific applications. FPGAs are used by designers of communications, computer, consumer, industrial, military and aerospace, and other electronic systems to differentiate their products and get them to market faster. We are the leading supplier of FPGAs based on flash and antifuse technologies. See Note 9 for information on our sales by geographic area.
o Advertising and Promotion Costs
Our policy is to expense advertising and promotion costs as they are incurred. Our advertising and promotion expenses were approximately $3.3 million in 2003, $3.7 million in 2002, and $3.8 million in 2001.
o Basis of Presentation
The consolidated financial statements include the accounts of Actel Corporation and our wholly owned subsidiaries. We use the U.S. Dollar as the functional currency in our foreign operations. All significant intercompany accounts and transactions have been eliminated in consolidation.
Our fiscal year ends on the first Sunday after December 30. Fiscal 2003 ended on January 4, 2004; fiscal 2002 ended on January 5, 2003; and fiscal 2001 ended on January 6, 2002. Fiscal 2001 was a 53 week fiscal year, rather than the normal 52 week fiscal year. For ease of presentation, December 31 has been indicated as the year end for all fiscal years.
o Cash Equivalents and Investments
For financial statement purposes, we consider all highly liquid debt instruments with insignificant interest rate risk and a maturity of three months or less when purchased to be cash equivalents. Cash equivalents consist primarily of cash deposits in money market funds that are available for withdrawal without restriction. Short-term investments consist principally of corporate, federal, state, and local municipal obligations. See Note 3 for further information regarding short-term investments.
We account for our investments in accordance with the provisions of Statement of Financial Accounting Standards (SFAS) No. 115, "Accounting for Certain Investments in Debt and Equity Securities." We determine the appropriate classification of debt securities at the time of purchase and re-evaluate such designation as of each balance sheet date. At December 31, 2003, all debt securities are designated as available-for-sale. We also make equity investments for the promotion of business and strategic objectives. We monitor our equity investments for impairment on a periodic basis. In the event that the carrying value of the equity investment exceeds its fair value and the decline in value is determined to be other than temporary, the carrying value is reduced to its current fair market value. Non-marketable equity investments valued at $0.1 million are included in other assets. See Note 3 for further information regarding investments.
Available-for-sale securities are carried at fair value, with the unrealized gains and losses reported as a component of comprehensive income in shareholders' equity. The amortized cost of debt securities in this category is adjusted for amortization of premiums and accretion of discounts to maturity. Such amortization and accretion is included in interest and other income, net of expense. The cost of securities sold is based on the specific identification method. Interest and dividends on securities classified as available-for-sale are included in interest income and other.
In accordance with SFAS No. 115, if a decline in value below cost is determined to be other than temporary, the unrealized losses will be recorded as expense on the income statement in the period when that determination is made. In the absence of other overriding factors, we consider a decline in market value to be other than temporary when a publicly traded stock has traded below book value for a consecutive six-month period. If an investment continues to trade below book value for more than six months, and mitigating factors such as general economic and industry specific trends are not present, this investment would be evaluated for impairment and written down to a balance equal to the estimated fair value at the time of impairment, with the amount of the write-down realized as expense on the income statement. During 2002, we held an investment in a publicly traded company that had traded below book value. Based on our assessment of industry trends, as well as the volatility and trading volumes of this equity security, we concluded that the declines in value at the end of the second and fourth quarters of 2002 were other than temporary. Accordingly, we recorded as expense, in accordance with SFAS No. 115, impairment write-downs of $0.5 million in the second quarter and $0.4 million in the fourth quarter. At December 31, 2002, we held an investment in the publicly-traded equity security with a market value of $0.2 million in short-term investments. During 2003, this publicly-traded equity security was sold for a gain of $0.1 million.
At December 31, 2001, we held a strategic equity investment of $2.2 million in a private company located in the United Kingdom. Under our accounting policy, the carrying value of a cost method non-marketable investment is the amount paid for the investment unless it has been determined to be other than temporarily impaired, in which case we write the investment down to its impaired value. We review all of our investments periodically for impairment; however, for non-marketable equity securities, the impairment analysis requires significant judgment. This analysis includes assessment of the investee's financial condition, the business outlook for its products and technology, its projected results and cash flows, the likelihood of obtaining subsequent rounds of financing, and the impact of any relevant contractual equity preferences held by us or others. If an investee obtains additional funding at a valuation lower than our carrying amount, we presume that the investment is other than temporarily impaired, unless specific facts and circumstances indicate otherwise (for example, if we hold contractual rights that give us a preference over the rights of other investors). During 2002, a sufficient market for the U.K. company's technology did not develop and additional financing was raised from an existing shareholder during the fourth quarter to enable the company to continue operations. The market value of the company implied in the 2002 financing indicated significant impairment of our investment in the company. In accordance with our accounting policy, we wrote the investment down to $0.1 million, a balance equal to the estimated fair value of our investment in the company at the time of the financing. The $0.1 million balance is included on the December 31, 2003 and 2002, balance sheets in other assets. The impairment write-down of $2.1 million was realized as an expense on the income statement in the fourth quarter of 2002.
We maintain trading assets to generate returns that offset changes in liabilities related to our deferred compensation plan. The trading assets consist of insurance contracts and our Common Stock contributed to the plan by participants and are stated at fair value. Recognized gains and losses are included in interest income and other, net of expense, and generally offset the change in the deferred compensation liability, which is also included in interest income and other, net of expense. Net gains (losses) on the trading asset portfolio were not significant for 2003, 2002, and 2001. The deferred compensation assets were $2.5 million, and the deferred compensation liabilities were $2.7 million, at December 31, 2003.
o Concentration of Credit Risk
Financial instruments that potentially subject us to concentrations of credit risk consist principally of cash investments and trade receivables. We limit our exposure to credit risk by investing excess liquidity only in securities of A, A1, or P1 grade. We are exposed to credit risks in the event of default by the financial institutions or issuers of investments to the extent of amounts recorded on the balance sheet.
We sell our products to customers in diversified industries. We are exposed to credit risks in the event of non-payment by customers to the extent of amounts recorded on the balance sheet. We limit our exposure to credit risk by performing ongoing credit evaluations of our customers' financial condition and generally require no collateral. We are exposed to credit risks in the event of insolvency by our customers and manage such exposure to accounting losses by limiting the amount of credit extended whenever deemed necessary. Our distributors accounted for approximately 69% of our revenues in 2003, 65% in 2002, and 68% in 2001. During 2001, we consolidated our distribution channel by terminating our agreement with Arrow Electronics, Inc. (Arrow). During 2003, we further consolidated our distribution channel by terminating our agreement with Pioneer-Standard Electronics, Inc. (Pioneer), leaving Unique Technologies, Inc. (Unique) as our sole distributor in North America. The loss of Unique as a distributor could have a materially adverse effect on our business, financial condition, or results of operations. Lockheed Martin accounted for 11% of revenues in 2003. See Note 9 for further information regarding our 10% customers.
As of December 31, 2003, we had an accounts receivable balance of $21.6 million, net of an allowance for doubtful accounts of $1.1 million. If sales levels were to increase, it is likely that the level of receivables would also increase. In the event that customers delay their payments to us, the levels of accounts receivable would also increase. We maintain allowances for doubtful accounts for estimated losses resulting from the inability of our customers to make required payments. The allowance for doubtful accounts is based on past payment history with the customer, analysis of the customer's current financial condition, outstanding invoices older than 90 days, and other known factors. If the financial condition of our customers were to deteriorate, resulting in an impairment of their ability to make payments, additional allowances may be required.
o Fair Value of Financial Instruments
We use the following methods and assumptions in estimating our fair value disclosures for financial instruments:
o Accounts Payable
The carrying amount reported in the balance sheets for accounts payable approximates fair value.
o Cash and Cash Equivalents
The carrying amounts reported in the balance sheets for cash and cash equivalents approximate fair value.
o Insurance Contracts
The fair value of our insurance contracts (entered into in connection with our deferred compensation plan) is based upon cash surrender value.
o Investment Securities
The fair values for marketable debt and equity securities are based on quoted market prices. Strategic equity investments in non-public companies with no readily available market value are carried on the balance sheet at cost as adjusted for impairment. If reductions in the market value of marketable equity securities to an amount that is below cost are deemed by us to be other than temporary, the reduction in market value will be realized, with the resulting loss in market value reflected on the income statement.
o Goodwill and other Acquisition-Related Intangibles
In past years we made business acquisitions that resulted in the recording of a significant amount of goodwill and identified intangible assets. At December 31, 2003, we had $32.1 million of remaining net book value assigned to goodwill from those acquisitions and $4.6 million of remaining net book value assigned to identified intangible assets, such as patents and completed technology.
Historically and through the end of 2001, goodwill was amortized on a straight-line basis over its useful life. At the beginning of 2002, we adopted SFAS No. 142, "Goodwill and Other Intangible Assets," which addresses the financial accounting and reporting standards for goodwill and other intangible assets subsequent to their acquisition. In accordance with SFAS No. 142, we ceased to amortize goodwill and instead test for impairment annually or more frequently if certain events or changes in circumstances indicate that the carrying value may not be recoverable. We completed our annual goodwill impairment tests during the fourth quarter of 2003, and noted no impairment. The initial test of goodwill impairment requires us to compare our fair value with our book value, including goodwill. Based on our total market capitalization, which we believe represents the best indicator of our fair value, we determined that our fair value was in excess of our book value. Since we found no indication of impairment, no further testing was necessary.
At December 31, 2003, we had identified intangible assets arising from prior business acquisitions with a net book value of $4.6 million, which are being amortized on a straight line basis over their estimated lives. In accordance with SFAS No. 144, "Accounting for the Impairment or Disposal of Long-Lived Assets," we recognize impairment losses on identified intangible assets when indicators of impairment are present and the undiscounted cash flows estimated to be generated by those assets are less than the net book value of those assets. The impairment loss is measured by comparing the fair value of the asset to its carrying value. Fair value is based on discounted cash flows using present value techniques identified in SFAS No. 144. We assessed our identified intangible assets for impairment in accordance with SFAS No. 144 as of December 31, 2003, and noted no impairment. If these estimates or their related assumptions change in the future, it could result in lower estimated future cash flows that may not support the current carrying value of these assets, which would require us to record impairment charges for these assets.
o Impact of Recently Issued Accounting Standards
In May, 2003, the FASB issued SFAS No. 150, "Accounting for Certain Financial Instruments with Characteristics of both Liabilities and Equity." SFAS No. 150 requires certain financial instruments to be accounted for as liabilities that previously were accounted for as equity. The financial instruments affected include mandatory redeemable stock; certain financial instruments that require or may require the issuer to buy back some of its shares in exchange for cash or other assets; and certain obligations that can be settled with shares of stock. SFAS No. 150 is effective for all financial instruments entered into or modified after May 31, 2003, and otherwise is effective at the beginning of the first interim period beginning after June 15, 2003. We do not currently have any financial instruments that are subject to the provisions of SFAS No. 150, so the adoption of SFAS No. 150 had no impact on our consolidated financial position or results of operations.
In January 2003, the FASB issued Financial Standards Accounting Board Interpretation (FIN) No. 46 (FIN 46), "Consolidation of Variable Interest Entities," an interpretation of Accounting Research Bulletin (ARB) No. 51, "Consolidated Financial Statements." FIN 46, which amended the interpretation in December 2003, establishes accounting guidance for consolidation of a variable interest entity (VIE). FIN 46 requires an investor with a majority of the variable interests (primary beneficiary) in a variable interest entity (VIE) to consolidate the entity and also requires majority and significant variable interest investors to provide certain disclosures. A VIE is an entity in which the equity investors do not have a controlling interest or the equity investment at risk is insufficient to finance the entity's activities without receiving additional subordinated financial support from the other parties. Development-stage entities that have sufficient equity invested to finance the activities they are currently engaged in and entities that are businesses as defined in the Interpretation are not considered VIEs. The provisions of FIN 46 were effective immediately for all arrangements entered into with new VIEs created after January 31, 2003. We do not currently have any contractual relationship or other business relationship with a VIE, so the adoption of FIN 46 had no impact on our consolidated financial position or results of operations.
o Income Taxes
We account for income taxes in accordance with SFAS No. 109, "Accounting for Income Taxes," which requires that deferred tax assets and liabilities be recognized using enacted tax rates for the effect of temporary differences between the book and tax bases of recorded assets and liabilities. Under SFAS No. 109, the liability method is used in accounting for income taxes. Deferred tax assets and liabilities are determined based on the differences between financial reporting and the tax basis of assets and liabilities, and are measured using the enacted tax rates and laws that will be in effect when the differences are expected to reverse. SFAS No. 109 also requires that deferred tax assets be reduced by a valuation allowance if it is more likely than not that some or all of the deferred tax asset will not be realized. We evaluate annually the realizability of our deferred tax assets by assessing our valuation allowance and by adjusting the amount of such allowance, if necessary. The factors used to assess the likelihood of realization include our forecast of future taxable income and available tax planning strategies that could be implemented to realize the net deferred tax assets.
At December 31, 2003, we had $61.7 million of gross deferred tax assets in excess of deferred tax liabilities. Based on the factors cited above, including our forecast of future taxable income and limitations under Section 382 of the Internal Revenue Code, we determined at December 31, 2003, that it is more likely than not that $34.2 million of deferred tax assets will be realized. This resulted in a valuation allowance of $27.5 million. In order to fully utilize the $34.2 million of net deferred tax assets, taxable income in the amount of approximately $89 million must be earned in future periods. Factors that may affect our ability to achieve sufficient future taxable income include, but are not limited to, increased competition, a decline in sales or margins, loss of market share, delays in product availability, and technological obsolescence.
o Inventories
As of December 31, 2003, we had a net inventory balance of $38.7 million, stated at the lower of cost (first-in, first-out) or market (net realizable value). We believe that a certain level of inventory must be carried to maintain an adequate supply of product for customers. This inventory level may vary based upon orders received from customers or internal forecasts of demand for these products. Other considerations in determining inventory levels include the stage of products in the product life cycle, design win activity, manufacturing lead times, customer demands, strategic relationships with foundries, and competitive situations in the marketplace. Should any of these factors develop other than anticipated, inventory levels may be materially and adversely affected.
We write down our inventory for estimated obsolescence or unmarketable inventory equal to the difference between the cost of inventory and the estimated realizable value based upon assumptions about future demand and market conditions. To address this difficult, subjective, and complex area of judgment, we apply a methodology that includes assumptions and estimates to arrive at the net realizable value. First, we identify any inventory that has been previously written down in prior periods. This inventory remains written down until sold, destroyed, or otherwise dispositioned. Second, our quality assurance personnel examine inventory line items that may have some form of obsolescence due to non-conformance with electrical and mechanical standards. Third, we assess the inventory not otherwise identified to be written down against product history and forecasted demand (typically for the next six months). Finally, we analyze the result of this methodology in light of the product life cycle, design win activity, and competitive situation in the marketplace to derive an outlook for consumption of the inventory and the appropriateness of the resulting inventory levels. If actual future demand or market conditions are less favorable than those we have projected, additional inventory write-downs may be required.
During 2003, we modified our inventory valuation policies to properly account for "last time buy" inventory purchases. Last time buys occur when a wafer supplier is about to shut down the manufacturing line used to make a product and current inventories are insufficient to meet foreseeable future demand. We made last time buys of certain products from our wafer suppliers in 2003. Since this inventory was not acquired to meet current demand, we did not believe the application of our existing inventory write down policy was appropriate, so a discrete write down policy was established for inventory purchased in last time buy transactions. As a consequence, these transactions and the related inventory are excluded from the standard excess and obsolescence write down policy. Inventory purchased in last time buy transactions will be evaluated on an ongoing basis for indications of excess or obsolescence based on rates of actual sell through; expected future demand for those products over a longer time horizon; and any other qualitative factors that may indicate the existence of excess or obsolete inventory. In the event that actual sell through does not meet expectations and estimations of expected future demand decrease, last time buy inventory could be written down in the future. Evaluations of last time buy inventory in 2003 did not result in any write downs. At December 31, 2003, $5.4 million related to last time buy type purchases was included in inventory on the balance sheet. See Note 2 for information on inventory amounts.
o Legal Matters
As is typical in the semiconductor industry, we have been and expect to be notified from time to time of claims, including claims that we may be infringing patents owned by others. During 2003, we held settlement discussions with several third parties. When probable and reasonably estimable, we make provision for estimated liabilities. As we sometimes have in the past, we may settle disputes and/or obtain licenses under patents that we are alleged to infringe. During 2003, we settled a threatened patent infringement claim and obtained licenses under the patents that we were alleged to infringe. As a result of the settlement, we reduced our accruals for estimated legal liabilities by $0.6 million, which had a favorable impact on SG&A spending in the third quarter of 2003,. We can offer no assurance that any pending or threatened claim will be resolved or that the resolution of any such claims will not have a materially adverse effect on our business, financial condition, or results of operations. In addition, our evaluation of the impact of these pending and threatened claims could change based upon new information learned by us. Subject to the foregoing, we do not believe that the resolution of any pending or threatened legal claim is likely to have a materially adverse effect on our business, financial condition, or results of operations.
o Product Warranty
Our product warranty accrual includes specific accruals for known product issues and an accrual for an estimate of incurred but unidentified product issues based on historical activity. Due to effective product testing and the short time between product shipment and the detection and correction of product failures, the warranty accrual based on historical activity and the related expense for known product issues were not significant in 2003, 2002, or 2001.
o Property and Equipment
Property and equipment is carried at cost less accumulated depreciation and amortization. Depreciation and amortization have been provided on a straight-line basis over the following estimated useful lives:
Equipment......................................... 2 to 5 years Furniture and fixtures............................ 3 to 5 years Leasehold improvements............................ Remaining term of lease
See Note 2 for information on property and equipment amounts.
o Revenue Recognition
In accordance with SEC Staff Accounting Bulletin No. 101, revenue is recognized when there is evidence of an arrangement, delivery has occurred or services have been completed, the price is fixed or determinable, and collectability is reasonably assured. Revenue from product shipped to end customers is recorded when all of the foregoing conditions are met and risk of loss and title passes to the customer. Revenue related to products shipped subject to customers' evaluation is recognized upon final acceptance. Shipments to distributors are made under agreements allowing certain rights of return and price protection on unsold merchandise. For that reason, we defer recognition of revenues and related cost of revenues on sales of products to distributors until such products are sold by the distributor and title transfers to the end user. Royalty income is recognized upon notice to us of the sale by others of products subject to royalties. Revenues generated by the Protocol Design Services organization are recognized as the services are performed.
We record a provision for price adjustments on unsold merchandise shipped to distributors in the same period as the related revenues are recorded. If market conditions were to decline, we may need to take action with our distributors to ensure the sell-through of inventory already in the channel. These actions during a market downturn could result in incrementally greater reductions to net revenues than otherwise would be expected. We also record a provision for estimated sales returns on products shipped directly to end customers in the same period as the related revenues are recorded. The provision for sales returns is based on historical sales returns, analysis of credit memo data, and other factors. If our calculation of these estimates does not properly reflect future return patterns, future net revenues could be materially different.
o Stock-Based Compensation
We have employee stock plans that are described more fully in Note 6. We account for our stock options and equity awards in accordance with the provisions of Accounting Principles Board (APB) Opinion No. 25, "Accounting for Stock Issued to Employees," and related interpretations and have elected to follow the "disclosure only" alternative prescribed by SFAS No. 123, "Accounting for Stock-Based Compensation."
We account for stock-based awards to employees using the intrinsic value method in accordance with APB Opinion No. 25 and FIN No. 44 (FIN 44), "Accounting for Certain Transactions Involving Stock Compensation - an Interpretation of APB Opinion No. 25." Accordingly, no compensation cost has been recognized for our fixed-cost stock option plans because stock-based awards are issued at fair market value on the date of grant for our stock option plans or 85% of fair market value at the date of grant for our employee stock purchase plan. Options and warrants granted to consultants and vendors are accounted for at fair value determined by using the Black-Scholes method in accordance with EITF Issue No. 96-18, "Accounting for Equity Instruments that are Issued to Other than Employees for Acquiring, or in Conjunction with Selling, Goods or Services."
Pro forma information regarding net income and net income per share is required by SFAS No. 148, "Accounting for Stock-Based Compensation - Transition and Disclosure an Amendment of FASB Statement No. 123," which also requires that the information be determined as if we had accounted for our stock-based awards to employees granted under the fair value method. Our stock based awards consist of options and employee stock purchase rights. The fair value for these stock-based awards to employees was estimated at the date of grant using the Black-Scholes pricing model with the following weighted-average assumptions:
The weighted-average fair value of options granted during 2003 was $9.05, during 2002 was $10.19, and during 2001 was $10.49. The weighted-average fair value of ESPP rights granted during 2003 was $6.38, during 2002 was $6.27, and during 2001 was $8.14.
For purposes of pro forma disclosures, the estimated fair value of our stock-based awards to employees is amortized to expense using the graded method for options and during the purchase periods for employee stock purchase rights. Our pro forma information is as follows:
During the fourth quarter of 2003, a review of our financial reporting procedures revealed errors in the process by which we had calculated pro forma compensation expense for the purpose of providing the pro forma footnote disclosure required by SFAS Nos. 123 and 148. The errors were limited to footnote disclosure under SFAS Nos. 123 and 148 of non-cash pro forma compensation expense and did not change or have any impact on our historically reported statements of income, balance sheets, or statements of cash flows. We corrected the process by which such pro forma footnote disclosure is prepared and instituted additional internal controls to ensure that the correct process is followed.
Although we believe that the errors were immaterial, we have adjusted the pro forma information for the quarters ended July 6 and April 6, 2003, and years ended December 31, 2002 and 2001, to reflect the correction of previously calculated pro forma tax benefits from non qualified stock options and pro forma compensation cost related to our employee stock purchase plan. The adjusted pro forma information for all fiscal years and interim periods that required adjustment is as follows:
Our originally reported pro forma information was as follows:
The Black-Scholes option valuation model was developed for use in estimating the fair value of traded options, which have no vesting restrictions and are fully transferable. In addition, option valuation models require the input of highly subjective assumptions, including the expected stock price volatility. Because our stock-based awards to employees have characteristics significantly different from those of traded options, and because changes in the subjective input assumptions can materially affect the fair value estimate, in our opinion the existing models do not necessarily provide a reliable single measure of the fair value of our stock-based awards to employees. In addition, the effects on pro forma disclosures of applying SFAS Nos. 123 and 148 are not likely to be representative of the effects on pro forma disclosures in future years. See Note 6 for further information regarding our stock option plans.
o Use of Estimates
The preparation of financial statements in conformity with accounting principles generally accepted in the United States requires us to make estimates and judgments that affect the reported amounts of assets, liabilities, revenues, and expenses and the related disclosure of contingent assets and liabilities. We base our estimates on historical experience and on various other assumptions that we believe to be reasonable under the circumstances, the results of which form the basis for making judgments about the carrying values of assets and liabilities that are not readily apparent from other sources. Actual results may differ materially from these estimates. In addition, if these estimates or their related assumptions change in the future, there could be a materially adverse effect on our operating results.
2. Balance Sheet Detail
Depreciation expense was approximately $7.5 million in 2003, $7.3 million in 2002, and $7.0 million in 2001, and is included with amortization expense in the Consolidated Statement of Cash Flows.
During 2003, we removed certain fully depreciated assets with a cost of $7.5 million that were no longer being utilized, which had no impact on the income statement.
Historically and through the end of 2001, goodwill was amortized on a straight-line basis over its useful life. At the beginning of 2002, we adopted SFAS No. 142, "Goodwill and Other Intangible Assets," and ceased to amortize goodwill. Instead, we test for impairment annually or more frequently if certain events or changes in circumstances indicate that the carrying value may not be recoverable. We completed our annual goodwill impairment tests during the fourth quarter of 2003, and noted no impairment. A reconciliation of previously reported net income and earnings per share to the amounts adjusted for the exclusion of goodwill amortization, net of the related income tax effect, is as follows:
Goodwill was adjusted during the three years ended December 31, 2003, as follows:
The reduction in goodwill in 2002 was due primarily to a balance sheet reclassification of $5.0 million from goodwill to deferred tax assets. The goodwill was reclassified because we believe (based on a number of factors, including our estimate of future taxable income) that a portion of the net operating losses generated by GateField Corporation (GateField) and valued at zero when we acquired GateField in 2000 will be used by us to reduce taxes payable in the future. During 2003 and 2002, no goodwill was acquired or impaired. During 2001, additional consideration of $1.7 million was issued to Prosys Technology (Prosys) shareholders pursuant to the achievement of technological milestones specified in the agreement under which we acquired Prosys in 2000.
We assess identified intangible assets for impairment in accordance with SFAS No. 144, "Accounting for the Impairment or Disposal of Long-Lived Assets," and recognize impairment losses when indicators of impairment are present and the undiscounted cash flows estimated to be generated by those assets are less than the net book value of those assets. We assessed our identified intangible assets for impairment in accordance with SFAS No. 144 as of December 31, 2003, and noted no impairment. Identified intangible assets as of December 31, 2003, consisted of the following:
Identified intangible assets as of December 31, 2002, consisted of the following:
All of our identified intangible assets are subject to amortization. Amortization of identified intangibles included the following:
Based on the carrying value of identified intangible assets recorded at December 31, 2003, and assuming no subsequent impairment of the underlying assets, the annual amortization expense is expected to be $2.6 million for 2004, $1.9 million for 2005, less than $0.1 million in 2006, and none thereafter.
3. Available-for-Sale Securities
The following is a summary of available-for-sale securities at December 31, 2003 and 2002:
Available-for-sale securities that were in an unrealized loss position as of December 31, 2003, have all been in an unrealized loss position for less than twelve months.
The adjustments to unrealized gains and (losses) on investments, net of taxes, included as a separate component of shareholders' equity totaled approximately ($0.5 million) for the year ended December 31, 2003, ($0.1 million) for the year ended December 31, 2002, and $0.1 million for the year ended December 31, 2001. See Note 7 for information regarding other comprehensive income/(loss). Realized gains were $0.5 million during 2003, $0.2 million during 2002, and $0.4 million during 2001.
We occasionally make equity investments in public or private companies for the promotion of business and strategic objectives. During 2002, we recognized losses and recorded impairment write-downs totaling $3.7 million in connection with our strategic equity investments, which consisted of $1.6 million related to an equity investment in a publicly traded company and $2.1 million related to an equity investment in a private company. The $1.6 million loss related to the investment in a publicly traded company was comprised of $0.7 million of realized losses on shares sold during the first and second quarters of 2002 and $0.9 million of impairment write-downs recorded in the second and fourth quarters of 2002. These impairment write-downs were recorded as a result of declines in the market value of shares still held by us. The $2.1 million loss related to the equity investment in a private company consisted entirely of an impairment write-down that was recorded when the estimated fair value of the private company was determined to be below its carrying value after the private company received new financing in the fourth quarter of 2002 at a per share price significantly less than our initial investment. We sold all of our remaining strategic equity investment in a publicly traded company in 2003, realizing a gain of $0.1 million from the sale. As of December 31, 2003, we had $0.1 million of strategic equity investments remaining on the balance sheet. See Note 1 for further information regarding our policy on accounting for investments and the manner in which fair values were determined.
The expected maturities of our investments in debt securities at December 31, 2003, are shown below. Expected maturities can differ from contractual maturities because the issuers of the securities may have the right to prepay obligations without prepayment penalties.
A portion of our securities represents investments in floating rate municipal bonds with contractual maturities greater than one year with some greater than ten years. However, the interest rates on these debt securities generally reset every ninety days, at which time we have the option to sell the security or roll over the investment at the new interest rate. Since it is not our intention to hold these floating rate municipal bonds until their contractual maturities, these amounts have been classified as short-term investments.
4. Commitments and Contingencies
o Commitments
We lease our facilities under non-cancelable lease agreements. The current primary facilities lease agreement expires in January 2014 and includes an annual increase in lease payments of three percent per year. Facilities lease expense is recorded on a straight-line basis over the term of the lease. As cash payments in 2003 were less than rent expense recognized on a straight line basis we recorded a deferred rent liability of $0.8 million in 2003. The equipment lease terms are month-to-month. Our facilities and equipment leases are accounted for as operating leases and require us to pay property taxes, insurance and maintenance, and repair costs. At December 31, 2003 and 2002, we had no capital lease obligations.
We have entered into non-cancelable licensing agreements with external software developers to enable us to include their proprietary technology in our design and programming software. The following represents contractual commitments associated with operating leases and royalty and licensing agreements:
Purchase orders or contracts for the purchase of raw materials and other goods and services are not included in the table above. We are not able to determine the aggregate amount of such purchase orders that represent contractual obligations as purchase orders may represent authorizations to purchase rather than binding agreements. For the purposes of this table, contractual obligations for purchase of goods or services are defined as agreements that are enforceable and legally binding on us and that specify all significant terms, including: fixed or minimum quantities to be purchased; fixed, minimum or variable price provisions; and the approximate timing of the transaction. Our purchase orders are based on our current manufacturing needs and fulfilled by our vendors within short time horizons. We do not have significant agreements for the purchase of raw materials or other goods specifying minimum quantities or set prices that exceed our expected requirements for three months. We also enter into contracts for outsourced services; however, the obligations under these contracts were not significant and the contracts generally contain clauses allowing for cancellation without significant penalty.
Rental expense under operating leases was approximately $4.2 million for 2003, $4.2 million for 2002, and $4.4 million for 2001. Amounts purchased under royalty/licensing agreements was approximately $5.5 million in 2003, $4.1 million in 2002, and $3.7 million in 2001.
o Contingencies
From time to time we are notified of claims, including claims that we may be infringing patents owned by others, or otherwise become aware of conditions, situations, or circumstances involving uncertainty as to the existence of liability or the amount of the loss. When probable and reasonably estimable, we make provision for estimated liabilities. During 2003, we held settlement discussions with several third parties. As we sometimes have in the past, we may settle disputes and/or obtain licenses under patents that we are alleged to infringe. During 2003, we settled a threatened patent infringement claim and obtained licenses under the patents that we were alleged to infringe. As a result of the settlement, we reduced our accruals for estimated legal liabilities by $0.6 million, which had a favorable impact on SG&A spending in the third quarter of 2003. We can offer no assurance that any pending or threatened claim or other loss contingency will be resolved or that the resolution of any such claim or contingency will not have a materially adverse effect on our business, financial condition, or results of operations. In addition, our evaluation of the impact of these claims and contingencies could change based upon new information learned by us. Subject to the foregoing, we do not believe that the resolution of any pending or threatened legal claim or loss contingency is likely to have a materially adverse effect on our business, financial condition, or results of operations.
5. Retirement Plan
Effective December 10, 1987, we adopted a tax deferred savings plan for the benefit of qualified employees. The plan is designed to provide employees with an accumulation of funds at retirement. Employees may elect at any time to have salary reduction contributions made to the plan.
We may make contributions to the plan at the discretion of the Board of Directors. We made no contributions to the plan for 2003, 2002, or 2001. There is no guarantee we will make any contributions to the plan in the future, regardless of our financial performance.
6. Shareholders' Equity
o Stock Repurchase
Our Board of Directors authorized a stock repurchase program in September 1998 whereby shares of our Common Stock may be purchased from time to time in the open market at the discretion of management. Additional shares were authorized for repurchase in each of 1999 and 2002. In 2002, we repurchased 663,482 shares of Common Stock for $7.9 million. No shares were repurchased in 2003. We reissue repurchased shares through our employee stock option and purchase plans. As of December 31, 2003, we have remaining authorization to repurchase up to 900,000 shares.
o Shareholder Rights Plan
Our Board of Directors adopted a Shareholder Rights Plan in October 2003. Under the Plan, we issued a dividend of one right for each share of our Common Stock held by shareholders of record as of the close of business on November 10, 2003. Each right will entitles the shareholder to purchase a fractional share of our Preferred Stock for $220.00. However, the rights will become exercisable only if a person or group acquires, or announces a tender or exchange offer that would result in the acquisition of, 15% or more of our Common Stock while the Plan remains in place. Then, unless we redeem the rights for $0.001 per right, the rights will become exercisable by all rights holders (except the acquiring person or group) for shares of Actel (or shares of the third party acquirer) having a value equal to twice the right's then-current exercise price.
o Stock Option Plans
We have adopted stock option plans under which officers, employees, and consultants may be granted incentive stock options or nonqualified options to purchase shares of our Common Stock. In connection with our acquisitions of AutoGate Logic, Inc. (AutoGateLogic) in 1999 and Prosys and GateField in 2000, we assumed the stock option plans of AutoGate Logic, Prosys, and GateField and the related options are incorporated in the amounts below. At December 31, 2003, 17,722,566 shares of Common Stock were reserved for issuance under these plans, of which 2,680,730 were available for grant. There were no options granted to consultants in 2003 or 2002 and options granted to consultants in 2001 were recorded at fair value of $0.1 million using the Black-Scholes model in accordance with EITF 96-18 and FIN No. 44.
We also adopted a new Directors' Stock Option Plan in 2003, under which directors who are not employees of Actel may be granted nonqualified options to purchase shares of our Common Stock. The new Directors' Stock Option Plan replaced a 1993 plan that expired in 2003. At December 31, 2003, 500,000 shares of Common Stock were reserved for issuance under such plan, of which 500,000 were available for grant.
We grant stock options under our plans at a price equal to the fair value of our Common Stock on the date of grant. Subject to continued service, options generally vest over a period of four years and expire ten years from the date of grant.
The following table summarizes our stock option activity and related information for the three years ended December 31, 2003:
The following table summarizes information about stock options outstanding at December 31, 2003:
At December 31, 2002, 4,028,287 outstanding options were exercisable; and at December 31, 2001, 2,634,531 outstanding options were exercisable.
o Employee Stock Purchase Plan
We have adopted an Employee Stock Purchase Plan (ESPP), under which eligible employees may designate not more than 15% of their cash compensation to be deducted each pay period for the purchase of Common Stock (up to a maximum of $25,000 worth of Common Stock each year). The ESPP is administered in consecutive, overlapping offering periods of up to 24 months each, with each offering period divided into four consecutive six-month purchase periods beginning August 1 and February 1 of each year. On the last business day of each purchase period, shares of Common Stock are purchased with employees' payroll deductions accumulated during the prior six months at a price per share equal to 85% of the market price of the Common Stock on the first day of the applicable offering period or the last day of the purchase period, whichever is lower. At December 31, 2003, 3,519,680 shares of Common Stock were authorized for issuance under the ESPP. There were 361,688 shares issued in 2003 under the ESPP, 269,346 shares in 2002, and 223,311 shares in 2001. 862,559 shares remained available for issuance under the ESPP at December 31, 2003.
7. Comprehensive Income (Loss)
The components of comprehensive income (loss), net of tax, are as follows:
Accumulated other comprehensive income for 2003 and 2002 is presented on the accompanying consolidated balance sheets and consists solely of the accumulated net unrealized gain on available-for-sale securities.
8. Tax Provision
The tax provision (benefit) consists of:
The tax provision (benefit) reconciles to the amount computed by multiplying income before tax by the U.S. statutory rate as follows:
Significant components of our deferred tax assets and liabilities for federal and state income taxes are as follows:
The valuation allowance increased by approximately $3.7 million in 2003 and decreased by $4.2 million in 2002. The valuation allowance in 2003 includes a $4.1 million tax benefit associated with stock option deductions. The amount will be credited to additional paid-in capital when the benefit is realized. The valuation allowance decreased in 2002 due to a $5.0 million reclassification adjustment to reduce goodwill as a result of the realization of previously reserved deferred tax assets associated with the net operating losses acquired from GateField. This reduction in the valuation allowance was offset by an increase to the valuation allowance of $0.6 million which was primarily related to impairments on equity investments for which we believe it is more likely than not such impairments will be realized for tax purposes. Approximately $21.8 million of the valuation allowance at December 31, 2003, will be allocated to reduce goodwill or other non-current intangible assets from the acquisition of GateField when realized.
We have a federal operating loss carryforward of approximately $83.7 million, which will expire at various times beginning in 2006 and ending in 2023. We also have federal research and development credits of approximately $3.0 million, which will expire at various times beginning in 2013 and ending in 2023. In addition, we have California research and development and manufacturer's investment credits of approximately $4.8 million that will expire beginning in 2006. Pre-tax income from foreign subsidiaries is immaterial.
9. Segment Disclosures
We operate in a single operating segment: designing, developing, and marketing FPGAs. FPGA sales accounted for 96% of net revenues for 2003, 2002, and 2001. We derive non-FPGA revenues from our Protocol Design Services organization, royalties, and the licensing of software and sale of hardware that is used to design and program our FPGAs. The Protocol Design Services organization, which we acquired from GateField in the third quarter of 1998, accounted for 1% of our net revenues for 2003, 2002 and 2001.
We market our products in the United States and in foreign countries through our sales personnel, independent sales representatives, and distributors. Our geographic sales are as follows:
We generate a majority of our revenues from the sale of our products through distributors. As of December 31, 2003, our principal distributor is Unique. The following table sets forth the percentage of revenues derived from each customer that accounted for 10% or more of our net revenues in any of the last three years:
Our property and equipment is located primarily in the United States. Property, plant, and equipment information is based on the physical location of the assets at the end of each of the fiscal years. Net property, plant, and equipment by geographic region was as follows:
10. Earnings Per Share
The following table sets forth the computation of basic and diluted earnings per share:
For 2003, options outstanding under our stock option plans to purchase approximately 1,913,000 shares of our Common Stock were excluded from the calculation to derive diluted income per share because their inclusion would have had an anti-dilutive effect.
For 2002, options outstanding under our stock option plans to purchase approximately 5,160,000 shares of our Common Stock were excluded from the calculation to derive diluted income per share because their inclusion would have had an anti-dilutive effect.
For 2001, we were in a net loss position and the inclusion of any stock options in the shares used for computing diluted net loss per share would have been anti-dilutive (reduced the loss per share). Therefore, approximately 4,016,000 options were excluded from the calculation of net less per share in 2001 because their inclusion would have had an anti-dilutive effect.
REPORT OF ERNST & YOUNG LLP, INDEPENDENT AUDITORS
THE BOARD OF DIRECTORS AND SHAREHOLDERS ACTEL CORPORATION
We have audited the accompanying consolidated balance sheets of Actel Corporation as of December 31, 2003 and 2002, and the related consolidated statements of operations, shareholders' equity and other comprehensive income, and cash flows for each of the three years in the period ended December 31, 2003. These financial statements are the responsibility of Actel's management. Our responsibility is to express an opinion on these financial statements based on our audits.
We conducted our audits in accordance with auditing standards generally accepted in the United States. Those standards require that we plan and perform the audit to obtain reasonable assurance about whether the financial statements are free of material misstatement. An audit includes examining, on a test basis, evidence supporting the amounts and disclosures in the financial statements. An audit also includes assessing the accounting principles used and significant estimates made by management, as well as evaluating the overall financial statement presentation. We believe that our audits provide a reasonable basis for our opinion.
In our opinion, the consolidated financial statements referred to above present fairly, in all material respects, the consolidated financial position of Actel Corporation at December, 31 2003 and 2002 and the consolidated results of its operations and its cash flows for each of the three years in the period ended December 31, 2003, in conformity with accounting principles generally accepted in the United States.
As discussed in Note 1 and Note 2 to the consolidated financial statements, effective January 1, 2002, the company adopted Statement of Financial Accounting Standards No. 142, "Goodwill and Other Intangible Assets."
/s/ ERNST & YOUNG LLP
San Jose, California January 21, 2004
ITEM 9.
ITEM 9. CHANGES IN AND DISAGREEMENTS WITH ACCOUNTANTS ON ACCOUNTING AND FINANCIAL DISCLOSURE
None.
ITEM 9A.
ITEM 9A. CONTROLS AND PROCEDURES
Disclosure Controls and Procedures
Our management evaluated, with the participation of our Chief Executive Officer and our Chief Financial Officer, the effectiveness of our disclosure controls and procedures as of the end of the period covered by this Annual Report on Form 10-K. Based on this evaluation, our Chief Executive Officer and our Chief Financial Officer concluded that our disclosure controls and procedures are effective to ensure that information we are required to disclose in reports that we file or submit under the Securities Exchange Act of 1934 is recorded, processed, summarized, and reported within the time periods specified in the SEC's rules and forms.
Changes in Internal Control over Financial Reporting
As discussed in Note 1 of Notes to Consolidated Financial Statements under the caption to "Stock-Based Compensation," pro forma information regarding net income and net income per share is required by SFAS No. 148, "Accounting for Stock-Based Compensation - Transition and Disclosure an Amendment of FASB Statement No. 123," which also requires that the information be determined as if we had accounted for our stock-based awards to employees granted under the fair value method. Our stock based awards consist of options and employee stock purchase rights. The fair value for these stock-based awards to employees was estimated at the date of grant using the Black-Scholes pricing model with the following weighted-average assumptions:
The weighted-average fair value of options granted during 2003 was $9.05, during 2002 was $10.19, and during 2001 was $10.49. The weighted-average fair value of ESPP rights granted during 2003 was $6.38, during 2002 was $6.27, and during 2001 was $8.14.
For purposes of pro forma disclosures, the estimated fair value of our stock-based awards to employees is amortized to expense using the graded method for options and during the purchase periods for employee stock purchase rights. Our originally reported pro forma information was as follows:
During the fourth quarter of 2003, a review of our financial reporting procedures revealed errors in the process by which we had calculated pro forma compensation expense for the purpose of providing the pro forma footnote disclosure required by SFAS Nos. 123 and 148. The errors were limited to footnote disclosure under SFAS Nos. 123 and 148 of non-cash pro forma compensation expense and did not change or have any impact on our historically reported statements of income, balance sheets, or statements of cash flows. We corrected the process by which such pro forma footnote disclosure is prepared and instituted additional internal controls to ensure that the correct process is followed.
Although we believe that the errors were immaterial, we have adjusted the pro forma information for the quarters ended July 6 and April 6, 2003, and years ended December 31, 2002 and 2001, to reflect the correction of previously calculated pro forma tax benefits from non qualified stock options and pro forma compensation cost related to our employee stock purchase plan. The adjusted pro forma information is as follows:
PART III
ITEM 10.
ITEM 10. DIRECTORS AND EXECUTIVE OFFICERS OF THE REGISTRANT
Directors
The following table identifies each of our directors as of March 1, 2004:
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(1)......Member of Nominating Committee.
(2)......Member of Audit Committee.
(3)......Member of Compensation Committee.
Mr. East has served as our President, Chief Executive Officer, and a director since December 1988.
Mr. Fiebiger has been a director since December 2000. Since December 1999, he has been Chairman and Chief Executive Officer of Lovoltech, Inc., a privately held semiconductor company specializing in low voltage devices. He also serves as a director of Mentor Graphics Corporation, QLogic Corporation, and a private company. Mr. Fiebiger was Vice Chairman and Managing Director of Technology Licensing of GateField Corporation, a semiconductor company that we purchased in November 2000, from 1998 to 2000, and President, Chief Executive Officer, and a director of GateField from 1996 to 1998.
Mr. Jacobsson has been a director since May 1998. Since November 2000, he has been President, Chief Executive Officer, and a director of Cynapps, Inc. and its successor by merger, Forte Design Systems, a privately-held company that offers products and services for the hierarchical design and verification of large, complex systems and integrated circuits. For the five years before that, he was President and Chief Executive Officer of SCS Corporation, a privately held semiconductor company in the Radio Frequency Identification area. Mr. Jacobsson also serves as a director of various private companies.
Mr. Perret has been a director since January 2003. Since November 2003, he has been a director and President and Chief Executive Officer and acting Chief Financial Officer of Legerity, Inc. Before that, he had been Vice President of Finance, Chief Financial Officer, and General Manager of the Voice Network Access product line at Legerity since August 2001. Before joining Legerity, Mr. Perret was our Vice President of Finance and Chief Financial Officer from June 1997 and our Controller from January 1996. From April 1992 until joining us, he was the Site Controller for the manufacturing division of Applied Materials, a maker of semiconductor manufacturing equipment, in Austin, Texas. From 1978 to 1991, Mr. Perret held various financial positions with National Semiconductor, a semiconductor manufacturer.
Mr. Spencer has been a director since February 1989. He has been the principal of The Spencer Group, a consulting firm, for the past five years.
Jos C. Henkens, a director since April 1988, died unexpectedly in 2003. The Nominating Committee is in the process of searching for a director to fill the vacancy.
There is no family relationship between any of our directors and executive officers.
Executive Officers
The following table identifies each of our executive officers as of March 1, 2004:
Mr. East has served as our President and Chief Executive Officer since December 1988. From April 1979 until joining us, Mr. East served in various positions with Advanced Micro Devices, a semiconductor manufacturer, including Senior Vice President of Logic Products from November 1986 to November 1988. From December 1976 to March 1979, he served as Operations Manager for Raytheon Semiconductor. From September 1968 to December 1976, Mr. East served in various marketing, manufacturing, and engineering positions for Fairchild Camera and Instrument Corporation, a semiconductor manufacturer.
Dr. Hamdy is one of our founders, was our Vice President of Technology from August 1991 to March 1996 and Senior Vice President of Technology from March 1996 to September 1996, and has been our Senior Vice President of Technology and Operations since September 1996. From November 1985 to July 1991, he held a number of management positions with our technology and development group. From January 1981 to November 1985, Dr. Hamdy held various positions at Intel Corporation, a semiconductor manufacturer, lastly as project manager.
Mr. Anderson joined us in March 1998 as Controller and has been our Vice President of Finance and Chief Financial Officer since August 2001. From 1987 until joining us, he held various financial positions at National Semiconductor, a semiconductor company, with the most recent position of Director of Finance, Local Area Networks Division. From 1982 to 1986, he was an auditor with Touche Ross & Co., a public accounting firm.
Mr. Farinaro joined us in August 1998 as Vice President & General Manager of Design Services. From February 1990 until joining us, he held various engineering and management positions with GateField (formally Zycad Corporation until 1997), a semiconductor company, with the most recent position of Vice President of Application & Design Services. From 1985 to 1990, Mr. Farinaro held various engineering and management positions at Singer Kearfott, an aerospace electronics company, and its spin-off, Plessey Electronic Systems Corporation.
Mr. Indaco joined us in March 1999 as Vice President of Worldwide Sales. From January 1996 until joining us, he served as Vice President of Sales for Chip Express, a semiconductor manufacturer. From September 1994 to January 1996, Mr. Indaco was Vice President of Sales for Redwood Microsystems, a semiconductor manufacturer. From February 1984 to September 1994, he held senior sales management positions with LSI Logic, a semiconductor manufacturer. From June 1978 to February 1984, Mr. Indaco held various field engineering sales and marketing positions with Intel Corporation, a semiconductor manufacturer. From June 1976 to June 1978, he held various marketing positions with Texas Instruments, a semiconductor manufacturer.
Mr. Kish joined us in December 1999 as Vice President of Strategic Product Marketing and became our Vice President of Marketing in July 2000. Prior to joining us, he held senior management positions at Synopsys, an EDA company, and Atmel, a semiconductor manufacturer. Before that, Mr. Kish held sales and engineering positions with Texas Instruments, a semiconductor manufacturer.
Ms. McArthur joined us in July of 2000 as Vice President of Human Resources. From 1997 until joining us, she was Vice President of Human Resources at Talus Solutions. Before that, Ms. McArthur held senior human resource positions at Applied Materials from 1993 to 1997, at 3Com Corporation from 1987 to 1993, and at Saga Corporation from 1978 to 1986.
Mr. Mubarak joined us in November 1992, was our Director of Product and Test Engineering until October 1997, and has been our Vice President of Engineering since October 1997. From 1989 until joining us, he held various engineering and engineering management positions with Samsung Semiconductor Inc., a semiconductor manufacturer, and its spin-off, IC Works, Inc. From 1984 to 1989, Mr. Mubarak held various engineering, product planning, and engineering management positions with Advanced Micro Devices, a semiconductor manufacturer.
Mr. Van De Hey joined us in July 1993 as Corporate Counsel, became our Secretary in May 1994, and has been our Vice President & General Counsel since August 1995. From November 1988 to September 1993, he was an associate with Wilson, Sonsini, Goodrich & Rosati, Professional Corporation, a law firm in Palo Alto, California, and our outside legal counsel. From August 1985 until October 1988, he was an associate with the Cleveland office of Jones Day, a law firm.
Subject to their rights under any contract of employment or other agreement, executive officers serve at the discretion of the Board of Directors.
Audit Committee and Audit Committee Financial Expert
Our Board of Directors has a separately-designated standing Audit Committee for the purpose of overseeing our accounting and financial reporting processes and audits of our financial statements. The Audit Committee currently consists of Messrs. Spencer (Chairman), Fiebiger, and Perret.
Mr. Perret was added to our Board of Directors on January 17, 2003, and appointed to the Audit Committee to serve as the Audit Committee Financial Expert. Mr. Perret was employed by Actel from January 1996 until August 2001, last serving as Vice President of Finance and Chief Financial Officer. At the time of Mr. Perret's appointment, the Board of Directors determined that he qualified as an audit committee financial expert; was "independent" as defined in Section 10A(m)(3) of the Sarbanes Oxley Act; and was not "independent" as defined in NASD Rules 4200 and 4350 (Rules) proposed by The Nasdaq Stock Market, Inc. (Nasdaq). Relying on an exception to the independence requirements in the proposed Rules, the Board of Directors also determined that Mr. Perret's membership on the Audit Committee was in the best interests of Actel and its shareholders because of his experience and sophistication in accounting and financial matters and his familiarity with Actel and its financial statements. As the result of an amendment to the Rules proposed by Nasdaq on October 9, 2003, the exception relied upon by the Board was not included in the final Rules approved by the SEC on November 3, 2003. However, the Rules are not effective until the earlier of October 31, 2004, and our 2004 Annual Meeting of Shareholders, which the Board has scheduled for October 14, 2004. The Board determined at its meeting on January 16, 2004, that Mr. Perret was not currently "independent" under the final Rules, but that he would be "independent" under the final Rules before the 2004 Annual Meeting of Shareholders.
Section 16(a) Beneficial Ownership Reporting Compliance
To our knowledge, based solely on our review of the copies of reports furnished to us, all of our directors, officers, beneficial owners of more than ten percent of our Common Stock, and other persons subject to Section 16 of the Exchange Act with respect to our Common Stock filed with the SEC on a timely basis all reports required by Section 16(a) of the Exchange Act during our most recent fiscal year.
Code of Ethics
We have adopted a Code of Ethics that applies to our Chief Executive Officer, Chief Financial Officer, and Controller. A copy of the Code of Ethics is filed as an exhibit to this Annual Report on Form 10-K.
ITEM 11.
ITEM 11. EXECUTIVE COMPENSATION
Executive Compensation
o Summary of Officer Compensation
The following table sets forth information concerning the compensation of the five mostly highly compensated executive officers who were serving as executive officers of the Company at the end of the last completed fiscal year:
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(1) Except as set forth in this table, there was no reportable compensation awarded to, earned by, or paid to the named executive officers in 2003.
(2) The Company pays bonuses in the year following that in which the bonuses were earned.
(3) Other compensation related to car allowance.
o Option Grants
The following table sets forth certain information with respect to stock options granted during 2003 to each of the executive officers named in the Summary Compensation Table:
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(1) The exercise price of these options is equal to the fair market value of our Common Stock on the date of grant, as determined by our Board of Directors. The options expire ten years from the date of grant, are not transferable by the optionee (other than by will or the laws of descent and distribution), and are exercisable during the optionee's lifetime only by the optionee. To the extent exercisable at the time of termination, options may be exercised within six months following termination of the optionee's employment, unless termination is the result of death, in which case the options become fully vested and may be exercised at any time within 12 months following death by the optionee's estate or a person who acquired the right to exercise the option by bequest or inheritance.
(2) The 0%, 5%, and 10% assumed annual rates of appreciation are mandated by the rules of the SEC and do not represent our estimate or projection of future Common Stock prices. The "potential realizable value" was calculated at the assumed rates of appreciation using the applicable exercise price as the base.
(3) Options vest and are fully exercisable upon an involuntary termination other than "for cause," or a voluntary termination "for good reason," following a "change of control."
(4) Option begins vesting August 1, 2003, and vests 50% on August 1, 2005, then quarterly at a rate of 6.25% until August 1, 2007.
o Option Values
The following table sets forth certain information concerning the number of options exercised during 2003 by the executive officers named in the Summary Compensation Table, as well as the number and aggregate value of shares covered by both exercisable and unexercisable stock options held by such executive officers as of January 4, 2004, the end of the fiscal year.
Aggregated Option Exercises in Last Fiscal Year and Fiscal Year End Option Values
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(1) Calculated on the basis of the difference between the closing sale price at the fiscal year end ($23.82) and the exercise price.
(2) Calculated on the basis of the difference between the exercise price and (i) the sale price when the exercised option is sold on the same day or (ii) the closing sale price on the exercise date.
Director Compensation
o Cash Compensation
As compensation for their services, directors who are not employees receive an annual retainer of $18,000. The chairs of the Audit, Compensation, and Nominating Committees and the Audit Committee Financial Expert receive an additional $5,000 annual retainer. Directors also receive $2,000 for each Board meeting attended in person, $1,000 for each committee meeting attended in person, and $750 for each Board and committee meeting attended by telephone. Directors are also reimbursed for reasonable out-of-pocket expenses incurred in the performance of their duties.
o 2003 Director Stock Option Plan
Our 2003 Directors' Stock Option Plan (Director Plan) provides for the grant of nonstatutory stock options to nonemployee directors. Under the Director Plan, each eligible director is granted an initial option to purchase 12,500 shares of our Common Stock on the date on which such person first becomes an eligible director and an additional option to purchase 12,500 shares on each subsequent date that such person is elected as a director at an annual meeting of our shareholders. The exercise price is the closing sales price of our Common Stock quoted on the Nasdaq National Market on the date of grant. All options become exercisable on the date of the first annual meeting of shareholders following the date of grant, subject to the optionee remaining a director until that annual meeting. Vested options are exercisable within four years after the date an optionee ceases to serve as a director, provided that no option may be exercised after its expiration date (which is ten years from the date of grant).
Change-in-Control Arrangements
We have entered into Management Continuity Agreements with our executive officers, which are designed to ensure continued service in the event of a "change of control." Each Agreement provides for accelerated vesting of an officer's stock options outstanding at the time of a change in control if the officer dies or in the event of an "involuntary termination" of the officer's employment other than for "cause" following the change of control.
We also have an Employee Retention Plan, which provides that all employees who hold unvested stock options as of the date of any "change of control" shall receive, upon remaining in our employ for six months following the date of such change of control (or earlier, if terminated other than for "cause"), an amount equal to one-third of the aggregate "spread" on their unvested options as of the date of such change of control. "Spread" is defined as the difference between the change-of-control price and the option exercise price. Payment may be made in cash, common stock, or a combination of cash and common stock.
"Change of control" is defined as (i) acquisition by any person of beneficial ownership of more than 30% of the combined voting power of our outstanding securities; (ii) a change of the majority of our Board of Directors within a two-year period; (iii) our merger or consolidation with any other corporation that has been approved by our shareholders, other than a merger or consolidation that would result in our voting securities outstanding immediately prior the merger or consolidation continuing to represent at least 50% of the total voting power of the surviving entity outstanding immediately after such merger or consolidation; or (iv) approval by our shareholders of a plan of complete liquidation or an agreement for the sale or disposition of all or substantially all of our assets.
Compensation Committee Interlocks and Insider Participation
Prior to our Annual Meeting of Shareholders on May 23, 2003, the Compensation Committee consisted of Jos C. Henkens, Jacob S. Jacobsson, and Frederic N. Schwettmann. Following our 2003 Annual Meeting, the Compensation Committee consisted of Messrs. Henkens (Chairman), Jacobsson, and Robert G. Spencer. Since the unexpected death of Mr. Henkens on July 8, 2003, the Compensation Committee has consisted of Messrs. Jacobsson (Chairman) and Spencer. None of the members of the Compensation Committee during 2003 was an officer or employee or former officer or employee of Actel or any of its subsidiaries, or had any other relationship requiring disclosure.
Compensation Committee Report
The following report is provided to shareholders by the Compensation Committee of the Board of Directors. This report shall not be deemed to be "filed" with the Securities and Exchange Commission or subject to Regulations 14A or 14C or to the liabilities of Section 18 of the Securities Exchange Act of 1934.
o Background
The Compensation Committee is a standing committee of the Board of Directors with the same authority as the Board to act on all compensation matters, except for actions requiring shareholder approval or related to the compensation of directors. Since Actel's incorporation in 1986, the Compensation Committee has been primarily responsible for establishing and reviewing Actel's management compensation policies. Since Actel's initial public offering in August 1993, the Compensation Committee has formally administered Actel's management compensation policies and plans, including our 1986 Incentive Stock Option Plan, 1995 Employee and Consultant Stock Plan, and 1993 Employee Stock Purchase Plan.
No member of the Compensation Committee is a former or current officer or employee of Actel. The current members of the Compensation Committee are Jacob S. Jacobsson and Robert G. Spencer. Mr. Jacobsson has been a member of the Compensation Committee since 1998, and Mr. Spencer since 2003. Meetings of the Compensation Committee are attended by Actel's Vice President of Human Resources, who provides background and market information and makes executive compensation recommendations but does not vote on any matter before the Compensation Committee. Other executive officers, including Actel's Chief Executive Officer and Chief Financial Officer, may attend portions of meetings of the Compensation Committee at the request of the Committee. The Committee meets in private at the end of each meeting.
o Compensation Policy
There are three major elements of Actel's executive compensation program. The first element is annual cash compensation in the form of base salary and incentive bonuses. The second element is long-term incentive stock options, which are designed to align compensation incentives with shareholder goals. The third element is compensation and employee benefits generally available to all employees of Actel, such as the 1993 Employee Stock Purchase Plan, health insurance, and a 401(k) plan.
The Compensation Committee establishes the compensation of each officer principally by considering the average compensation for officers in similar positions with 30 companies in the semiconductor, software, and CAE industries that have annual revenues between $100 million and $999 million (Reference Group). The purpose of monitoring the Reference Group is to provide a stable and continuing frame of reference for compensation decisions. Most of the companies in the Reference Group are included in the Nasdaq Electronic Component Stocks index (see "Company Stock Performance" below). The composition of the Reference Group is subject to change from year to year based on the Committee's assessment of comparability, including the extent to which the Reference Group reflects changes occurring within Actel and in the industry as a whole. Actel's policy is to have officer compensation near the average of the Reference Group.
After analyzing Reference Group base salaries and comparing them with the base salaries of Actel's officers, the Compensation Committee determines an annual salary increase budget. In January 2003, the Committee approved no changes to base salary.
Under Actel's Executive Bonus Plan for 2003, incentive cash payments were based on Actel's profitability (pro-forma profit before tax). The profitability objective was established in the Executive Bonus Plan on a sliding scale, so that the percentage achievement was determinable objectively at the end of the year. In 2003, Actel achieved profitability above the minimum level required by the Executive Bonus Plan's profitability objective. The measure of performance was then multiplied by the target bonus under the Plan, which was 60% of base salary for each Executive officer (other than the Chief Executive Officer). The result was bonus payments to Executive officers (other than the Chief Executive Officer) for 2003 that averaged approximately 11.2 % of base salary. Bonuses were paid under the Executive Bonus Plan in January 2004. The Compensation Committee believes that the payment of bonuses for 2003 was appropriate in light of Actel's operating results.
Actel believes that executive officers should hold substantial, long-term equity stakes in Actel so that the interests of executive officers will correspond with the interests of the shareholders. As a result, stock or stock options constitute a significant portion of the compensation paid by Actel to its officers. After analyzing the practices of the Reference Group, the Compensation Committee determines an annual budget for option grants to Actel's employees and officers. In granting stock options to officers, the Compensation Committee considers a number of factors, such as the officer's position, responsibility, and equity interest in Actel, and evaluates the officer's past performance and future potential to influence the long-term growth and profitability of Actel. After taking these considerations into account, the Compensation Committee granted to Messrs. East, Hamdy, Indaco, Kish, and Mubarak in 2003 the options to purchase shares of Common Stock shown on the "Option Grants" table. All of such options were granted at the value of Actel's Common Stock on the date of grant.
o Compensation of Chief Executive Officer
The Compensation Committee generally uses the same factors and criteria described above in making compensation decisions regarding the Chief Executive Officer. In 2003, Mr. East's annual base salary remained at $381,894. Mr. East's 2003 bonus was determined under Actel's Executive Bonus Plan in the manner described above (except that his target bonus was 90% of his base salary) and resulted in a payment of $63,929, or approximately 16.7% of his base salary.
o Deductibility of Executive Compensation
Beginning in 1994, the Internal Revenue Code limited the federal income tax deductibility of compensation paid to Actel's chief executive and to each of the other four most highly compensated executive officers. For this purpose, compensation can include, in addition to cash compensation, the difference between the exercise price of stock options and the value of the underlying stock on the date of exercise. Actel may deduct compensation with respect to any of these individuals only to the extent that during any fiscal year such compensation does not exceed $1 million or meets certain other conditions (such as shareholder approval). Considering Actel's current compensation plans and policy, Actel and the Compensation Committee believe that, for the near future, there is little risk that Actel will lose any significant tax deduction relating to executive compensation. If the deductibility of executive compensation becomes a significant issue, Actel's compensation plans and policy will be modified to maximize deductibility if the Compensation Committee determines that such action is in the best interests of Actel.
Jacob S. Jacobsson Robert G. Spencer
Company Stock Performance
The following graph shows a comparison of cumulative total return for our Common Stock, The Nasdaq Stock Market (US), and Nasdaq Electronic Component Stocks. In preparing the graph, it was assumed that (i) $100 was invested on December 31, 1998, in our Common Stock, The Nasdaq Stock Market (US), and Nasdaq Electronic Component Stocks and (ii) all dividends were reinvested. This information shall not be deemed to be "filed" with the Securities and Exchange Commission or subject to Regulations 14A or 14C or to the liabilities of Section 18 of the Securities Exchange Act of 1934.
Comparison of Cumulative Total Return [OBJECT OMITTED]
The closing sale price of our Common Stock on December 31, 2003, was $23.82. The closing sale price of our Common Stock on March 12, 2004, was $22.00.
ITEM 12.
ITEM 12. SECURITY OWNERSHIP OF CERTAIN BENEFICIAL OWNERS AND MANAGEMENT
Securities Authorized for Issuance under Equity Compensation Plans
The following table summarizes as of January 4, 2004, the number of securities to be issued upon the exercise of outstanding derivative securities (options, warrants, and rights); the weighted-average exercise price of the outstanding derivative securities; and the number of securities remaining available for future issuance under our equity compensation plans.
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(1) Consists of 309,925 shares available for issuance under our 1986 Incentive Stock Option Plan, 500,000 shares available for issuance under our 2003 Director Stock Option Plan, and 862,559 shares available for issuance under our ESPP. On January 31, 2004, 216,537 shares were issued under our ESPP, leaving 646,022 shares available for issuance.
(2) Does not include 959,512 shares added to our 1986 Incentive Stock Option on January 5, 2004, under the annual replenishment provisions of the Plan.
(3) Consists of options granted and available for issuance under our 1995 Employee and Consultant Stock Plan.
(4) Includes information for options assumed in connection with mergers and acquisitions. As of January 5, 2004, a total of 88,437 shares of Common Stock with a weighted-average exercise price of $19.60 were issuable upon exercise of such outstanding options.
Summary of 1995 Employee and Consultant Stock Plan
The 1995 Employee and Consultant Stock Plan (1995 Plan) was adopted by our Board of Directors on March 6, 1995. The purposes of the 1995 Plan are to attract and retain the best available personnel for employee and consultant positions, to provide additional incentive to such persons, and to thereby promote the success of our business. Options granted under the 1995 Plan are nonstatutory stock options. The 1995 Plan is not a qualified deferred compensation plan under Section 401(a) of the Code nor is it subject to ERISA.
o Administration; Eligibility; Terms of Options; Exercise of Options
The 1995 Plan is administered by the Compensation Committee of the Board (Administrator). Options under the 1995 Plan may be granted as the Administrator determines, in its discretion, only to employees or consultants who are not directors or officers. Each option granted under the 1995 Plan is subject to a written stock option agreement. The agreement sets forth the terms and conditions of such grants, including the schedule under which the option becomes exercisable and the exercise price of the option. An option is exercised when the optionee gives written notice specifying the number of full shares of Common Stock to be purchased and tenders payment of the purchase price. Funds received by us upon exercise of an option are used for general corporate purposes.
o Termination of Status as Employee or Consultant
If the optionee's status as an employee or consultant terminates for any reason (other than as a result of death), the optionee may, within the period of time set forth in the stock option agreement, exercise any option granted under the 1995 Plan, but only to the extent such option was exercisable on the date of such termination. To the extent that the option is not exercised within such period, the option terminates. If the optionee's status as an employee or consultant terminates as a result of death, the optionee's legal representative may exercise the entire option at any time within 12 months following the date of death. To the extent that the option is not exercised within such 12-month period, the option terminates. An option is not transferable by the optionee, other than by will or the laws of descent and distribution, and is exercisable during the optionee's lifetime only by the optionee.
o Adjustments; Dissolution; Mergers and Asset Sales
In the event any change, such as a stock split or dividend, is made in our capitalization that results in an increase or decrease in the number of outstanding shares of our Common Stock without receipt of consideration, an appropriate adjustment will be made in the number of shares under the 1995 Plan and the price per share covered by each outstanding option. In the event of a dissolution or liquidation, all outstanding options will terminate immediately prior to the consummation of such action. In the event of a merger with or into another corporation or a sale of all or substantially all of our assets, each outstanding option will be assumed or an equivalent option substituted by the successor corporation. If the successor corporation refuses to assume such options or to substitute equivalent options, each outstanding option will become fully vested and exercisable.
o Amendment and Termination
The Board may amend or terminate the 1995 Plan at any time, but any such action will not adversely affect any stock option then outstanding under the 1995 Plan without the consent of the holder of the option. The 1995 Plan will terminate on July 19, 2012, unless earlier terminated as described above.
Security Ownership of Certain Beneficial Owners
The following table sets forth certain information regarding the beneficial ownership of our Common Stock by each person who we believe owned beneficially more than 5% of our outstanding shares as of December 31, 2003:
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(1) Calculated as a percentage of shares of our Common Stock outstanding as of December 31, 2003.
(2) As reported by the beneficial owner as of December 31, 2003, in a Schedule 13G filed with the Securities and Exchange Commission (SEC) on February 13, 2004. The reporting person, which is a parent holding company, has direct and indirect investment advisor subsidiaries that advise one or more open or closed-end investment companies or other managed accounts. Franklin Advisers, Inc., an indirect wholly owned investment advisory subsidiary of the reporting person, has sole voting and dispositive powers with respect to 889,400 shares of Common Stock. Fiduciary Trust Company International, an investment advisory subsidiary of the reporting person, has sole voting and dispositive powers with respect to 521,850 shares of Common Stock. The two affiliates of the reporting person reported the securities over which they hold investment and voting power separately from each other because such powers are exercised independently from each other, the reporting person, and all other investment advisor subsidiaries of the reporting person.
(3) As reported by the beneficial owner in a Schedule 13G filed with the Securities and Exchange Commission (SEC) on February 4, 2004. The reporting person, which is a parent holding company, has sole voting power with respect to 1,026,848 shares of Common Stock, shared voting and dispositive power with respect to 233,240 shares of Common Stock, and sole dispositive power with respect to 1,010,668 shares of Common Stock. The reporting person and direct or indirect subsidiaries beneficially own all of the shares in their various fiduciary capacities. As a result, another entity in every instance is entitled to dividends or proceeds of sale. The reporting person, on behalf of itself and its direct and indirect subsidiaries (including Mellon Bank, N.A., which is a bank as defined in Section 3(a)(6) of the Securities Exchange Act of 1934 (Exchange Act)), disclaims that the filing of the Schedule 13G is an admission of beneficial ownership of any such shares for the purposes of Section 13(d) or 13(g) of the Exchange Act.
(4) As reported by the beneficial owner as of December 31, 2003, in a Schedule 13G (Amendment No. 3) filed with the SEC on February 13, 2004. The reporting person has sole voting power with respect to 124,803 shares of Common Stock, shared voting power with respect to 1,636,400 shares of Common Stock, and shared dispositive power with respect to 2,206,722 shares of Common Stock. The reporting person, which is an investment company and a parent holding company, owns 100% of Neuberger Berman, LLC and Neuberger Berman Management Inc. Neuberger Berman, LLC is an investment advisor and broker/dealer with discretion. Neuberger Berman Management Inc. is an investment advisor to a Series of Public Mutual Funds. Neuberger Berman Genesis Fund Portfolio, a series of Equity Managers Trust, beneficially owns 1,591,200 shares of Common Stock. Neuberger Berman, LLC serves as sub-adviser and Neuberger Berman Management Inc. serves as investment manager of Neuberger Berman Genesis Fund Portfolio, which holds such shares in the ordinary course of its business and not with the purpose of changing or influencing the control of the issuer. The balance of the shares with respect to which the reporting person has shared voting power is held by Neuberger Berman's various other Funds. Neuberger Berman, LLC is the sub-advisor to such Funds. Neuberger Berman, LLC also has the sole power to vote the shares of many unrelated clients. The clients are the actual owners of those shares and have the sole right to receive and the power to direct the receipt of dividends from or proceeds from the sale of such shares. The balance of the shares with respect to which the reporting person has shared dispositive power is for individual client accounts.
Security Ownership of Management
The following table sets forth certain information regarding the beneficial ownership of our Common Stock as of March 1, 2004, by (i) each director, (ii) each officer named in the Summary Compensation Table, and (iii) all directors and officers as a group:
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* Less than one percent.
(1) Except as indicated in the footnotes to this table and pursuant to applicable community property laws, the persons and entities named in the table have sole voting and sole investment power with respect to all shares of Common Stock beneficially owned.
(2) Calculated as a percentage of shares of Common Stock outstanding as of March 1, 2004.
(3) Includes for each indicated director and officer shares issuable pursuant to stock options that are exercisable within 60 days after the Record Date: for Mr. East, 235,428 shares; for Mr. Fiebiger, 11,250 shares; for Mr. Hamdy, 87,123 shares; for Mr. Indaco, 223,186 shares; for Mr. Jacobsson, 20,000 shares; for Mr. Kish, 153,748 shares; for Mr. Mubarak, 149,796 shares; for Mr. Spencer, 32,500 shares; and for all directors and officers as a group, 1,229,249 shares.
Changes in Control
We know of no arrangements that may result in a change in control of Actel.
ITEM 13.
ITEM 13. CERTAIN RELATIONSHIPS AND RELATED TRANSACTIONS
None.
ITEM 14.
ITEM 14. PRINCIPAL ACCOUNTANT FEES AND SERVICES
Audit Fees
The aggregate fees billed for professional services rendered by our auditors, Ernst & Young LLP, for the most two recent fiscal years consisted of the following:
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(1) Consists of tax-related services performed in connection with the preparation of state and federal tax returns, as well as other tax consulting matters, including an analysis regarding the realizability of net operating losses we acquired in our purchase of GateField Corporation. The completion of the net operating loss analysis resulted in a reclassification from goodwill to net deferred tax assets. See Note 2 of Notes to Consolidated Financial Statements for more information.
(2) Includes $90,000 in fees for services performed in connection with the preparation of state and federal tax returns.
(3) Includes $94,508 in fees for services performed in connection with the preparation of state and federal tax returns.
Audit Committee's Pre-Approval Policies and Procedures
Our Audit Committee pre-approves all audit and permissible non-audit services provided by our independent auditors. These services may include audit services, audit-related services, tax services, and other services. Pre-approval is generally provided for up to one year and any pre-approval is detailed as to the particular service or category of services and is generally subject to a specific budget. The independent auditors and management are required to periodically report to the Audit Committee regarding the extent of services provided by the independent auditors in accordance with this pre-approval. The Audit Committee may also pre-approve particular services on a case-by-case basis. In addition, the Audit Committee has delegated to its Chairman the authority to pre-approve audit and permissible non-audit services, provided that any such pre-approval decision is presented to the full Audit Committee at its next scheduled meeting. All audit, audit-related, and tax services for our 2002 fiscal year rendered by Ernst & Young following the enactment of the Sarbanes-Oxley Act of 2002 and all audit, audit-related, and tax services rendered by Ernst & Young for our 2003 fiscal year were pre-approved by the Audit Committee.
PART IV
ITEM 15.
ITEM 15. EXHIBITS, FINANCIAL STATEMENT SCHEDULE AND REPORTS ON FORM 8-K
(a) The following documents are filed as part of this Annual Report on Form 10-K:
(1) Financial Statements. The following consolidated financial statements of Actel Corporation included in our 2002 Annual Report are incorporated by reference in Item 8 of this Annual Report on Form 10-K:
Consolidated balance sheets at December 31, 2003 and 2002
Consolidated statements of operations for each of the three years in the period ended December 31, 2003
Consolidated statements of shareholders' equity and other comprehensive income/(loss) for each of the three years in the period ended December 31, 2003
Consolidated statements of cash flows for each of the three years in the period ended December 31, 2003
Notes to consolidated financial statements
(2) Financial Statement Schedule. The financial statement schedule listed under 15(d) hereof is filed with this Annual Report on Form 10-K.
(3) Exhibits. The exhibits listed under Item 15(c) hereof are filed with, or incorporated by reference into, this Annual Report on Form 10-K.
(b) Reports on Form 8-K.
On October 22, 2003, we announced our financial results for the quarter ended October 5, 2003. The full text of the press release issued in connection with the announcement was attached as Exhibit 99.1 to our Current Report on Form 8-K (Item 9 pursuant to Item 12) furnished to the SEC on October 22, 2003.
On October 17, 2003, we entered into a Preferred Stock Rights Agreement (Rights Agreement) with Wells Fargo Bank, MN N.A., as Rights Agent, and announced that our Board of Directors had adopted a Shareholder Rights Plan. Under the Shareholder Rights Plan, our Board of Directors declared a dividend of one right (Right) to purchase one one-thousandth (0.001) of one share of our Series A Participating Preferred Stock (Series A Preferred) for each outstanding share of our Common Stock. The dividend is payable on November 10, 2003 (Record Date) to shareholders of record as of the close of business on that date. Each Right entitles the registered holder to purchase from Actel one one-thousandth (0.001) of a share of Series A Preferred at an exercise price of $220.00, subject to adjustment. The full text of the press release issued in connection with the announcement was attached as Exhibit 99.1 and the full text of the Rights Plan was attached as Exhibit 4.1 to our Current Report on Form 8-K (Items 5 and 7) filed with the SEC on October 24, 2004.
(c) Exhibits. The following exhibits are filed as part of, or incorporated by reference into, this Report on Form 10-K:
Exhibit Number Description
3.1 Restated Articles of Incorporation, as amended (filed as Exhibit 3.1 to the Registrant's Annual Report on Form 10-K (File No. 0-21970) for the fiscal year ended January 5, 2003).
3.2 Restated Bylaws (filed as Exhibit 3.1 to the Registrant's Annual Report on Form 10-K (File No. 0-21970) for the fiscal year ended January 5, 2003).
3.3 Certificate of Amendment to Certificate of Determination of Rights, Preferences and Privileges of Series A Participating Preferred Stock of Actel Corporation (filed as Exhibit 3.3 to the Registrant's Registration Statement on Form 8-A (File No. 000-2197), filed on October 24, 2003).
4.1 Preferred Stock Rights Agreement, dated as of October 17, 2003, between the Registrant and Wells Fargo Bank, MN N.A., including the Certificate of Amendment of Certificate to Determination, the form of Rights Certificate and the Summary of Rights attached thereto as Exhibits A, B, and C, respectively (filed as Exhibit 4.1 to the Registrant's Registration Statement on Form 8-A (File No. 000-2197), filed on October 24, 2003).
10.1 (1) Form of Indemnification Agreement for directors and officers (filed as Exhibit 10.1 to the Registrant's Registration Statement on Form S-1 (File No. 33-64704), declared effective on August 2, 1993).
10.2 (1) 1986 Incentive Stock Option Plan, as amended and restated (filed as Exhibit 10.1 to the Registrant's Quarterly Report on Form 10-Q (File No. 0-21970) for the fiscal quarter ended July 7, 2002).
10.3 (1) 2003 Director Stock Option Plan (filed as Exhibit 4.4 to the Registrant's Registration Statement on Form S-8 (File No. 333-112215), declared effective on January 26, 2004).
10.4 (1) Amended and Restated 1993 Employee Stock Purchase Plan (filed as Exhibit 10.4 to the Registrant's Annual Report on Form 10-K (File No. 0-21970) for the fiscal year ended January 5, 2003).
10.5 1995 Employee and Consultant Stock Plan, as amended and restated (filed as Exhibit 10.2 to the Registrant's Quarterly Report on Form 10-Q (File No. 0-21970) for the fiscal quarter ended July 7, 2002).
10.6 (1) Employee Retention Plan, as amended and restated (filed as Exhibit 10.6 to the Registrant's Annual Report on Form 10-K (File No. 0-21970) for the fiscal year ended January 6, 2002).
10.7 (1) Deferred Compensation Plan, as amended and restated (filed as Exhibit 10.7 to the Registrant's Annual Report on Form 10-K (File No. 0-21970) for the fiscal year ended December 31, 2000).
10.8 Form of Distribution Agreement (filed as Exhibit 10.13 to the Registrant's Registration Statement on Form S-1 (File No. 33-64704), declared effective on August 2, 1993).
10.9 Patent Cross License Agreement dated April 22, 1993 between the Registrant and Xilinx, Inc. (filed as Exhibit 10.14 to the Registrant's Registration Statement on Form S-1 (File No. 33-64704), declared effective on August 2, 1993).
10.10 Manufacturing Agreement dated February 3, 1994 between the Registrant and Chartered Semiconductor Manufacturing Pte Ltd (filed as Exhibit 10.17 to the Registrant's Annual Report on Form 10-K (File No. 0-21970) for the fiscal year ended January 2, 1994).
10.11 Product Development and Marketing Agreement dated August 1, 1994, between the Registrant and Loral Federal Systems Company (filed as Exhibit 10.19 to the Registrant's Quarterly Report on Form 10-Q (File No. 0-21970) for the fiscal quarter ended October 2, 1994).
10.12 Foundry Agreement dated as of June 29, 1995, between the Registrant and Matsushita Electric Industrial Co., Ltd and Matsushita Electronics Corporation (filed as Exhibit 10.25 to the Registrant's Quarterly Report on Form 10-Q (File No. 0-21970) for the fiscal quarter ended July 2, 1995).
10.13 License Agreement dated as of March 6, 1995, between the Registrant and BTR, Inc. (filed as Exhibit 10.20 to the Registrant's Annual Report on Form 10-K (File No. 0-21970) for the fiscal year ended December 29, 1996).
10.14 Patent Cross License Agreement dated August 25, 1998, between Actel Corporation and QuickLogic Corporation. (filed as Exhibit 10.19 to the Registrant's Annual Report on Form 10-K (File No. 0-21970) for the fiscal year ended January 3, 1999).
10.15 Development Agreement by and between Actel Corporation and Infineon Technologies AG effective as of June 6, 2002 (filed as Exhibit 10.19 to the Registrant's Annual Report on Form 10-K (File No. 0-21970) for the fiscal year ended January 5, 2003).
10.16 Supply Agreement by and between Actel Corporation and Infineon Technologies AG effective as of June 6, 2002 (filed as Exhibit 10.20 to the Registrant's Annual Report on Form 10-K (File No. 0-21970) for the fiscal year ended January 5, 2003).
10.17 Office Lease Agreement for the Registrant's facilities in Mountain View, California, dated February 27, 2003 (filed as Exhibit 10.21 to the Registrant's Annual Report on Form 10-K (File No. 0-21970) for the fiscal year ended January 5, 2003).
14 Code of Ethics for Principal Executive and Senior Financial Officers.
21 Subsidiaries of Registrant.
23 Consent of Ernst & Young LLP, Independent Auditors.
24 Power of Attorney.
31.1 Certification of Chief Executive Officer pursuant to Rule 13a-14(a) (17 CFR 240.13a-14(a)), as adopted pursuant to Section 302 of the Sarbanes-Oxley Act of 2002.
31.2 Certification of Chief Financial Officer pursuant to Rule 13a-14(a) (17 CFR 240.13a-14(a)), as adopted pursuant to Section 302 of the Sarbanes-Oxley Act of 2002.
32 Certification of Chief Executive Officer and Chief Financial Officer pursuant to 18 U.S.C. Section 1350, as adopted pursuant to Section 906 of the Sarbanes-Oxley Act of 2002.
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(1) This Exhibit is a management contract or compensatory plan or arrangement.
(d) Financial Statement Schedule. The following financial statement schedule of Actel Corporation is filed as part of this Report on Form 10-K and should be read in conjunction with the Consolidated Financial Statements of Actel Corporation, including the notes thereto, and the Report of Independent Auditors with respect thereto:
All other schedules for which provision is made in the applicable accounting regulations of the Securities and Exchange Commission are not required under the related instructions or are inapplicable and therefore have been omitted.
SIGNATURES
Pursuant to the requirements of Section 13 or 15(d) of the Securities Exchange Act of 1934, the Registrant has duly caused this report to be signed on its behalf by the undersigned, thereunto duly authorized.
ACTEL CORPORATION
Date: March 17, 2004 By: /s/ John C. East ------------------------------------- John C. East President and Chief Executive Officer
Pursuant to the requirements of the Securities Exchange Act of 1934, this Annual Report on Form 10-K has been signed below by the following persons on behalf of the Registrant and in the capacities and on the dates indicated.
SCHEDULE II
ACTEL CORPORATION
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Valuation and Qualifying Accounts