ITEM 1. BUSINESS.
GENERAL
Altera Corporation, referred to as "we," "us" or "our," designs, manufactures and markets programmable logic devices, or PLDs, and associated development tools. Programmable logic devices are semiconductor integrated circuits that our customers can program using our proprietary software, which operates on personal computers and engineering workstations. Founded in 1983, we were one of the first suppliers of complementary metal oxide semiconductor, or CMOS, programmable logic devices and are currently a global leader in this market. We offer a broad line of CMOS programmable logic devices that address high-speed, high-density and low-power applications. Our products serve a wide range of markets, including telecommunications, data communications, electronic data processing and industrial applications.
STRATEGY
Three principal types of digital integrated circuits are used in most electronic systems: microprocessors, memory and logic. Microprocessors are used for control and computing tasks, memory is used to store programming instructions and data, and logic is used to manage the interchange and manipulation of digital signals within a system. While system designers employ a relatively small number of standard architectures to meet their microprocessor and memory needs, they require a wide variety of logic circuits to differentiate their end products.
According to Dataquest, the CMOS logic market consists of the following segments:
- Semi-custom or application-specific integrated circuits, or ASICs
- Standard logic
- Full custom devices
- Other forms of logic integrated circuits, including chipsets
The ASIC segment is comprised of programmable logic, gate arrays and cell-based integrated circuits (also referred to as standard cells). In a broad sense, all of these devices are indirectly competitive as they generally may be used in the same types of applications in electronic products. However, differences in cost, performance, density, flexibility, ease-of-use and time-to-market dictate the extent to which they may be directly competitive for particular applications.
Programmable logic's primary advantage is that it allows for quicker design cycles, meeting customers' needs for quick time-to-market. Programmable logic allows customers to experiment and iterate their designs in a relatively short amount of time and with minimum cost. In most instances, this is quicker and easier than achieving a design in a deterministic fashion. This advantage is amplified by the ability to have working silicon at the time the design is finalized.
Another advantage of programmable logic is that, particularly for small volume applications, it lowers the per unit cost of producing customized components. While programmable logic inherently consumes more silicon (because of its general application and on-chip programming overhead), in many cases, depending on the complexity of the design and total unit requirements, this higher per unit cost is more than offset by the high fixed costs of layout and mask-making required to produce a custom integrated circuit. Further, because unprogrammed PLDs are standard devices, we, our distributors and subcontract manufacturers -- not our customers -- hold stocks of inventory, thereby enhancing the cost advantage of PLDs for our customers.
Our strategy is to compete with other companies in the ASIC segment of the CMOS logic market by providing a total solution for our customers' programming logic needs. To accomplish this goal, we offer our customers:
- PLDs with the speed, density and package types to meet their specific needs
- State-of-the-art development tools that are easy to use and compatible with other industry standard electronic design automation, or EDA, tools
- Optimized system-level megafunctions to speed their design process
- A complete customer support system
We have been able to introduce new product families that, as compared to their predecessors, provide more functionality at a much lower price for any given density because high-volume manufacturing and emerging process technologies have resulted in cost decreases. We believe these new product families achieve the integration, density, performance and cost advantages of other ASIC solutions. We believe that our competitiveness within the ASIC segment in these areas, along with the inherent advantages of programmable logic discussed above, will enable us to compete for designs traditionally served by other ASIC devices.
PRODUCTS
We sell a wide range of products, with a total of more than 1,000 product options among our PLD families. We offer PLDs in two fundamental technologies: our MAX(R) products, which use floating-gate process technology, and our FLEX(R), APEX(TM), ACEX(TM) and Excalibur(TM) products, which use static random access memory, or SRAM, process technology. Our proprietary development tools, the MAX+PLUS(R) II and Quartus(TM) II software, provide design development and programming support for our PLDs. We also offer hardware used in programming PLDs.
Devices:
We offer a wide range of general-purpose PLD families. Each device family offers unique features as well as differing density and performance specifications for implementing particular applications. Some of our major device families include the following:
MAX 7000, MAX 7000S, MAX 7000A and MAX 7000B: The MAX 7000, MAX 7000S, MAX 7000A and MAX 7000B device families are among the fastest and most widely used high-density programmable logic families in the industry. Devices in these families range from 600 to 10,000 usable gates and up to 256 pins and provide several enhanced features, including support for the industry standard Joint Test Action Group boundary-scan test, or BST, circuitry and in-system programmability, or ISP. ISP functionality allows devices to be programmed after they are soldered onto the printed circuit board, thereby minimizing the possibility of lead damage or electrostatic discharge exposure when reprogrammed. The MAX 7000 device families, which includes the 5.0-V MAX 7000 devices and the 5.0-V, ISP-based MAX 7000S devices, the 3.3-V MAX 7000A device family and what we believe is the industry's fastest programmable logic solution, the 2.5-V MAX 7000B device family, are fabricated on advanced CMOS electrically erasable programmable read-only memory, or EEPROM, processes, providing a high-density, high-speed, I/O-intensive programmable logic solution. Devices in these families are supported by our MAX+PLUS II development software.
MAX 3000A: The MAX 3000A devices, which are targeted at high volume, low cost applications, range from 600 to 5,000 usable gates and up to 158 pins. The MAX 3000A devices include support for BST circuitry and ISP, are fabricated on advanced CMOS EEPROM processes and are supported by our MAX+PLUS II development software.
FLEX 8000: The SRAM-based FLEX 8000 device family uses our patented FastTrack(R) Interconnect structure, a continuous routing structure that allows for fast, predictable interconnect delays. Devices in this family range from 2,500 to 16,000 usable gates and up to 304 pins. FLEX 8000 devices have a 5.0-V supply voltage, can interface with 3.3-V devices through the MultiVolt(TM) I/O feature, provide low standby power and are supported by our MAX+PLUS II development software.
FLEX 6000: Our SRAM-based FLEX 6000 family delivers the flexibility and time-to-market advantage of programmable logic at prices that are competitive with gate arrays. Devices in this family range from 10,000 to 24,000 usable gates and up to 256 pins and include devices that operate at both 5.0-V and 3.3-V supply voltages. Featuring the very efficient OptiFLEX(R) architecture, FLEX 6000 devices provide a flexible and cost-effective alternative to gate arrays for high-volume production. Every feature in the OptiFLEX architecture is targeted at producing maximum performance and utilization in the smallest possible die area. Devices in this family are supported by our MAX+PLUS II and Quartus II development software.
FLEX 10K, FLEX 10KA and FLEX 10KE: Our SRAM-based FLEX 10K, FLEX 10KA and FLEX 10KE device families offer a combination of logic and embedded memory on a single-chip architecture. Devices in these PLD families range from 10,000 to 250,000 usable gates and up to 672 pins. With these high densities, the 5.0-V FLEX 10K, the 3.3-V FLEX 10KA and the 2.5-V FLEX 10KE families may be used to address the increasing levels of integration needed to accommodate today's complex designs. The FLEX 10K family includes 0.5- and 0.42-micron devices, the FLEX 10KA family includes 0.35- and 0.3-micron devices and the FLEX 10KE family includes 0.25- and 0.22-micron devices. Devices in these families are supported by our MAX+PLUS II development software.
APEX 20K, APEX 20KE and APEX 20KC: Our SRAM-based APEX 20K, APEX 20KE and APEX 20KC device families offer complete system-level integration on a single device, and the APEX 20KC is the first PLD family utilizing copper for all layers of metal interconnect. Devices in these families range from 30,000 to over 1.5 million usable gates and up to 1,020 pins. With high densities and performance enhancements, the APEX 20K, APEX 20KE and APEX 20KC families deliver the latest in design flexibility and efficiency for high-performance, system-on-a-programmable-chip, or SOPC, design. APEX 20K devices, which operate at a 2.5-V supply voltage, and the
APEX 20KE and APEX 20KC devices, which operate at a 1.8-V supply voltage, employ the innovative MultiCore(TM) architecture, which combines the strengths of our look-up table, product term block and enhanced embedded memory block structures. The APEX 20K, APEX 20KE and APEX 20KC devices are supported by our Quartus II development software.
ACEX 1K: Our SRAM-based ACEX 1K device family, which combines look-up tables and embedded array blocks, offers complete system-level integration on a single device. Devices in this family range from 10,000 to 100,000 usable gates and up to 484 pins. Operating at 2.5-V supply voltage, the ACEX 1K devices are supported by our MAX+PLUS II development software.
EXCALIBUR EMBEDDED PROCESSOR SOLUTIONS: The Excalibur solutions consist of three embedded processor families, our Nios(TM) soft core embedded processor solution, the ARM(R)-based embedded processor solution and the MIPS-based(TM) embedded processor solution. Our Nios soft core embedded processor, which was available in August 2000 and is supported by our Quartus II development software, is the industry's first reduced instruction set computer, or RISC, embedded processor commercially released by a major PLD vendor as a viable alternative to discrete processor solutions. The ARM-based embedded processor PLD family uses technology licensed from ARM Limited and will consist of multiple devices that each contain an ARM-based RISC processor core. The MIPS-based embedded processor PLD family uses technology licensed from MIPS Technologies, Inc. and will consist of multiple devices that each contain a MIPS-based RISC processor core. We expect the ARM-based and MIPS-based embedded processor PLD families to be available in the first half of 2001.
Development Tools:
Customers use our development system software and hardware to design and implement logic designs on our PLDs. Our MAX+PLUS II and Quartus II software development tools run under the Microsoft Windows-based operating environments on personal computers in addition to the UNIX environment on SUN, HP and IBM workstations. We also provide interfaces to many industry-standard EDA tools, including those offered by Cadence Design Systems, Inc., Mentor Graphics Corporation, Synopsys, Inc. and Synplicity, Inc. We also sell hardware for programming our PLDs.
In January 2001, we released the Quartus II development software, which we believe delivers superior designer productivity and supports system-level designs and integration with third-party tools.
MARKETING, SALES AND CUSTOMERS
We market our products in the United States, Canada, Europe, Asia, South America and Australia through a network of direct sales personnel and electronics distributors. In the United States and Canada, we also rely on a network of independent sales representatives. From time to time, we expect that we may add or delete independent sales representatives or distributors from our selling organization as we deem appropriate to the level of business.
Throughout the United States, we have domestic sales management offices in major metropolitan areas. Our direct sales personnel and independent sales representatives focus on major strategic accounts. Distributors generally focus selling activities on the broad base of small- and medium-size customers, as well as demand fulfillment services to our major strategic accounts. Our distributor in the United States currently is Arrow Electronics, Inc. In 2000, Arrow acquired Wyle Electronics, which also had served as one of our domestic distributors. Arrow is responsible for creating customer demand from its base of customers, providing technical support and other value-added services and filling customers' orders.
Our international business is supported by a network of distributors throughout Europe, Asia, South America and Australia. We have representation in every major European country, Israel, Australia, South America and various countries throughout the Pacific Rim. In addition, we maintain international sales support offices in the metropolitan areas of Oosterhout (Netherlands), Helsinki, Hong Kong, Hsinchu (Taiwan), London, Ottawa, Paris, Seoul, Shanghai, Stockholm, Stuttgart, Tokyo and Turin.
Customer support and service are important aspects of selling and marketing our products. We provide several levels of technical user support, including applications assistance, design services and customer training. Our applications engineering staff publishes data sheets and application notes, conducts technical seminars and provides design assistance via Internet and electronic links to the customer's design station. In 2000, we expanded our customer support services by establishing an Applications Engineering Center near San Diego, California to provide technical support to our customers. Customer service is supported with inventory maintained both by us and at distributors' locations to provide short-term delivery of chips.
Through 2000, all international sales were denominated in U.S. dollars. Our international sales are subject to those risks common to all international activities, including governmental regulation, possible imposition of tariffs or other trade barriers and currency fluctuations.
In the year ended December 31, 2000, worldwide sales through distributors accounted for over 95% of total sales. In 2000, two distributors accounted for more than 10% of sales; one accounted for 58% of sales, and the other accounted for 11% of sales. In 1999, three distributors
accounted for more than 10% of sales. These three distributors accounted for 34%, 19% and 13% of sales, whereas in 1998, they accounted for 30%, 21% and 11% of sales. The percentage increase for our largest distributor in 2000 compared to previous years is attributable to the combination of Arrow and Wyle, our two largest distributors in 1999 and 1998. No single end customer accounted for more than 10% of our sales in 2000, 1999 or 1998. International sales constituted 43% of sales in 2000, 44% of sales in 1999 and 45% of sales in 1998.
For a detailed description of our sales by geographic region, see Item 7 and Note 14 to our consolidated financial statements.
COMPETITION
The ASIC Segment:
The ASIC segment of the CMOS logic market is comprised of programmable logic, gate arrays and cell-based integrated circuits (also referred to as standard cells). In a broad sense, all of these devices are indirectly competitive as they generally may be used in the same types of applications in electronic products. However, differences in cost, performance, density, flexibility, ease-of-use and time-to-market dictate the extent to which they may be directly competitive for particular applications. As PLDs have increased in density and performance and decreased in cost, they have become more directly competitive with other ASICs, especially gate arrays. With the introduction of our FLEX 10K family and new APEX 20K, APEX 20KE and APEX 20KC device families, which are our highest density PLDs, along with our FLEX 6000 devices, which are designed and priced to be very competitive with lower density gate arrays, we seek to grow by directly competing with other companies in the ASIC segment. Many of the companies in the ASIC segment have substantially greater financial, technical and marketing resources than we do. We cannot assure you that we will be successful in competing in the ASIC segment of the CMOS logic market.
The Programmable Logic Sub-Segment:
The principal factors of competition in the programmable logic sub-segment of the ASIC market include:
- The capability of software development tools and system-level functional programming blocks
- Product performance and features
- Quality and reliability
- Pricing
- Technical service and support
- The ability to respond rapidly to technical innovation
- Customer service
We believe that we compete favorably with respect to these factors and that our proprietary device architecture and our installed base of development systems with proprietary software may provide some competitive advantage. However, as is true of the semiconductor industry as a whole, the PLD sub-segment is intensely competitive and is characterized by rapid technological change, rapid rates of product obsolescence and price erosion resulting from both product obsolescence and price competition. All of these factors may influence our future operating results.
We experience significant direct competition from other companies that are in the programmable logic sub-segment. Our competition in this market sub-segment is from suppliers of products that are marketed as either field-programmable gate arrays, or FPGAs, or complex PLDs, or CPLDs. In the high density CPLD market, we directly compete primarily with Xilinx, Inc. and Lattice Semiconductor Corporation.
Companies that currently compete with us in our core business may have preferred vendor status with many of our customers, extensive marketing power, name recognition and other significant advantages over us. Additionally, the semiconductor industry as a whole includes many large domestic and foreign companies that have substantially greater financial, technical and marketing resources than we do. We expect that as the dollar volume of the programmable logic sub-segment grows, the attractiveness of this sub-segment to larger, more powerful competitors will continue to increase. Substantial direct or indirect competition could have a material adverse effect on our future sales and operating results.
MANUFACTURING
Wafer Supply:
We do not directly manufacture our silicon wafers. Our wafers are produced using various semiconductor foundry wafer fabrication service providers. This enables us to take advantage of these suppliers' high volume economies of scale, as well as direct and more timely access to advancing process technology.
We presently have our primary wafer supply arrangements with two semiconductor vendors: Taiwan Semiconductor Manufacturing Company, or TSMC, and Sharp Corporation. We may negotiate additional foundry contracts and establish other sources of wafer supply for our products as such arrangements become economically useful or technically necessary. Although there are a number of new state-of-the-art wafer fabrication facilities currently under construction around the world, semiconductor foundry capacity can become limited quickly and without much notice. Furthermore, since only newer fabrication or substantially retrofitted facilities are able to manufacture wafers that incorporate leading-edge technologies, any significant decrease in capacity of these facilities would have a material adverse effect on our ability to obtain wafer supply for our newer products. Accordingly, we cannot assure you that any shortage in foundry manufacturing capacity will not result in production problems for us in the future.
In December 2000, we sold our 23% equity ownership interest in WaferTech, LLC to a subsidiary of TSMC for approximately $350 million in cash. WaferTech was formed in 1996 as a joint venture among us, TSMC and several other partners to build and operate a wafer manufacturing plant in Camas, Washington. As a result of the sale, we were released from all of our obligations under the operating agreement. We expect WaferTech to continue to supply wafers to us through TSMC. Accordingly, we do not believe that the sale of our ownership interest in WaferTech will have an adverse effect on our ability to obtain sufficient quantities of wafers in the future.
We depend upon our foundry vendors to produce wafers at acceptable yields and to deliver them to us in a timely manner. The manufacture of advanced CMOS semiconductor wafers is a highly complex process, and we have from time to time experienced difficulties in obtaining acceptable yields and timely deliveries from our suppliers. Good production yields are particularly important to our business, including our ability to meet customers' demand for products and to maintain profit margins. Wafer production yields are dependent on a wide variety of factors, including the level of contaminants in the manufacturing environment, impurities in the materials used and the performance of personnel and equipment. As is common in the semiconductor industry, we have experienced and expect to experience production yield problems from time to time. Difficulties in production yields can often occur when we begin production of new products or transition to new processes. These difficulties can potentially result in significantly higher costs and lower product availability. For example, in the second quarter of 1999, difficulties with a vendor's manufacturing process limited the availability of packaging material (piece parts) used in certain of our new and proprietary FineLine BGA(TM), or ball-grid array, packages causing limited production. This in turn limited shipments of our new FLEX 10KE product family. Our management expects to continue to introduce new and established products using new process technologies, and we may encounter similar start-up difficulties during the transition to such process technologies.
Further, production throughput times vary considerably among our wafer suppliers, and we may experience delays from time to time in processing some of our products which also may result in higher costs and lower product availability. We expect that, as is customary in the semiconductor business, in order to maintain or enhance our competitive position, we will continue to convert our fabrication process arrangements to larger wafer sizes, smaller circuit geometries and more advanced process technologies. Such conversions entail inherent technological risks that can adversely affect yields, costs and delivery lead time. In addition, if for any reason we were required to seek alternative sources of supply, shipments could be delayed significantly while such sources are qualified for volume production, and any significant delay could have a material adverse effect on our operating results.
Testing and Assembly:
After wafer manufacturing is completed, each wafer is tested using a variety of test and handling equipment. Such wafer testing is accomplished at Sharp, TSMC and our San Jose pilot line facility, which is used primarily for new product development. This testing is performed on equipment owned by us and consigned to the vendors.
Resulting wafers are shipped to various Asian assembly suppliers, where good die are separated into individual chips that are then encapsulated in ceramic or plastic packages. As is the case with our wafer supply business, we employ a number of independent suppliers for assembly purposes. This enables us to take advantage of subcontractor high volume manufacturing, related cost savings, speed and supply flexibility. It also provides us with timely access to cost-effective advanced process and package technologies. We purchase almost all of our assembly services from AMKOR (Korea and the Philippines), ASAT (Hong Kong), ASE (Malaysia) and Fujitsu (Japan).
Following assembly, each of the packaged units receives final testing, marking and inspection prior to shipment to customers. We obtain almost all of our final test and back-end operation services from AMKOR, ASAT and ASE. Final testing by these assembly suppliers is
accomplished through the use of our proprietary test software and hardware, which is consigned to or owned by such suppliers and/or third-party commercial testers. These suppliers also handle shipment of the products to our customers or distributors.
Additionally, almost all of the manufacturing, assembly, testing and packaging of our development system hardware products are performed by outside contractors. Although our wafer fabrication, assembly and other subcontractors have not recently experienced any serious work stoppages, the economic, social and political situations in countries where certain subcontractors are located are unpredictable and can be volatile. Any prolonged work stoppages or other inability to manufacture and assemble our products would have a material adverse effect on our operating results. Furthermore, the risks of earthquakes or power shortages and economic risks, such as extreme currency fluctuations, adverse changes in tax laws, tariff or freight rates or interruptions in air transportation, could have a material adverse effect on our operating results.
BACKLOG
Our backlog of released orders as of December 31, 2000 was approximately $510.8 million as compared to approximately $309.4 million at December 31, 1999. Our backlog consists of original equipment manufacturer, or OEM, customer-released orders that are requested for delivery within the next six months and distributor orders that are requested for delivery within the next three months. We produce standard products that may be shipped from inventory within a short time after receipt of an order. Our business has been characterized by a high percentage of orders with near-term delivery schedules. At times, due to high demand and supply constraints in certain products, lead times can lengthen, causing an increase in backlog. However, orders constituting our current backlog are cancelable without significant penalty at the option of the purchaser, thereby decreasing backlog during periods of lower demand. In addition, distributor shipments are subject to price adjustments, and we defer recognition of revenue on shipments to distributors until the product is resold to the end customer. Historically, backlog has been a poor predictor of future customer demand. For all of these reasons, backlog as of any particular date should not be used as a predictor of sales for any future period.
Effective January 1, 2001, our policy for determining backlog will change from a six-month period for OEM customer-release orders to a three-month period. We do not expect that this change will have a material effect on our backlog, as our distributor orders accounted for over 98% of our backlog as of December 31, 2000.
RESEARCH AND DEVELOPMENT
Our total research and development activities have focused primarily on general-purpose programmable logic devices and on the associated development software and hardware. We have developed these related products in parallel to provide software support to customers upon device introduction. As a result of our research and development efforts, we have introduced a number of new PLD families, such as the FLEX 10KE, FLEX 10KA, MAX 3000A, MAX 7000A, MAX 7000B, APEX 20K, APEX 20KE, APEX 20KC and ACEX 1K device families. We have also redesigned a number of our products to accommodate their manufacture on new wafer fabrication processes. In 2001, we also released the Quartus II development tool, which is our fourth-generation software. Additionally, we typically release new versions of our proprietary software on a quarterly basis.
Our research and development expenditures were $178.7 million in 2000, $86.1 million in 1999 and $59.9 million in 1998. Excluding a $6.3 million one-time charge for acquired in-process research and development, our research and development expenditures in 2000 were $172.4 million. We have not capitalized research and development or software costs to date. We intend to continue to spend substantial amounts on research and development in order to continue to develop new products and achieve market acceptance for such products, particularly in light of the industry pattern of short product life cycles and increasing competition within the CMOS logic market. Even if such goals are accomplished, we cannot assure you that these products will achieve significant market acceptance. If we are unable to successfully define, develop and introduce competitive new products, and enhance our existing products, our future operating results would be adversely affected.
PATENTS AND LICENSES
We own numerous United States patents and have additional pending United States patent applications on our semiconductor products. Although our patents and patent applications may have value in discouraging competitive entry into our market segment, we cannot assure you that any valuable new patents will be granted to us, or that our patents will provide meaningful protection from competition. We believe that our future success will depend primarily upon the technical competence and creative skills of our personnel, rather than on our patents, licenses, or other proprietary rights.
We have in the past incurred, and in the future may continue to incur, litigation expenses to enforce our intellectual property rights against third parties. We cannot assure you that any such litigation would be successful or that our patents would be upheld if challenged.
In the normal course of business, we from time to time receive and make inquiries with respect to possible patent infringements. As a result of inquiries received from third parties, it may be necessary or desirable for us to obtain licenses relating to one or more of our current or future products. We cannot assure you that such licenses could be obtained, and, if obtainable, could be obtained on conditions which would not have a material adverse effect on our operating results. In addition, if patent litigation ensued, we cannot assure you that these third parties would not succeed in obtaining significant monetary damages or an injunction against the manufacture and sale of one or more of our product families.
DIRECTORS AND EXECUTIVE OFFICERS
Our directors and executive officers and their ages are as follows:
- ----------
(1) Member of Nominating Committee.
(2) Member of Compensation Committee.
(3) Member of Audit Committee.
All directors hold office until the next annual meeting of stockholders or until their successors have been elected and qualified. There are no family relationships between any of our directors or executive officers.
RODNEY SMITH has served as our Chairman of the Board of Directors since joining us in November 1983 and as our President and Chief Executive Officer from November 1983 to November 2000. Prior to November 1983, he held various management positions with Fairchild Semiconductor Corporation, a semiconductor manufacturer.
JOHN P. DAANE has served as our President and Chief Executive Officer since November 2000 and as one of our directors since December 2000. Prior to joining us, Mr. Daane spent 15 years at LSI Logic Corporation, a semiconductor manufacturer, most recently as Executive Vice President, Communications Products Group.
C. WENDELL BERGERE joined us in August 1995 as Vice President, General Counsel and Secretary. From 1993 to 1995, Mr. Bergere was Special Counsel at the law firm of Sheppard, Mullin, Richter & Hampton. From 1982 to 1993, he was Vice President, General Counsel and Secretary of The Perkin-Elmer Corporation, a producer of analytical and life science systems.
DENIS M. BERLAN joined us in December 1989 as Vice President, Product Engineering and was named Vice President, Operations and Product Engineering in October 1994. In January 1996, he was named Vice President, Operations. In January 1997, he was named Executive Vice President and Chief Operating Officer. He was previously employed by Advanced Micro Devices, Inc., or AMD, a semiconductor manufacturer, and by Lattice Semiconductor Corporation, a semiconductor manufacturer, in engineering management capacities.
ERIK CLEAGE joined us as International Marketing Manager in February 1986. He became Director, Japan and Asia Pacific Sales in April 1989, was appointed Vice President, Marketing in August 1990 and Senior Vice President, Marketing in January 1999. Previously, he was employed by AMD and Fairchild in various positions.
JOHN R. FITZHENRY joined us in May 1995 as Vice President, Human Resources. From February 1983 to May 1995, he was employed by Apple Computer, Inc., a manufacturer of personal computers, in various human resource management positions.
MICHAEL JACOBS joined us in January 2000 as Senior Vice President, Worldwide Sales. From April 1997 to January 2000, Mr. Jacobs was Vice President, North American Sales at Analog Devices, Inc., a semiconductor manufacturer, and from December 1985 to April 1997, he held various management positions at National Semiconductor Corporation, a semiconductor manufacturer.
LANCE M. LISSNER joined us in May 1998 as Vice President of Business Development and Investor Relations and was appointed Senior Vice President, Business Development in November 2000. Prior to that time, Mr. Lissner was a corporate officer of Measurex Corporation, a developer of computer-integrated measurement, control and information systems, where he was employed since 1973 and held various positions in sales, marketing, engineering, and business development.
NATHAN SARKISIAN joined us in June 1992 as Corporate Controller. He was appointed Vice President, Finance and Chief Financial Officer in August 1995 and Senior Vice President and Chief Financial Officer in March 1998. Prior to joining us, Mr. Sarkisian held various accounting and financial positions at Fairchild and at Schlumberger Limited, an oil field services company.
CHARLES M. CLOUGH has served as one of our directors since August 1997. In August 1997, Mr. Clough retired from his position as Chairman of the Board of Directors of Wyle Electronics, a distributor of semiconductor products and computer systems. From 1982 to 1997, Mr. Clough held various management positions at Wyle Electronics, including President, Chief Executive Officer and Chairman. Wyle Electronics was one of our authorized distributors in the United States prior to its acquisition by Arrow. Prior to joining Wyle Electronics, he had spent 27 years with Texas Instruments holding a number of management and executive positions relating to semiconductor operations, including the head of Bipolar operations, European Semiconductor group and worldwide marketing.
MICHAEL A. ELLISON has served as one of our directors since April 1984 and has been a private venture capital investor since November 2000. From October 1994 to October 2000, Mr. Ellison was the Chief Executive Officer of Steller, Inc., a distributor of electronic parts. From January 1982 to December 1992, he was a General Partner of Cable & Howse Ventures, a venture capital investment firm.
PAUL NEWHAGEN, one of our co-founders, has served as one of our directors since July 1987. In March 1998, Mr. Newhagen retired from his position as our Vice President, Administration, a position he had held since December 1994. From June 1993 to November 1994, he served as a consultant to us. From 1983 to 1993, Mr. Newhagen held various management positions with us, including Vice President of Finance and Administration, Chief Financial Officer and Secretary.
ROBERT W. REED has served as one of our directors since October 1994 and as our Vice Chairman of the Board of Directors since January 2001. In 1996, Mr. Reed retired from his position as Senior Vice President of Intel Corporation, a semiconductor manufacturer. From 1983 to 1991, Mr. Reed was Intel's Chief Financial Officer.
DEBORAH D. RIEMAN, PH.D., has served as one of our directors since May 1996. Dr. Rieman currently manages a private investment fund and consults to technology start-up companies. From July 1995 to May 1999, Dr. Rieman was the President and Chief Executive Officer of CheckPoint Software Technologies, Inc., an Internet security software company. Prior to joining CheckPoint, Dr. Rieman held various executive and marketing positions with Adobe Systems Inc., a computer software company, Sun Microsystems Inc., a computer networking company, and Xerox Corp., a diversified electronics manufacturer. Dr. Rieman also serves as a director of Corning Inc. and Alchemedia Corp.
WILLIAM E. TERRY has served as one of our directors since August 1994. Mr. Terry is a former director and Executive Vice President of the Hewlett-Packard Company, a diversified electronics manufacturing company. In 36 years at Hewlett-Packard, he held a number of senior management positions, including general manager of Hewlett-Packard's Data Products and Instrument Groups, and subsequently had overall responsibility for the Measurement Systems Sector. He retired from Hewlett-Packard in November 1993. Mr. Terry also serves as a director of Key Tronic Corporation.
EMPLOYEES
As of December 31, 2000, we had 1,947 regular employees. Our success is dependent in large part upon the continued service of our key management, technical, sales and support employees and on our ability to continue to attract and retain additional qualified employees. The competition for such employees is intense and the loss of key employees could have an adverse effect on us.
ITEM 2.
ITEM 2. PROPERTIES.
Our headquarters facility is located in San Jose, California on approximately 25 acres of land, which we purchased in June 1995. The campus for the headquarters facility currently consists of four interconnected buildings totaling approximately 500,000 square feet. Design, limited manufacturing, research, marketing and administrative activities are performed in these facilities. We plan to expand our headquarters facility by constructing a fifth building totaling approximately 135,000 square feet and a multi-level garage totaling approximately 260,000 square feet. We expect to commence construction of the multi-level garage in the first quarter of 2001, followed by construction of the fifth building. In 1998, we opened our 62,000 square foot design and test engineering facility in Penang, Malaysia and, in July 2000, we began construction of a 178,000 square foot facility on adjacent land. Both properties are situated on land leased on a long-term basis from the Penang Development Corporation. We also lease on a short-term basis office facilities for our domestic and international sales management offices and our European Technology Center (UK), Toronto Technology Center and Ottawa Technology Center. We believe that our existing facilities and planned future expansions are adequate for our current and foreseeable future needs.
ITEM 3.
ITEM 3. LEGAL PROCEEDINGS.
We are a party to lawsuits and may in the future become a party to lawsuits involving various types of claims, including, but not limited to, unfair competition and intellectual property matters. Legal proceedings tend to be unpredictable and costly and may be affected by events outside of our control. We cannot assure you that litigation will not have an adverse effect on our financial position or results of operations. Our major litigation matters as of December 31, 2000 are described below.
In June 1993, Xilinx, Inc. sued us for monetary damages and injunctive relief based on our alleged infringement of certain patents held by Xilinx. In June 1993, we sued Xilinx for monetary damages and injunctive relief based on Xilinx's alleged infringement of certain patents held by us. In April 1995, we filed a separate lawsuit against Xilinx in Delaware, Xilinx's state of incorporation, seeking monetary damages and injunctive relief based on Xilinx's alleged infringement of one of our patents. In May 1995, Xilinx counter-claimed against us in Delaware, asserting defenses and seeking monetary damages and injunctive relief based on our alleged infringement of certain patents held by Xilinx. Subsequently, the Delaware case was transferred to California. In October 1998, both parties filed motions for summary judgment with respect to certain issues in the first two cases regarding infringement or non-infringement and validity or invalidity of the patents at issue in the respective cases. In our suit, the court granted that one of our patents is invalid, granted that one patent is not infringed, and granted another patent is not literally infringed but denied non-infringement under the doctrine of equivalence. In October and November 2000, Xilinx's suit went to trial and Xilinx withdrew its claim against our MAX 5000, MAX 7000 and MAX 9000 family products. Upon completion of trial, the jury rendered a verdict that our FLEX 8000 family products infringe the two Xilinx patents and that the patents are valid. We have filed post trial motions to overturn the verdicts or to seek a new trial. In a press release dated November 17, 2000, Xilinx announced it will seek an injunction against us to stop all shipments of our "FLEX product" and our "derivative programmable logic devices" that Xilinx claims infringe the two Xilinx patents. The court ordered continued mediation following the jury verdict. Due to the nature of the litigation with Xilinx and because the Xilinx lawsuit has not yet reached the damages trial stage, our management cannot estimate the total expense, the possible loss, if any, or the range of loss that we may ultimately incur in connection with the verdict. Our management cannot ensure that Xilinx will not succeed in obtaining significant monetary damages or an injunction against the manufacture and sale of our products, including but not limited to our FLEX 8000 family products, or succeed in invalidating our other patents. Although we cannot make any assurances as to the results of these cases, we believe that the jury verdict is in error and intend to pursue our post trial motions with the court to reverse the verdict and will file an appeal if our motions are denied. We continue to believe that we have meritorious defenses to the claims asserted in the Xilinx suit and intend to continue to defend ourselves vigorously in this matter. The foregoing is a forward-looking statement subject to the risks and uncertainties of the legal proceedings, including events occurring during the post trial motions and appeals outside of our control and unpredictability as to its ultimate outcome.
In May 2000, we sued Xilinx, seeking monetary damages and injunctive relief based on Xilinx's alleged infringement of certain patents held by us. In July 2000, Xilinx filed a counterclaim against us alleging infringement of certain patents held by Xilinx. The court has issued an order setting the claim construction hearing for our claims in April 2001. Due to the nature of the litigation with Xilinx and because the lawsuit is still in the pre-trial stage, our management cannot estimate the total expenses, the possible loss, if any, or the range of loss that may ultimately be incurred in connection with the counterclaim allegations. Although we cannot make any assurances as to the results of this case, we believe that we have meritorious defenses to Xilinx's counterclaim and intend to pursue our claims and defend ourselves vigorously in this matter. The foregoing is a forward-looking statement subject to risks and uncertainties of the legal proceeding, including events occurring during litigation proceedings outside of our control and unpredictability as to its ultimate outcome.
In November 2000, Xilinx filed a complaint against us with the International Trade Commission, or ITC, to bar us from importing or selling products into the United States that Xilinx asserts infringe three Xilinx patents not previously asserted. Xilinx also requested a permanent cease and desist order and other penalties, as the ITC may deem appropriate. The ITC has commenced an investigation based on Xilinx's complaint. Due to the nature of the litigation with Xilinx and because the lawsuit is still in the pre-trial stage, our management cannot estimate the total expenses, the possible loss, if any, or the range of loss that may ultimately be incurred in connection with the claim allegations.
Although we cannot make any assurances as to the results of this case, we believe that we have meritorious defenses to Xilinx's claims and intend to defend ourselves vigorously in this matter. The foregoing is a forward-looking statement subject to risks and uncertainties of the legal proceeding, including events occurring during litigation proceedings outside of our control and unpredictability as to its ultimate outcome.
In August 1994, Advanced Micro Devices, Inc., or AMD, sued us seeking monetary damages and injunctive relief based on our alleged infringement of certain patents held by AMD. In September 1994, we answered the complaint asserting that we are licensed to use the patents which AMD claims are infringed and filed a counterclaim against AMD alleging infringement of certain patents held by us. In October 1997, upon completion of trials bifurcated from the infringement claims, the District Court ruled that we are licensed under all patents asserted by AMD in the suit. In December 1997, AMD filed a Notice of Appeal of the District Court's rulings. In April 1999, the Federal Circuit Court ruled in AMD's favor on its appeal, finding that we are not licensed to AMD's patents, and remanded the case back to the District Court for further proceedings. In 1999, Lattice Semiconductor Corporation entered into an agreement with AMD that includes assuming both the claims against us and the claims against AMD and has replaced AMD in the suit with Vantis, a wholly owned subsidiary of Lattice. Due to the nature of the litigation, our management cannot estimate the total expense, the possible loss, if any, or the range of loss that may ultimately be incurred in connection with the allegations. We cannot ensure that Lattice will not succeed in obtaining significant monetary damages or an injunction against the manufacture and sale of the Classic(TM), MAX 7000, FLEX 8000, MAX 9000 and FLEX 10K product families, or succeed in invalidating any of our patents remaining in the suit. Although we cannot make any assurances as to the results of this case, we intend to pursue our claims and defend ourselves vigorously in this matter. The foregoing is a forward-looking statement subject to risks and uncertainties of the legal proceeding, including the events occurring during litigation proceedings outside of our control and unpredictability as to its ultimate outcome.
In May 2000, we sued Lattice seeking monetary damages and injunctive relief based on Lattice's alleged infringement of certain patents held by us. In July 2000, Lattice filed a counterclaim against us alleging infringement of certain patents held by Lattice. Due to the nature of the litigation with Lattice and because the lawsuit is still in the pre-trial stage, our management cannot estimate the total expenses, the possible loss, if any, or the range of loss that may ultimately be incurred in connection with the counterclaim allegations. Although we cannot make any assurances as to the results of this case, we intend to pursue our claims and defend ourselves vigorously in this matter. The foregoing is a forward-looking statement subject to risks and uncertainties of the legal proceeding, including events occurring during litigation proceedings outside of our control and unpredictability as to its ultimate outcome.
In November 1999, we sued Clear Logic Inc. alleging that Clear Logic is unlawfully appropriating our registered mask work technology in violation of the federal mask work statute and that Clear Logic has unlawfully interfered with our relationships and contracts with our customers. The lawsuit seeks compensatory and punitive damages and an injunction to stop Clear Logic from unlawfully using our mask work technology and from interfering with our customers. Clear Logic has answered the complaint by denying that it is infringing our mask work technology and denying that it has unlawfully interfered with our relationships and contracts with our customers. Clear Logic has also filed a counterclaim against us for unfair competition under California law alleging that we have made false statements to our customers regarding Clear Logic. Due to the nature of the litigation with Clear Logic and because the lawsuit is still in the pre-trial stage, our management cannot estimate the total expenses, the possible loss, if any, or the range of loss that may ultimately be incurred in connection with the counterclaim allegations. Although we cannot make any assurances as to the results of this case, we intend to pursue our claims and defend ourselves vigorously in this matter. The foregoing is a forward-looking statement subject to risks and uncertainties of the legal proceeding, including events occurring during litigation proceedings outside of our control and unpredictability as to its ultimate outcome.
ITEM 4.
ITEM 4. SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS.
None.
PART II
ITEM 5.
ITEM 5. MARKET FOR REGISTRANT'S COMMON EQUITY AND RELATED STOCKHOLDER MATTERS.
The textual portion of the section entitled "About Your Investment" and the section entitled "Corporate Directory" in our 2000 Annual Report to Stockholders for the year ended December 31, 2000, or the 2000 Annual Report, are incorporated herein by reference.
We believe factors such as quarter-to-quarter variances in financial results, announcements of new products, new orders and order rate variations by us or our competitors could cause the market price of our common stock to fluctuate substantially. In addition, the stock prices for many high technology companies experience large fluctuations, which are often unrelated to the operating performance of the specific companies. Broad market fluctuations, as well as general economic conditions such as a recessionary period or high interest rates, may adversely affect the market price of our common stock.
ITEM 6.
ITEM 6. SELECTED FINANCIAL DATA.
The section entitled "Selected Consolidated Financial Data" in our 2000 Annual Report is incorporated herein by reference.
ITEM 7.
ITEM 7. MANAGEMENT'S DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND RESULTS OF OPERATIONS.
The following Management's Discussion and Analysis of Consolidated Financial Condition and Consolidated Results of Operation, as well as information contained elsewhere in this Report, contains statements that constitute "forward-looking statements" within the meaning of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934. These statements include statements regarding the intent, belief or current expectations of us, our directors or our officers with respect to, among other things: (1) the ability of our product offerings to compete in the ASIC market, (2) the competitive advantages of our products, (3) the outcome of current litigation in which we are involved and (4) the expected success of our new product lines. The success of our business operations is, in turn, dependent on factors such as market acceptance of our current and future products, our ability to timely and continually introduce new products and make our current products better, the ability of our subcontractors to manufacture, assemble, test and ship products efficiently and on a timely basis, our ability to obtain sufficient quantities of wafers to meet demand, general competitive conditions within the semiconductor industry and general economic conditions as set forth under "Future Events; Risk Factors" below and elsewhere in this Report. Forward-looking statements are not guarantees of future performance and involve risks and uncertainties and actual results may differ materially from those projected in the forward-looking statements as a result of various factors.
OVERVIEW
We design, manufacture and market high-performance, high-density, programmable logic devices and associated computer aided engineering logic development tools. Programmable logic devices are semiconductor chips that may be programmed on-site, using software tools that run on personal computers or engineering workstations. User benefits include ease of use, lower risk and fast time-to-market. Our CMOS-based programmable logic devices address high-speed, high-density and low-power applications in the telecommunications, data communications, computer peripheral and industrial markets. FLEX and APEX products are our SRAM-based line of embedded array programmable logic devices, and MAX products are our line of EEPROM- and EPROM-based macrocell programmable logic devices.
We classify our products into the following categories. All prior year data have been restated to reflect the following compositions:
- New products consist of APEX 20KE, APEX 20KC, MAX 7000B, ACEX 1K, Excalibur families
- Mainstream products include MAX 7000A, MAX 3000A, FLEX 6000, FLEX 10KA, FLEX 10KE, APEX 20K families
- Mature and other products include Classic, MAX 5000, MAX 7000, MAX 7000S, MAX 9000, FLEX 8000, FLEX 10K and FLASHlogic(R) families, Tools, MPLDs, configuration devices and Northwest Logic design services
In general, customers prefer products with lower supply voltages because they use less power and dissipate less heat, normally resulting in lower overall system cost. Lower supply voltages result from more advanced fabrication processes and yield higher performance at a lower cost. Thus, supply voltage correlates with product maturity: lower supply voltages represent newer products.
RESULTS OF OPERATIONS
SALES | Sales were $1,376.8 million in 2000, $836.6 million in 1999 and $654.3 million in 1998. Sales increased 64.6% in 2000 from 1999 and 27.9% in 1999 from 1998. Increases in sales, in both years, were primarily due to higher unit sales in all product categories. The increases in sales were partially offset by decreases in average unit selling prices.
Sales of New products, which began shipping during the fourth quarter of 1999, were $52.1 million in 2000 and marginal in 1999. Sales of Mainstream products were $656.1 million, 158.8% higher than 1999 sales of $253.6 million. Sales of Mature and other products were $668.6 million, 14.7% higher than 1999 sales of $583.0 million.
As a percentage of sales, New products, mostly introduced in 2000, represented 3.8% of sales in 2000. Mainstream products represented 47.6% of sales in 2000 as compared to 30.3% in 1999 and 12.1% in 1998. Mature and other products represented 48.6% of sales in 2000 as compared to 69.7% in 1999 and 87.9% in 1998.
Our New and Mainstream products have been developed and introduced to the marketplace over the last several years. These products have similar or improved features and comparable or higher densities than their predecessors, but advanced process technology enables us to produce these products at a lower cost than previous generations of products. Consistent with their lower cost structure, we have priced these products at a significant discount to our more mature products in order to stimulate demand and broaden the appeal of programmable logic. As a result, we experienced a shift in customer demand to our newer, lower-priced offerings from the more mature products. New and Mainstream products were 51.4% of total sales in 2000 as compared to 30.3% in 1999 and 12.1% in 1998.
Our management believes that lower prices on our newer product families will enable our product offering to compete more favorably with gate array and standard cell technologies, which represent significant market opportunities. During 2000, additional unit sales more than offset the lower selling prices and our management believes that over time this will continue, but we cannot assure you that this will occur. In 2000, unit sales of Mainstream products increased 284.6%, while average unit selling prices decreased 32.7%.
In October 1999, we sold to Cypress Semiconductor Corporation the exclusive right to manufacture, market and sell our MAX 5000 programmable logic device product family and our equity interest in Cypress Semiconductor (Texas), Inc. We recorded a pre-tax gain of $10.3 million. The sale of the MAX 5000 family did not materially affect our fiscal year 2000 revenues. Excluding the MAX 5000 product family, sales grew 66.5% in 2000 and 29.8% in 1999.
Year over Year Sales Growth by Product Category:
Customer Sectors
During 2000, we experienced strong sales in the communications market segment driven primarily by the networking and telecommunications sectors. The communications market segment represented 67.2% of our business in 2000 as compared to 66.3% in 1999 and 64.0% in 1998. The electronic data processing market segment was 17.3% of sales in 2000 as compared to 15.8% in 1999 and 17.4% in 1998. The industrial market segment was 10.4% percent of sales in 2000 as compared to 11.4% in 1999 and 12.2% in 1998. The consumer market segment was 2.0% in 2000 as compared to 3.0% in 1999 and 2.8% in 1998, and other markets were 3.1% in 2000 as compared to 3.5% in both 1999 and 1998. Our management believes that future revenue growth will be driven by product demand in the communications market segment, but we cannot assure you that this will occur.
Geographic Areas
North America sales were $786.8 million in 2000, 67.6% higher than 1999 sales of $469.4 million. International sales included sales in Europe, Japan and Asia Pacific and were $590.0 million in 2000, 60.7% higher than $367.2 million in 1999. During 2000, sales in Europe were $300.2 million, an increase of 87.6% from $160.0 million in 1999. In Japan, sales were $206.9 million, an increase of 30.6% from $158.5 million in 1999 and sales in Asia Pacific were $82.9 million, an increase of 70.1% from $48.7 million in 1999.
In 1999, North America sales grew 30.8% from 1998, while sales in Europe grew 7.1%, Japan grew 33.9% and Asia Pacific grew 75.9%. Sales for 1999 in total grew 27.9% primarily due to strength in North American and Japanese networking and telecommunications sectors.
As a percentage of total sales, sales in North America, Europe and Asia Pacific increased, while sales in Japan declined in 2000 compared to 1999. North America sales increased to 57.1% of sales from 56.1% in 1999 and 54.9% in 1998, Europe increased to 21.8% from 19.1% in 1999 and was 22.8% in 1998, Asia Pacific increased to 6.0% from 5.8% in 1999 and 4.2% in 1998, while Japan decreased to 15.1% from 19.0% in 1999 and 18.1% in 1998.
Year over Year Sales Growth by Geographic Area:
Major items in the statements of operations, expressed as a percentage of sales, were as follows:
GROSS MARGIN | Gross margin, as a percentage of sales, was 66.1% in 2000, 64.0% in 1999 and 61.9% in 1998. The increases in gross margin were primarily attributable to cost reductions as a result of manufacturing process improvements.
Yields on newer, lower voltage products continued to improve for the year ended December 31, 2000. This includes improvements in the APEX 20K, APEX 20KE, FLEX 10KE and FLEX 10KA product families. We continue to spend a significant amount of financial resources to improve production yields on both new and established products. Difficulties in production yields can occur when we begin production of new products, transition to new processes or when our principal wafer supplier, TSMC, moves production of a product from one manufacturing plant to another. These difficulties can potentially result in significantly higher costs and lower product availability. For example, from the fourth quarter of 1999 through the first half of 2000, process control issues associated with WaferTech's volume ramp up resulted in low die yields on FLEX 10KA and FLEX 10KE products leading to reduced product availability in these families. As a result, we were unable to support distributor stocking at desired levels and in some cases could not meet end customer demand. Our management expects to continue to introduce new and established products using new process technologies and may encounter similar start-up difficulties during the transition to such process technologies. Further, production throughput times vary considerably among our wafer suppliers, and we may experience delays from time to time in processing some of our products which also may result in higher costs and lower product availability.
RESEARCH AND DEVELOPMENT EXPENSES | Research and development expenses for the year ended December 31, 2000 were $178.7 million, or 13.0% of sales, compared to $86.1 million, or 10.3% of sales in 1999 and $59.9 million, or 9.1% of sales in 1998. For the year ended December 31, 2000, excluding the $6.3 million one-time acquired in-process research and development charge, research and development expenses were $172.4 million, or 12.5% percent of sales. Historically, the level of research and development expenses as a
percentage of sales has fluctuated in part due to the timing of the purchase of masks and wafers used in the development of new products. We expect that, in the long term, research and development expenses will increase in absolute dollars primarily due to our efforts to develop new products. Research and development expenses include expenditures for labor, masks, prototype wafers, the amortization of deferred stock-based compensation resulting from acquisitions, and expenses for the development of process technology, new packages, and software to support new products and design environments.
Excluding the one-time charge, research and development expenses increased $86.3 million, or 100.2% in 2000 and $26.2 million, or 43.7% in 1999. The increases in absolute dollars were primarily a result of increased headcount, additional spending on masks, prototype wafers, package development and the development of our Quartus software and Excalibur embedded processor solutions. During 2000, we recorded deferred stock-based compensation of $41.3 million for the acquisitions of DesignPRO Inc. and Right Track CAD Inc. which is being amortized to research and development expense over a period of two to four years. Amortization of deferred stock-based compensation included in research and development expenses was $8.3 million for the year ended December 31, 2000.
We expect to continue to make significant investments in the development of APEX 20K, APEX 20KE, APEX 20KC, Quartus software, Excalibur embedded processor solutions and future products. During the first quarter of 1999, we shipped APEX 20K, a new family of devices, and Quartus, our new fourth generation software design tool. During the fourth quarter of 1999, we began shipping our APEX 20KE family of devices. The rollout of the 1.8-volt APEX 20KE product family progressed further during the second quarter of 2000, during which time we began shipping four new devices including the APEX EP20K1500E, the highest density programmable device available in commercial quantities. The APEX 20KE family offers advanced features over the APEX 20K family including lower power consumption, faster performance, expanded I/O support and smaller die sizes. APEX 20K and APEX 20KE devices utilize a new architecture for programmable logic and address higher density designs. APEX 20K and APEX 20KE devices are supported exclusively by our Quartus software. Also during the second quarter of 2000, we announced our new Excalibur embedded processor solutions. Excalibur solutions combine programmable logic, memory and a processor core, allowing users to integrate an entire system on a single programmable logic device. These solutions provide programmable flexibility and system-level integration while bringing advanced processor technology to the broad marketplace. Furthermore, during the fourth quarter of 2000 and the first quarter of 2001, we released upgraded versions of our Quartus software which provide improved place-and-route technology and enhanced device support. Our management expects APEX 20K and APEX 20KE devices, Quartus software and Excalibur solutions to be successful in the marketplace; however, the commercial success of these products depends on market acceptance of the use of APEX 20K and APEX 20KE devices in high-density designs, as well as the acceptance of the Quartus design software and Excalibur solutions. We cannot assure you that any of our products will achieve market acceptance.
We also continue to focus our efforts on the development of new programmable logic chips, related development software and hardware and advanced semiconductor wafer fabrication processes. However, we cannot assure you that we will accomplish our goals in the development and subsequent introduction of new products and manufacturing processes. Also, we cannot assure you that our new products will achieve market acceptance, that the new manufacturing processes will be successful, or that our suppliers will provide us with the quality and quantity of wafers and materials that we require. We must continue to develop and introduce new products in a timely manner to help counter the semiconductor industry's historical trend of declining prices as products mature.
SELLING, GENERAL AND ADMINISTRATIVE EXPENSES | Selling, general and administrative expenses for the year ended December 31, 2000 were $210.0 million, or 15.2% of sales, compared to $143.2 million, or 17.1% of sales in 1999 and $113.2 million, or 17.3% of sales in 1998. Although total selling, general and administrative expenses increased, they decreased as a percentage of sales because of strong revenue growth. Selling, general and administrative expenses include salary expenses related to field sales, marketing and administrative personnel, commissions and incentive expenses, advertising and promotional expenditures, and legal expenses. Selling, general and administrative expenses also include costs related to the direct sales force and field application engineers who work in over forty field sales offices worldwide and stimulate demand by assisting customers in the use and proper selection of our products. The customers then work with our distributors for order fulfillment and logistical requirements, as over 95% of our sales are made through distributors. Our management intends to continue to increase sales resources in markets and regions where it anticipates this will increase sales, enhance competitive position or improve customer service.
Selling, general and administrative expenses increased $66.8 million, or 46.6% in 2000 and $30.0 million, or 26.5% in 1999. The increases in absolute dollars were mainly driven by increased headcount for sales, marketing and administration personnel, higher advertising and legal expenses, and higher commission and incentive expenses associated with increased sales.
IN-PROCESS RESEARCH AND DEVELOPMENT | During 2000, we recorded a non-recurring charge of $6.3 million to in-process research and development related to the purchase of DesignPRO and Right Track. We determined this non-recurring charge using valuation techniques generally used by appraisers in the high-technology industry. We immediately expensed this non-recurring charge in the period of acquisition because technological feasibility had not been established and no alternative use had been identified. See Note 5.
INCOME FROM OPERATIONS | Income from operations was $521.2 million, or 37.9% of sales, for the year ended December 31, 2000 compared to $306.0 million, or 36.6% of sales in 1999 and $231.8 million, or 35.5% of sales in 1998. The year over year increases in operating income, as a percentage of sales, were primarily due to improvements in gross margin and a decrease in selling, general and administrative expenses, partially offset by increased research and development expenses.
INTEREST AND OTHER INCOME, NET | Interest and other income was $46.1 million, or 3.4% of sales for the year ended December 31, 2000 compared to $37.1 million, or 4.4% of sales in 1999 and $12.3 million, or 1.9% of sales in 1998. For the year ended December 31, 1999, interest and other income included a one-time pre-tax gain of $10.3 million from the sale of the MAX 5000 family and our equity interest in Cypress Semiconductor (Texas), Inc. Excluding the one-time gain, interest and other income was $26.8 million, or 3.2% of sales. Excluding the one-time gain, the increase from 1999 to 2000, in both absolute dollars and as a percentage of sales, was primarily due to the increase in interest income related to higher investment balances and higher interest rates. Interest and other income consists mainly of interest income on investments in high-quality fixed income securities.
In 1998, interest and other income included interest expense related to the convertible subordinated notes issued in June 1995 that was comprised of interest expense and amortization of debt issuance costs, net of capitalized interest related to the construction of our new headquarters. In June 1998, the subordinated notes were converted into common stock resulting in a decrease in interest expense during that year. No interest expense has been incurred since the conversion.
PROVISION FOR INCOME TAXES | Our effective tax rate was 33.2% in 2000 and 32.5% in 1999 and 1998. Excluding the one-time gain on the sale of WaferTech, which was taxed at our marginal rate, our effective tax rate for 2000 was 31.0%. The reduction of the effective tax rate, excluding the one-time gain, primarily resulted from a change in the geographic source of income.
EQUITY INVESTMENT | In June 1996, we formed WaferTech, LLC, a joint venture company, with TSMC and several other partners to build and operate a wafer manufacturing plant in Camas, Washington. In return for a $140.4 million cash investment, we received an 18% equity ownership in WaferTech and certain obligations and rights to procure up to 27% of WaferTech's output at market prices. In January 1999, we purchased from Analog Devices, Inc. an additional 5% equity ownership interest in WaferTech for approximately $37.5 million, increasing our ownership interest to 23%. This increased investment in WaferTech provided us with additional obligations and rights to procure up to 35% of WaferTech's future output. In October 1999, the partners in WaferTech contributed $100.0 million in additional equity to support capital expansion plans and working capital requirements of WaferTech. Our share of that contribution was $23.0 million; we maintained our same ownership interest and rights to acquire WaferTech's output. We accounted for our investment under the equity method based on our ability to exercise significant influence over WaferTech's operating and financial policies.
On December 27, 2000, we sold our 23% ownership interest in WaferTech to a subsidiary of TSMC for $350.4 million in cash. The one-time pre-tax gain on the sale of WaferTech was $178.1 million. For the year ended December 31, 2000, our equity in the loss of WaferTech was $1.4 million as compared to a loss of $7.6 million in 1999 and $10.4 million in 1998.
WaferTech began production of silicon wafers in October 1998 and achieved volume production in 1999. In past years, WaferTech had experienced lower than forecast production yields resulting in lower than forecast output. During the year ended December 31, 2000, WaferTech's production volumes and yields increased over the prior year and met our targeted levels. Although we sold our equity interest in WaferTech in December 2000, we expect to continue utilizing WaferTech as one of our suppliers of silicon wafers.
FUTURE RESULTS; RISKS FACTORS | In addition to other information contained elsewhere in this Report, the following important factors, among others, have affected and, in the future, could affect, our actual results of operations and could cause our actual results to differ materially from those expressed in forward-looking statements made by us.
Our financial results depend on our ability to compete successfully in the highly competitive semiconductor industry.
Our industry is intensely competitive. Future operating results will depend on our ability to develop, manufacture and sell complex semiconductor components and programming software that offer customers greater value than solutions offered by competing vendors. We may not succeed in developing, manufacturing or selling competitive products. We are developing programmable chips for applications that are presently served by other ASIC vendors. Many of these vendors have substantially greater financial, technical and marketing resources than we do and have well-established market positions and a solution that has been proven technically feasible and economically competitive over several decades. We cannot assure you that we will be successful in displacing ASIC vendors in the targeted applications and densities. Furthermore, other programmable logic vendors are targeting these applications and may be successful in securing market share from us. Moreover, our customers increasingly use standard cell technologies to achieve greater integration in their systems; this may not only impede our efforts to penetrate the ASIC market, but may also displace our products in the applications that we presently serve.
Our future success depends on our ability to define, develop and sell new products.
As a semiconductor company, we operate in a dynamic market characterized by rapid product obsolescence. We continue to focus our efforts on developing new programmable logic chips, related development software and hardware and advanced semiconductor wafer fabrication processes. We cannot assure you that we will be able to continue to develop and introduce new products and manufacturing processes or that our products and processes will achieve market acceptance or be successful. If we do not successfully define, develop and introduce competitive new products and enhance existing products in response to both evolving demands of the marketplace and competitive product offerings, our future operating results could be adversely affected.
We depend on independent subcontractors, located primarily in Asia, for the supply and quality of our finished silicon wafers.
We depend significantly upon subcontractors to manufacture silicon wafers and assemble, test and ship product to end customers. We also depend on all of our subcontractors, and especially our principal foundry partner, TSMC, to improve process technologies in a timely manner to enhance our product designs and cost structure. Our success depends, in part, on TSMC's ability to remain successful in its highly competitive industry. Their inability to do so could have a severe negative impact on us. The vast majority of our products are manufactured and shipped to customers by subcontractors located in Asia, principally Hong Kong, Japan, Korea, Malaysia, the Philippines and Taiwan. Disruptions or adverse supply conditions arising from market conditions, political strife, labor disruptions and other factors could adversely affect our future results. Market demand for silicon wafers increased significantly through the third quarter of 2000, while supply of such wafers increased at a much slower rate. This resulted in a firmer pricing environment, less responsiveness to requests for expedited delivery by wafer suppliers, and in some cases, unsatisfied demand. In general, the lead time to increase market wafer supply by building additional wafer fabrication facilities is approximately two years and in periods where demand for wafers increases rapidly for a prolonged period, market shortages tend to occur. We believe that under circumstances of wafer scarcity it is important to have close business relationships with wafer suppliers in order to receive the desired quantity of product. We believe that we enjoy close working relationships with our principal wafer supplier, TSMC. In the latter half of 2000, business conditions changed. Our management no longer believes demand exceeds the foundry industry's ability to supply silicon wafers. Our management further believes that the foundry's ability to supply our desired quantity of silicon wafers will remain through at least the first half of 2001. However, we cannot assure you that we will succeed in securing our total desired output from TSMC or that the possibility of future wafer scarcity will not impair or prevent any future growth of our business.
Natural or man-made disasters, normal process fluctuations and variances in manufacturing yields could have a severe negative impact on our operating capabilities. For example, in September 1999, a major earthquake struck Taiwan resulting in widespread physical damage and loss of life. The earthquake halted wafer fabrication production at our primary vendor, TSMC, for several days and then only limited production began. Nearly two weeks passed before full production resumed, and a portion of the inventory in the production process was scrapped as a result of damage incurred during the earthquake. We have sought to diversify our operating risk by obtaining silicon wafers manufactured by WaferTech, located in Camas, Washington. WaferTech began production of silicon wafers in October 1998 and achieved volume production in 1999. In past quarters, WaferTech had experienced lower than forecast production yields resulting in lower than forecast output. During 2000, WaferTech's production volumes and yields increased over prior periods and met our targeted levels. Although we sold our equity interest in WaferTech in December 2000, we expect to continue utilizing WaferTech as one of our suppliers of silicon wafers. See also "Manufacturing -- Wafer Supply" in Part I of this Report for additional factors related to wafer supply that may affect our operating results.
We depend on independent subcontractors for the assembly and testing of our semiconductor products.
Although our assembly and other subcontractors have not recently experienced any serious work stoppages, the economic, social and political situations in countries where certain subcontractors are located are unpredictable and can be volatile. Any political strife, prolonged work stoppages or other inability to manufacture and assemble our products would have a material adverse effect on our operating results.
We may be unable to adequately protect our intellectual property rights and may face significant future litigation expenses.
We own numerous patents and patent applications and have technology licensing agreements giving us rights to design, manufacture and package products using certain patents owned by others. We cannot assure you that our intellectual property rights will provide meaningful protection from competition or that we will rely on such rights in developing additional products. We may be unable to adequately protect our intellectual property rights and may face significant future litigation expenses. We have in the past incurred, and in the future may continue to incur, litigation expenses to enforce our intellectual property rights against third parties. We cannot assure you that any such litigation would be successful or that our patents would be upheld if challenged.
In the normal course of business, we from time to time receive and make inquiries with respect to possible patent infringements. As a result of inquiries received from third parties, it may be necessary or desirable for us to obtain licenses relating to one or more of our current or future products. We cannot assure you that such licenses could be obtained, and, if obtainable, could be obtained on conditions which would not have a material adverse effect on our operating results. In addition, if patent litigation ensued, we cannot assure you that these third parties would
not succeed in obtaining significant monetary damages or an injunction against the manufacture and sale of one or more of our product families.
The results of present litigation could adversely affect our operating results.
We are a party to lawsuits and may in the future become a party to lawsuits involving various types of claims, including, but not limited to, unfair competition and intellectual property matters. Legal proceedings tend to be unpredictable and costly and may be affected by events outside of our control. There is no assurance that litigation will not have an adverse effect on our financial position or results of operations. Our major litigation matters are described under Item 3 and Note 13.
We depend on international sales for a significant portion of our revenue.
During each of the last three years, international sales constituted nearly half of our total sales. Risks related to our foreign operations include government regulation of exports, tariffs and other potential trade barriers, adverse changes in tax laws, freight costs or interruptions in air transportation, reduced protection for intellectual property rights in some countries, and generally longer receivable collection periods. Our business is also subject to the risks associated with the imposition of legislation and regulations relating specifically to the import or export of semiconductor products. We cannot predict whether quotas, duties, taxes or other charges or restrictions will be imposed by the United States or other countries upon the importation or exportation of our products in the future or what, if any, effect such actions would have on our financial condition and results of operations.
Our financial results are affected by the cyclical nature of the semiconductor industry.
The semiconductor industry is highly cyclical. In the past, the semiconductor industry has been subject to significant downturns as a result of diminished demand for semiconductor products, general reductions in semiconductor inventory levels by customers, excess production capacity and accelerated declines in average selling prices. If these or other conditions in the semiconductor industry occur in the future, there could be an adverse effect on our operating results.
Our quarterly operating results may fluctuate.
Our quarterly operating results may fluctuate in the future as a result of a number of factors, including:
- The cyclical nature of the semiconductor industry
- The cyclical nature of demand for our customers' products
- General economic conditions in the countries where we sell our products
- Price competition
- The timing of our and our competitors' new product introductions
- Product obsolescence
- The scheduling, rescheduling and cancellation of large orders by our customers
- Our ability to develop new process technologies and achieve volume production at the foundries of TSMC, Sharp or WaferTech
- Changes in manufacturing yields
- Adverse movements in exchange rates, interest rates or tax rates
- The availability of adequate supply commitments from our wafer foundries and assembly and test subcontractors
Our future success depends on our ability to successfully compete with other technology firms in attracting and retaining key technical and management personnel.
Our future success depends in large part upon the continued service of our key management, technical, sales and support employees and on our ability to continue to attract and retain additional qualified employees. The competition for such employees is intense and the loss of key employees could have an adverse effect on our operating results.
Our stock price may be subject to significant volatility.
In recent years, the stock market has experienced extreme price volatility and the price of our common stock has been subject to wide fluctuations. The overall stock market, the prices of semiconductor stocks in general and the price of our stock may continue to fluctuate greatly. We believe that factors such as quarter-to-quarter variances in financial results, announcements of new products, new orders and order rate variations by us or our competitors could cause the market price of our common stock to fluctuate substantially. In addition, the stock prices for many high technology companies experience large fluctuations, which are often unrelated to the operating performance of the specific companies. Broad market fluctuations, as well as general economic conditions such as a recessionary period or high interest rates, may adversely affect the market price of our common stock.
NEW ACCOUNTING PRONOUNCEMENTS | In June 1998, the Financial Accounting Standards Board, or FASB, issued Statement of Financial Accounting Standards No. 133, or SFAS No. 133, "Accounting for Derivative Instruments and Hedging Activities." SFAS No. 133 establishes standards for accounting and reporting on derivative instruments for periods beginning after June 15, 2000. SFAS No. 133 requires that all derivative instruments be recognized in the balance sheet as either assets or liabilities and measured at fair value. Furthermore, SFAS No. 133 requires current recognition in earnings of changes in the fair value of derivative instruments depending on the intended use of the derivative and the resulting designation. In June 2000, the FASB issued SFAS No. 138, "Accounting for Derivative Instruments and Hedging Activities - An Amendment of SFAS No. 133." SFAS No. 138 amends the accounting and reporting standards for certain derivatives and hedging activities. Our adoption of SFAS No. 133, which became effective January 1, 2001, will not have a material effect on our financial statements.
LIQUIDITY AND CAPITAL RESOURCES
OPERATING ACTIVITIES | During 2000, our operating activities generated net cash of $550.4 million, which was primarily attributable to net income of $496.9 million adjusted by non-cash items including an increase in income taxes payable of $240.4 million, an increase in deferred income on sales to distributors of $232.6 million, an increase in accounts payable and accrued liabilities of $73.4 million, depreciation and amortization of $40.1 million, amortization of deferred stock-based compensation of $9.8 million, a decrease in other assets of $9.4 million and the one-time write-off of $6.3 million for acquired in-process research and development. These items were partially offset by an increase in inventories of $209.3 million, an increase in deferred income taxes of $93.5 million and an increase in accounts receivable of $78.8 million. Cash from operating activities was also offset by the gain on the sale of WaferTech of $178.1 million. Total cash proceeds related to the WaferTech sale of $350.4 million was included as a cash inflow under investing activities.
During 1999, our operating activities generated net cash of $402.8 million, which was primarily attributable to net income of $224.0 million adjusted by non-cash items including an increase in income taxes payable of $76.4 million, an increase in deferred income on sales to distributors of $66.4 million, an increase in accounts payable and accrued liabilities of $33.7 million, depreciation and amortization of $29.4 million, a decrease in other assets of $19.2 million, equity in loss of WaferTech of $7.6 million and a decrease in inventories of $5.4 million. These items were partially offset by an increase in accounts receivable of $34.0 million, an increase in deferred income taxes of $15.1 million and the gain on the sale of the MAX 5000 product family of $10.3 million.
INVESTING ACTIVITIES | During 2000, the net cash provided by investing activities was $290.3 million, which was driven by cash proceeds of $350.4 million from the sale of our equity interest in WaferTech and net sales of short-term investments of $43.0 million. These items were partially offset by cash payments of $11.5 million for the acquisitions of DesignPRO and Right Track and the purchase of long-term investments totaling $4.0 million. In addition, we invested $87.5 million primarily in land, manufacturing and data processing equipment and software, and building improvements in our headquarters and Penang facilities.
During 1999, the net cash used for investing activities was $314.9 million. We purchased $233.3 million (net) of short-term investments and made long-term investments, mainly in WaferTech, totaling $62.4 million. Additionally, we invested $29.8 million primarily for manufacturing and data processing equipment and software. These items were partially offset by proceeds of $10.7 million received from the sale of the MAX 5000 product family and our equity interest in Cypress Semiconductor (Texas), Inc.
FINANCING ACTIVITIES | During 2000, the net cash used for financing activities was $508.6 million, which was driven by the repurchase of 17.1 million shares of our common stock for $555.5 million. The repurchase was partially offset by net proceeds of $39.9 million from the issuance of 8.2 million shares of our common stock to employees through various option and employee stock purchase plans. In addition, we received $7.0 million from the sale of put warrants.
During 1999, the net cash used for financing activities was $54.7 million, which was driven by the repurchase of 4.3 million shares of our common stock for $87.1 million. The repurchase was partially offset by net proceeds of $29.9 million from the issuance of 10.9 million shares of our common stock to employees through various option and employee stock purchase plans. In addition, we received $2.4 million from the sale of put warrants.
FINANCIAL CONDITION | Since our inception, we have used a combination of equity and debt financing and cash generated from operations to support our operating activities.
As of December 31, 2000, we had $1,133.6 million of cash, cash equivalents and short-term investments available to finance our operating activities and future growth. Our management believes that capital expenditures will increase in 2001 primarily due to anticipated higher expenditures in manufacturing and data processing equipment as well as building improvements in our headquarters and Penang facilities. We believe the available sources of funds and cash we expect to generate from operations will be adequate to finance current operations, capital expenditures and common stock repurchases for at least the next year.
EMPLOYEES | The number of employees was 1,947 in 2000, 1,398 in 1999 and 1,151 in 1998, reflecting an increase of 39.3% in 2000 and 21.5% in 1999.
IMPACT OF CURRENCY AND INFLATION | We purchase the majority of our materials and services in U.S. dollars, and transact our foreign sales in U.S. dollars. We have, in the past, entered into forward contracts to hedge against currency fluctuations and to meet contractual commitments denominated in foreign currencies. During 2000, we entered into a forward exchange contract to purchase Malaysian ringgit to meet a portion of our firm contractual commitments to be paid in ringgits. The contract will be settled in June 2001. We may enter into similar contracts from time to time should conditions appear favorable. Inflation has not significantly impacted our financial results. As of December 31, 1999, we had no open foreign exchange contracts for the purchase or sale of foreign currencies.
ITEM 7A.
ITEM 7A. QUANTITATIVE AND QUALITATIVE DISCLOSURES ABOUT MARKET RISK.
Our investment portfolio consisted of fixed income securities of $1,028.8 million as of December 31, 2000 and $776.5 million as of December 31, 1999. These securities, like all fixed income instruments, are subject to interest rate risk and will decline in value if market interest rates increase. If market interest rates were to increase immediately and uniformly by 10% from levels as of December 31, 2000 and December 31, 1999, the decline in the fair value of the portfolio would not be material. Additionally, we have the ability to hold our fixed income investments until maturity and, therefore, we would not expect to recognize an adverse impact on income or cash flows.
We have international subsidiaries and branch operations and are, therefore, subject to foreign currency rate exposure. To date, our exposure to exchange rate volatility has not been significant. If foreign currency rates fluctuate by 10% from rates at December 31, 2000 and December 31, 1999, our financial position and results of operations would not be materially affected. However, we cannot assure you there will not be a material impact in the future.
ITEM 8.
ITEM 8. FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA.
CONSOLIDATED BALANCE SHEETS
See accompanying notes to consolidated financial statements.
CONSOLIDATED STATEMENTS OF OPERATIONS
See accompanying notes to consolidated financial statements.
CONSOLIDATED STATEMENTS OF CASH FLOWS
See accompanying notes to consolidated financial statements.
CONSOLIDATED STATEMENTS OF STOCKHOLDERS' EQUITY
See accompanying notes to consolidated financial statements.
NOTES TO THE CONSOLIDATED FINANCIAL STATEMENTS
Note 1: The Company
Altera Corporation, referred to as "we," "us" or "our," was founded in 1983 and is incorporated in the State of Delaware. We design, manufacture and market high-performance, high-density programmable logic devices and associated computer aided engineering logic development tools. Programmable logic devices are semiconductor chips that can be programmed on-site, using software tools that run on personal computers or engineering workstations. Our CMOS-based programmable logic devices address high-speed, high-density and low-power applications in the telecommunications, data communications, computer peripheral and industrial markets.
Note 2: Significant Accounting Policies
BASIS OF PRESENTATION | We have a fiscal year that ends on the Friday nearest December 31st. For presentation purposes, the consolidated financial statements and accompanying notes refer to our fiscal year end as December 31st. The consolidated financial statements include our accounts as well as our wholly owned subsidiaries after elimination of all significant intercompany balances and transactions.
USE OF ESTIMATES | Our management has made certain estimates and assumptions concerning the reported amounts of assets and liabilities and disclosure of contingent assets and liabilities at the date of the financial statements and the reported amounts of revenues and expenses during the fiscal years presented to prepare our financial statements in conformity with accounting principles generally accepted in the United States of America. Actual results could differ from those estimates.
COMMON STOCK SPLIT | On April 21, 1999, we declared a two-for-one stock split in the form of a 100 percent stock dividend to holders of record of our common stock on May 4, 1999. Dividend shares were distributed to stockholders on May 19, 1999. On July 13, 2000, we declared a two-for-one stock split in the form of a 100 percent stock dividend to holders of record of our common stock on July 26, 2000. Dividend shares were distributed to stockholders on August 10, 2000. All prior period share and income per share data have been retroactively restated to give effect to the stock splits for all periods presented.
CASH EQUIVALENTS AND SHORT-TERM INVESTMENTS | Cash equivalents consist of highly liquid investments with original maturities of three months or less. Short-term investments are held as securities available for sale and are carried at their market value as of the balance sheet date. The amortized cost of securities is adjusted for amortization of premiums and accretion of discounts to maturity. Such amortization is included in investment income. Realized gains or losses are determined on the specific identification method and are reflected in income. Net unrealized gains or losses are recorded directly in stockholders' equity except those unrealized losses that are deemed to be other than temporary are reflected in income.
INVENTORIES | Inventories are recorded at the lower of standard cost, which approximates actual cost on a first-in-first-out basis, or market. The inventories at December 31, 2000 and 1999 were comprised of the following:
PROPERTY AND EQUIPMENT | Property and equipment are carried at cost less accumulated depreciation and amortization. Depreciation and amortization are computed using the straight-line method. Estimated useful lives of three to five years are used for equipment and office furniture and forty years for buildings. Amortization of leasehold improvements is computed using the shorter of the remaining facility lease term or the estimated useful life of the improvements. Property and equipment at December 31, 2000 and 1999 was comprised of the following components:
We evaluate the recoverability of our property and equipment and intangible assets in accordance with Statement of Financial Accounting Standards No. 121, or SFAS No. 121, "Accounting for the Impairment of Long-Lived Assets and for Long-Lived Assets to be Disposed of." This standard requires recognition of impairment of long-lived assets in the event the net book value of such assets exceeds the future undiscounted cash flows attributable to such assets.
FAIR VALUE OF FINANCIAL INSTRUMENTS | For certain of our financial instruments, including cash and cash equivalents, short-term investments, accounts receivable and accounts payable, the carrying amounts approximate fair value due to their short maturities.
CONCENTRATIONS OF CREDIT RISK | Financial instruments that potentially subject us to concentrations of credit risk consist principally of cash and cash equivalents, short-term investments and accounts receivable. We place our short-term investments in a variety of financial instruments and, by policy, limit the amount of credit exposure through diversification and by restricting our investments to highly rated securities.
We sell our products to distributors and OEMs throughout the world. We perform ongoing credit evaluations of our customers' financial condition and, generally, require collateral, such as letters of credit, whenever deemed necessary. On August 7, 2000, our two principal North American distributors merged as Arrow Electronics, Inc. acquired Wyle Electronics. In 2000, our two largest distributors, each of which accounted for more than 10% of total sales, accounted for 58% and 11% of sales. Prior to the merger, we had three distributors each accounting for more than 10% of total sales. In 1999, they accounted for 34%, 19% and 13% of sales, whereas in 1998, they accounted for 30%, 21% and 11% of sales.
At December 31, 2000, one distributor accounted for 45% of total accounts receivable. At December 31, 1999, three distributors, each of which accounted for more than 10% of our accounts receivable, accounted for 49% of total accounts receivable in aggregate.
FOREIGN EXCHANGE CONTRACTS | We purchase the majority of our materials and services in U.S. dollars and our foreign sales are billed in U.S. dollars. We have, in the past, entered into forward contracts to hedge against currency fluctuations and meet contractual commitments denominated in foreign currencies. During 2000, we entered into a forward exchange contract to purchase Malaysian ringgit to meet a portion of our firm contractual commitments to be paid in ringgits. The contract will be settled in June 2001. We may enter into similar contracts from time to time should conditions appear favorable. Inflation has not significantly impacted our financial results. As of December 31, 1999, we had no open foreign exchange contracts for the purchase or sale of foreign currencies.
REVENUE RECOGNITION | We recognize revenue from product sales upon shipment to OEMs and end users. Reserves for sales returns and allowances are recorded at the time of shipment. Our sales to distributors are made under agreements allowing for returns or credits under certain circumstances. We defer recognition of revenue on sales to distributors until products are resold by the distributor to the end user.
DEPENDENCE ON WAFER SUPPLIERS | We do not directly manufacture finished silicon wafers. Our strategy has been to maintain relationships with wafer foundries. We have been successful in maintaining such relationships. See Notes 6 and 7. Although our management believes that the foundries' ability to supply our wafer needs will remain through at least the first half of year 2001, we cannot assure you that we will be able to satisfy our future wafer needs from current or alternative manufacturing sources. This could result in possible loss of sales or reduced margins.
STOCK-BASED COMPENSATION PLANS | We account for stock-based compensation using the intrinsic value method prescribed in Accounting Principles Board Opinion No. 25, or APB No. 25, "Accounting for Stock Issued to Employees." Under APB No. 25, compensation cost is measured as the excess, if any, of the quoted market price of our stock at the date of grant over the exercise price of the option granted. Compensation cost for stock options, if any, is recognized ratably over the vesting period. We provide additional pro forma disclosures as required under SFAS No. 123, "Accounting for Stock-Based Compensation." See Note 11.
COMPREHENSIVE INCOME | We adopted Statement of Financial Accounting Standard No. 130, or SFAS No. 130, "Reporting Comprehensive Income" as of the first quarter of 1998. SFAS No. 130 establishes standards for reporting and disclosure of comprehensive income and its components. In 2000, comprehensive income, including net income and unrealized loss on available-for-sale investments, was $496.2 million. In 1999 and 1998, comprehensive income approximated net income.
FOREIGN CURRENCY TRANSLATION | The U.S. dollar is the functional currency for each of our foreign subsidiaries. Assets and liabilities that are not denominated in the functional currency are remeasured into U.S. dollars and the resulting gains or losses are included in "Interest and other income, net."
NEW ACCOUNTING PRONOUNCEMENTS | In June 1998, the Financial Accounting Standards Board, or FASB, issued Statement of Financial Accounting Standards No. 133, or SFAS No. 133, "Accounting for Derivative Instruments and Hedging Activities." SFAS No. 133 establishes standards for accounting and reporting on derivative instruments for periods beginning after June 15, 2000. SFAS No. 133 requires that all derivative instruments be recognized in the balance sheet as either assets or liabilities and measured at fair value. Furthermore, SFAS No. 133 requires current recognition in earnings of changes in the fair value of derivative instruments depending on the intended use of the derivative and the resulting designation. In June 2000, the FASB issued SFAS No. 138, "Accounting for Derivative Instruments and Hedging Activities - An Amendment of SFAS No. 133." SFAS No. 138 amends the accounting and reporting standards for certain derivatives and hedging activities. Our adoption of SFAS No. 133, which became effective January 1, 2001, will not have a material effect on our financial statements.
Note 3: Income Per Share
Basic income per share is computed by dividing net income available to common stockholders by the weighted average number of common shares outstanding during the period and excludes the dilutive effect of stock options and restricted stock. Diluted income per share reflects the dilution of potential common shares outstanding during a period. In computing diluted income per share, the tax benefit resulting from employee stock transactions, unamortized deferred stock-based compensation and the average stock price for the period are used in determining the number of shares assumed to be repurchased with the proceeds from the exercise of stock options.
For the three year period ended December 31, 2000, we excluded certain stock options from the calculation of diluted income per share because they were anti-dilutive, but these options could be dilutive in the future. A reconciliation of basic and diluted income per share is presented below:
Note 4: Marketable Securities
Our portfolio of marketable securities at December 31 consists of the following:
Our portfolio of marketable securities by contractual maturity is as follows:
At December 31, 2000, unrealized loss on securities before tax was $1.2 million. At December 31, 1999, the fair market value of securities approximated cost.
Note 5: Acquisitions
We completed the acquisitions of all outstanding capital stock of DesignPRO Inc., a developer and provider of intellectual property cores and custom design solutions, on April 19, 2000, Right Track CAD Inc., a developer of architectural and computer aided design tools for advanced programmable logic devices, on May 1, 2000, and Northwest Logic, Inc., a provider of system design services and intellectual property specializing in telecommunications, data communications and embedded processor systems design, on September 11, 2000.
We issued 934,381 shares of our common stock and paid approximately $11.5 million in cash, net of cash acquired of $0.3 million, for all of the capital stock of DesignPRO, Right Track and Northwest Logic. In addition, we granted options to purchase 323,146 shares of our common stock in exchange for all of the stock options outstanding of DesignPRO and Right Track. The fair value of our shares issued was approximately $45.3 million and the fair value of our options granted was approximately $14.6 million. Certain shares issued were subject to our repurchase rights under certain circumstances. These rights lapse over a two to four year period. We incurred direct acquisition costs of approximately $0.4 million, which were included in the purchase price. Total consideration for the three acquisitions was $72.1 million. The acquisitions were accounted for under the purchase method of accounting. The purchase price was allocated to the tangible and intangible assets acquired and liabilities assumed based in part on an independent appraisal of their respective fair values. Total consideration paid in connection with the acquisitions was attributable to the following (in thousands):
No supplemental pro forma information is presented due to the immaterial effect on prior period results of operations.
The allocation of amounts to market ready technology and in-process research and development were consistent with widely recognized appraisal practices. Our analysis resulted in a valuation of market ready technology at $21.4 million. Market ready technology represents technologies that have reached technological feasibility, and therefore can be capitalized. We are amortizing the market ready technology on a straight-line basis over a period of three to six years. Our analysis also resulted in a $6.3 million charge to acquired in-process research and development. The acquired in-process technology represents the appraised value of technologies in the development stage that had not yet reached technological feasibility and do not have alternative future uses. We expensed this amount as a non-recurring charge upon consummation of the acquisitions.
We determined the value assigned to in-process research and development by identifying research projects in areas for which technological feasibility had not been established. For both the Right Track and DesignPRO valuations, we estimated the expected cash flows from the projects once commercially viable. We then discounted the net cash flows back to their present value and applied a percentage of completion. We determined the percentage of completion using milestones representing our management's estimate of effort, value added, and degree of difficulty of the portion of each project completed as of the acquisition date, as compared to the remaining research and development to be completed to bring each project to technical feasibility.
If we do not successfully develop our research projects discussed above, our sales and profitability may be adversely affected in future periods and the value of other intangible assets acquired may become impaired. Our management believes that the in-process research and development charge is valued consistently with the SEC staff's current views regarding valuation methodologies. We cannot assure you that the SEC staff will not take issue with any assumptions used in our valuation model and require us to revise the amount allocated to in-process research and development.
Note 6: Joint Venture
In June 1996, we formed WaferTech, LLC, a joint venture company, with TSMC and several other partners to build and operate a wafer manufacturing plant in Camas, Washington. In return for a $140.4 million cash investment, we received an 18% equity ownership in WaferTech and certain obligations and rights to procure up to 27% of WaferTech's output at market prices. In January 1999, we purchased from Analog Devices, Inc. an additional 5% equity ownership interest in WaferTech for approximately $37.5 million, increasing our ownership interest to 23%. This increased investment in WaferTech provided us with additional obligations and rights to procure up to 35% of WaferTech's future output. In October 1999, the partners in WaferTech contributed $100.0 million in additional equity to support capital expansion plans and working capital requirements of WaferTech. Our share of that contribution was $23.0 million; we maintained our same ownership interest and rights to acquire WaferTech's output.
On December 27, 2000, we sold our 23% ownership interest in WaferTech to a subsidiary of TSMC for $350.4 million in cash. The one-time pre-tax gain on the sale was $178.1 million. Although we sold our equity interest in WaferTech in December 2000, we will continue to utilize WaferTech as one of our suppliers of silicon wafers. Through December 27, 2000, we accounted for our investment under the equity method based on our ability to exercise significant influence over WaferTech's operating and financial policies. Our equity in the loss of WaferTech was $1.4 million for 2000, $7.6 million for 1999, $10.4 million for 1998.
Note 7: Investments and Other Assets
At December 31, 2000, our long-term investments and other assets primarily consisted of intangible assets acquired in connection with the acquisitions of DesignPRO, Right Track and Northwest Logic of approximately $21.1 million, net of $2.9 million of accumulated amortization. At December 31, 1999, our long-term investments were primarily related to our investment in WaferTech of $173.7 million. On December 27, 2000, we sold our 23% ownership interest in WaferTech. See Note 6.
In 1995, we entered into several agreements with TSMC. We agreed to make a $57.1 million deposit to TSMC for future wafer capacity allocations that extended into 2000. Under the terms of the agreement, TSMC agreed to provide us with wafers manufactured using TSMC processes and according to our specifications, and we agreed to purchase and TSMC agreed to supply a specific capacity of wafers per year through 2000. Billings for actual wafers purchased from TSMC reduced the prepaid balance. The deposits were fully utilized in 2000.
Note 8: Commitments
We lease certain of our sales facilities under non-cancelable lease agreements expiring at various times through 2009. The leases require us to pay property taxes, insurance, maintenance and repair costs. Future minimum lease payments under all non-cancelable operating leases are as follows:
We have the option to extend or renew most of our leases. Rental expense under all operating leases amounted to $3.5 million in 2000, $2.8 million in 1999 and $2.5 million in 1998.
Note 9: Convertible Subordinated Notes
In June 1995, we issued $230.0 million of convertible subordinated notes due in June 2002 and bearing an interest rate of 5.75%, payable semi-annually. The notes were convertible into shares of our common stock at a price of $6.40 per share. On May 15, 1998, we called for the redemption of the notes effective June 16, 1998. As a result, substantially all of the notes were converted into 35,954,596 shares of common stock with the remaining notes redeemed at a price of $1,033.06 per $1,000 principal amount of the notes. Total semi-annual interest paid on the notes during 1998 was $6.5 million. The unamortized debt issuance costs as of the redemption date of approximately $3.1 million was recorded as a reduction to additional paid-in capital.
Note 10: Stockholders' Equity
In May 2000, our stockholders voted to approve an amendment to our Certificate of Incorporation to increase the number of authorized shares from 400 million to 700 million.
COMMON STOCK REPURCHASES | During fiscal 1998, we repurchased a total of 7,240,000 shares of common stock for an aggregate cost of $60.3 million. During fiscal 1999, we repurchased a total of 4,330,000 shares of common stock for an aggregate cost of $87.1 million. During fiscal 2000, we repurchased a total of 17,130,000 shares of common stock for an aggregate cost of $555.5 million. As of December 31, 2000, 48,000,000 shares were authorized for repurchase. Since the inception of the repurchase program in 1996 through December 31, 2000, we have repurchased a total of 29,900,000 shares. All shares were retired upon acquisition.
PUT WARRANTS | In December 1999 and June 2000, we sold put warrants to independent third parties. These put warrants entitled the holders the right to sell 2,500,000 shares of our common stock to us at specified prices on stated maturity dates. The cash proceeds from the sale of the put warrants of $7.0 million in 2000 and $2.4 million in 1999 have been included as an addition to capital in excess of par value. As of December 31, 2000, warrants for 1,500,000 shares expired unexercised while warrants for 1,000,000 shares were exercised in November
2000. We repurchased these 1,000,000 shares for an aggregate cost of $33.7 million. These shares were included in the 29,900,000 total repurchased shares, which count against the 48,000,000 shares authorized for repurchase under our common stock repurchase program.
DEFERRED STOCK-BASED COMPENSATION | During 2000, we recorded aggregate deferred stock-based compensation of $41.3 million representing the value of restricted stock issued in conjunction with the acquisitions of DesignPRO and Right Track. In addition, we recorded deferred stock-based compensation of $17.6 million in conjunction with stock options and restricted stock granted to certain new employees. The restricted stock issued was subject to our repurchase rights under certain circumstances. These rights lapse over a two to four year period. At December 31, 2000, 1,260,243 shares were subject to our repurchase rights. Deferred stock-based compensation represents the difference between the grant price and the quoted market price of our stock at the date of grant. We are amortizing deferred stock-based compensation over the vesting period of two to four years. Amortization of deferred stock-based compensation was $9.8 million during 2000.
Note 11: Stock-Based Compensation Plans
At December 31, 2000, we had three stock-based compensation plans, which are described below. We apply APB No. 25 in accounting for our plans.
STOCK OPTION PLANS | As of December 31, 2000, the 1996 Stock Option Plan had 44.0 million shares reserved for issuance and 1.8 million shares were available for future grants. The 1998 Director Stock Option Plan had 680,000 shares reserved for issuance and 445,000 shares were available for future grants.
Any shares reserved for issuance under the 1987 Stock Option Plan and the 1988 Director Stock Option Plan relating to ungranted stock options were cancelled upon the adoption of the new option plans. As of December 31, 2000, under the 1987 Stock Option Plan, 9.0 million previously granted shares remained unexercised, while under the 1988 Director Stock Option Plan, 1.2 million previously granted shares remained unexercised.
The 1998 Director Stock Option Plan provides for the periodic issuance of stock options to members of our Board of Directors who are not employees. Under all stock option plans, the option's maximum term is 10 years. Options granted prior to October 1997 generally vest over five years at annual increments as determined by the Board of Directors. In October 1997, the Board of Directors approved a proposal to shorten the vesting period for new grants under the 1996 Stock Option Plan whereby options granted subsequent to September 30, 1997 will generally vest over four years at annual increments as determined by the Board of Directors.
A summary of our stock option activity and related weighted average exercise prices for the years ended December 31 are as follows:
Effective January 30, 1998, we offered employees, except all officers and director-level employees, the right to reprice their stock options granted from January 1, 1995 through January 19, 1998. The repriced options have an exercise price of $8.57, the fair value of our common stock on the effective date, and the vesting schedule of such options was extended by three months. In connection with this action, approximately 5.2 million options were repriced that previously had a weighted average exercise price of $12.13.
EMPLOYEE STOCK PURCHASE PLAN | As of December 31, 2000, the 1987 Employee Stock Purchase Plan had 13.7 million shares of common stock reserved for issuance. Under the terms of the Employee Stock Purchase Plan, full-time employees, nearly all of whom are eligible to participate, can choose each year to have up to 10% of their annual base earnings withheld to purchase our common stock with a maximum of $25,000 per year. The purchase price of the stock is 85% of the lower of the closing price at the beginning or at the end of each six-month offering period. We do not recognize compensation cost related to employee purchase rights under the Plan.
Sales under the Employee Stock Purchase Plan were 423,988 shares of common stock at an average price of $22.05 per share in 2000, 634,478 shares at $10.81 per share in 1999, and 886,252 shares at $7.13 per share in 1998. There were 1.3 million shares available for future purchases under the Employee Stock Purchase Plan as of December 31, 2000.
We received tax benefits of $113.9 million in 2000, $64.1 million in 1999 and $9.0 million in 1998 on the exercise of non-qualified stock options and on the disposition of stock acquired by exercise of incentive stock options or through the Employee Stock Purchase Plan.
PRO FORMA NET INCOME AND NET INCOME PER SHARE | The fair value of each option grant, as defined by SFAS No. 123, is estimated on the date of grant using the Black-Scholes option-pricing model. The Black-Scholes model, as well as other currently accepted option valuation models, was developed to estimate the fair value of freely tradable, fully transferable options without vesting restrictions that significantly differ from our stock option awards. These models also require highly subjective assumptions, including future stock price volatility and expected time until exercise, which greatly affect the fair value on the grant date.
To compute the estimated fair value of our stock option grants and employees' purchase rights under the Employee Stock Purchase Plan, the Black-Scholes method was used with the following weighted-average assumptions and dividend yields of 0% for all years presented:
Had we recorded compensation costs based on the estimated grant date fair value as defined by SFAS No. 123, for awards granted under its Stock Option Plans and Stock Purchase Plan, our net income and net income per share would have been reduced to the pro forma amounts below for the years ended December 31, 2000, 1999 and 1998:
Note 12: Income Taxes
U.S. and foreign components of income before income taxes were:
Unremitted earnings of our foreign subsidiaries that are considered permanently invested outside the United States and on which no deferred taxes have been provided, aggregate to approximately $138.5 million at December 31, 2000.
The provision for income taxes consists of:
Deferred tax assets (liabilities) were as follows:
The change in deferred taxes includes $9.0 million of deferred taxes related to the investment in WaferTech. The valuation allowances of $3.3 million at December 31, 2000, and $4.0 million at December 31, 1999 are attributable to deferred tax assets from the 1994 acquisition of Intel's programmable logic business. Sufficient uncertainty exists regarding the realizability of these assets and, accordingly, valuation allowances are required.
Our income taxes payable for federal, state, and foreign purposes have been reduced by the tax benefits associated with exercise of non-qualified stock options and disposition of stock acquired by exercise of incentive stock options or through the Employee Stock Purchase Plan. We receive an income tax benefit calculated as the tax effect of the difference between the fair market value of the stock issued at the time of exercise and the option price. These benefits were credited directly to stockholders' equity and amounted to $113.9 million in 2000, $64.1 million in 1999 and $9.0 million in 1998.
The items accounting for the difference between income taxes computed at the federal statutory rate and the provision for income taxes are as follows:
Note 13: Litigation
We are a party to lawsuits and may in the future become a party to lawsuits involving various types of claims, including, but not limited to, unfair competition and intellectual property matters. Legal proceedings tend to be unpredictable and costly and may be affected by events outside of our control. We cannot assure you that litigation will not have an adverse effect on our financial position or results of operations. Our major litigation matters as of December 31, 2000 are described below.
In June 1993, Xilinx, Inc. sued us for monetary damages and injunctive relief based on our alleged infringement of certain patents held by Xilinx. In June 1993, we sued Xilinx for monetary damages and injunctive relief based on Xilinx's alleged infringement of certain patents held by us. In April 1995, we filed a separate lawsuit against Xilinx in Delaware, Xilinx's state of incorporation, seeking monetary damages and injunctive relief based on Xilinx's alleged infringement of one of our patents. In May 1995, Xilinx counter-claimed against us in Delaware, asserting defenses and seeking monetary damages and injunctive relief based on our alleged infringement of certain patents held by Xilinx. Subsequently, the Delaware case was transferred to California. In October 1998, both parties filed motions for summary judgment with respect to certain issues in the first two cases regarding infringement or non-infringement and validity or invalidity of the patents at issue in the respective cases. In our suit, the court granted that one of our patents is invalid, granted that one patent is not infringed, and granted another patent is not literally infringed but denied non-infringement under the doctrine of equivalence. In October and November 2000, Xilinx's suit went to trial and Xilinx withdrew its claim against our MAX 5000, MAX 7000 and MAX 9000 family products. Upon completion of trial, the jury rendered a verdict that our FLEX 8000 family products infringe the two Xilinx patents and that the patents are valid. We have filed post trial motions to overturn the verdicts or to seek a new trial. In a press release dated November 17, 2000, Xilinx announced it will seek an injunction against us to stop all shipments of our "FLEX product" and our "derivative programmable logic devices" that Xilinx claims infringe the two Xilinx patents. The court ordered continued mediation following the jury verdict. Due to the nature of the litigation with Xilinx and because the Xilinx lawsuit has not yet reached the damages trial stage, our management cannot estimate the total expense, the possible loss, if any, or the range of loss that we may ultimately incur in connection with the verdict. Our management cannot ensure that Xilinx will not succeed in obtaining significant monetary damages or an injunction against the manufacture and sale of our products, including but not limited to our FLEX 8000 family products, or succeed in invalidating our other patents. Although we cannot make any assurances as to the results of these cases, we believe that the jury verdict is in error and intend to pursue our post trial motions with the court to reverse the verdict and will file an appeal if our motions are denied. We continue to believe that we have meritorious defenses to the claims asserted in the Xilinx suit and intend to continue to defend ourselves vigorously in this matter.
In May 2000, we sued Xilinx, seeking monetary damages and injunctive relief based on Xilinx's alleged infringement of certain patents held by us. In July 2000, Xilinx filed a counterclaim against us alleging infringement of certain patents held by Xilinx. The court has issued an order setting the claim construction hearing for our claims in April 2001. Due to the nature of the litigation with Xilinx and because the lawsuit is still in the pre-trial stage, our management cannot estimate the total expenses, the possible loss, if any, or the range of loss that may ultimately be incurred in connection with the counterclaim allegations. Although we cannot make any assurances as to the results of this case, we believe that we have meritorious defenses to Xilinx's counterclaim and intend to pursue our claims and defend ourselves vigorously in this matter.
In November 2000, Xilinx filed a complaint against us with the International Trade Commission, or ITC, to bar us from importing or selling products into the United States that Xilinx asserts infringe three Xilinx patents not previously asserted. Xilinx also requested a permanent cease and desist order and other penalties, as the ITC may deem appropriate. The ITC has commenced an investigation based on Xilinx's complaint. Due to the nature of the litigation with Xilinx and because the lawsuit is still in the pre-trial stage, our management cannot estimate the total expenses, the possible loss, if any, or the range of loss that may ultimately be incurred in connection with the claim allegations. Although we cannot make any assurances as to the results of this case, we believe that we have meritorious defenses to Xilinx's claims and intend to defend ourselves vigorously in this matter.
In August 1994, Advanced Micro Devices, Inc., or AMD, sued us seeking monetary damages and injunctive relief based on our alleged infringement of certain patents held by AMD. In September 1994, we answered the complaint asserting that we are licensed to use the patents which AMD claims are infringed and filed a counterclaim against AMD alleging infringement of certain patents held by us. In October 1997, upon completion of trials bifurcated from the infringement claims, the District Court ruled that we are licensed under all patents asserted by AMD in the suit. In December 1997, AMD filed a Notice of Appeal of the District Court's rulings. In April 1999, the Federal Circuit Court ruled in AMD's favor on its appeal, finding that we are not licensed to AMD's patents, and remanded the case back to the District Court for further proceedings. In 1999, Lattice Semiconductor Corporation entered into an agreement with AMD that includes assuming both the claims against us and the claims against AMD and has replaced AMD in the suit with Vantis, a wholly owned subsidiary of Lattice. Due to the nature of the litigation, our management cannot estimate the total expense, the possible loss, if any, or the range of loss that may ultimately be incurred in connection with the allegations. We cannot ensure that Lattice will not succeed in obtaining significant monetary damages or an injunction against the manufacture and sale of the Classic, MAX 7000, FLEX 8000, MAX 9000 and FLEX 10K product families, or succeed in invalidating any of our patents remaining in the suit. Although we cannot make any assurances as to the results of this case, we intend to pursue our claims and defend ourselves vigorously in this matter.
In May 2000, we sued Lattice seeking monetary damages and injunctive relief based on Lattice's alleged infringement of certain patents held by us. In July 2000, Lattice filed a counterclaim against us alleging infringement of certain patents held by Lattice. Due to the nature of the litigation with Lattice and because the lawsuit is still in the pre-trial stage, our management cannot estimate the total expenses, the possible loss, if any, or the range of loss that may ultimately be incurred in connection with the counterclaim allegations. Although we cannot make any assurances as to the results of this case, we intend to pursue our claims and defend ourselves vigorously in this matter.
In November 1999, we sued Clear Logic Inc. alleging that Clear Logic is unlawfully appropriating our registered mask work technology in violation of the federal mask work statute and that Clear Logic has unlawfully interfered with our relationships and contracts with our customers. The lawsuit seeks compensatory and punitive damages and an injunction to stop Clear Logic from unlawfully using our mask work technology and from interfering with our customers. Clear Logic has answered the complaint by denying that it is infringing our mask work technology and denying that it has unlawfully interfered with our relationships and contracts with our customers. Clear Logic has also filed a counterclaim against us for unfair competition under California law alleging that we have made false statements to our customers regarding Clear Logic. Due to the nature of the litigation with Clear Logic and because the lawsuit is still in the pre-trial stage, our management cannot estimate the total expenses, the possible loss, if any, or the range of loss that may ultimately be incurred in connection with the counterclaim allegations. Although we cannot make any assurances as to the results of this case, we intend to pursue our claims and defend ourselves vigorously in this matter.
Note 14: Segment and Geographic Information
We operate in a single industry segment comprising the design, development, manufacture, and sale of CMOS programmable logic integrated circuits and associated engineering development software and hardware. Our sales by major geographic area (based on destination) were as follows:
The majority of our long-lived assets were located in the United States. Long-lived assets included net property and equipment and long-term investments and other assets. Long-lived assets that were outside the United States constituted 26% of the total at December 31, 2000, and less than 10% of the total at December 31, 1999 and 1998. No single country outside of the United States constituted more than 10% of total long-lived assets for years ended December 31, 2000, 1999 and 1998. No single end customer provided more than 10% of our sales for years ended December 31, 2000, 1999 and 1998.
Note 15: Employee Benefits Plans
We have a plan to provide retirement and incidental benefits for our eligible employees, known as the Altera Corporation Savings and Retirement Plan, or the Plan. As allowed under Section 401(k) of the Internal Revenue Code, the Plan provides tax deferred salary deductions for eligible employees. Participants in the Plan may make salary deferrals of up to 20% of the eligible annual salary, limited by the maximum dollar amount allowed by the Internal Revenue Code. For every dollar deferred under the Plan, we make a matching contribution equal to 100% up to the first 5% of the salary deferred with a maximum of $1,500 per participant per year. Effective January 1, 2001, we increased the maximum limit of matching contribution from $1,500 to $2,000 per participant per year. Participants become fully vested as to the matching contribution after five years. Our contributions to the Plan were $1.3 million in both 2000 and 1999 and $1.1 million in 1998.
REPORT OF INDEPENDENT ACCOUNTANTS
To the Stockholders and Board of Directors of Altera Corporation:
In our opinion, the accompanying consolidated balance sheets and the related consolidated statements of operations, of stockholders' equity and of cash flows present fairly, in all material respects, the financial position of Altera Corporation and its subsidiaries at December 31, 2000 and 1999, and the results of their operations and their cash flows for each of the three years in the period ended December 31, 2000, in conformity with accounting principles generally accepted in the United States of America. These financial statements are the responsibility of the Company's management; our responsibility is to express an opinion on these financial statements based on our audits. We conducted our audits of these statements in accordance with auditing standards generally accepted in the United States of America which require that we plan and perform the audit to obtain reasonable assurance about whether the financial statements are free of material misstatement. An audit includes examining, on a test basis, evidence supporting the amounts and disclosures in the financial statements, assessing the accounting principles used and significant estimates made by management, and evaluating the overall financial statement presentation. We believe that our audits provide a reasonable basis for the opinion expressed above.
/s/ PricewaterhouseCoopers LLP
San Jose, California January 17, 2001
Supplementary Financial Data
Quarterly Financial Information (UNAUDITED)
ITEM 9.
ITEM 9. CHANGES IN AND DISAGREEMENTS WITH ACCOUNTANTS ON ACCOUNTING AND FINANCIAL DISCLOSURE.
None.
PART III
ITEM 10.
ITEM 10. DIRECTORS AND EXECUTIVE OFFICERS OF THE REGISTRANT.
The information concerning our executive officers and directors required by this Item is incorporated by reference to the section in Item 1 of this Report entitled "Directors and Executive Officers." The section entitled "Section 16(a) Beneficial Ownership Reporting Compliance" in our Proxy Statement is incorporated herein by reference.
ITEM 11.
ITEM 11. EXECUTIVE COMPENSATION.
The sections entitled "Executive Compensation," "Director Compensation" and "Employment Contracts and Change of Control Arrangements" in our Proxy Statement are incorporated herein by reference.
ITEM 12.
ITEM 12. SECURITY OWNERSHIP OF CERTAIN BENEFICIAL OWNERS AND MANAGEMENT.
The section entitled "Security Ownership of Certain Beneficial Owners and Management" in our Proxy Statement is incorporated herein by reference.
ITEM 13.
ITEM 13. CERTAIN RELATIONSHIPS AND RELATED TRANSACTIONS.
The sections entitled "Director Compensation" and "Certain Business Relationships" in our Proxy Statement are incorporated herein by reference.
PART IV
ITEM 14.
ITEM 14. EXHIBITS, FINANCIAL STATEMENT SCHEDULES AND REPORTS ON FORM 8-K.
(a) The following documents are filed as part of this Report:
1. Financial Statements
The information required by this item is included in Item 8 of Part II of this Report.
2. Financial Statement Schedules.
All schedules have been omitted as they are either not required, not applicable, or the required information is included in the financial statements or notes thereto.
3. Exhibits.
(1) Incorporated by reference to identically numbered exhibit of the Registrant's Registration Statement on Form S-1 (File No. 33-17717), as amended, which became effective March 29, 1988.
(2) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-K for the fiscal year ended December 31, 1993.
(3) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-Q for the quarter ended June 30, 1995.
(4) Incorporated by reference to identically numbered exhibit of the Registrant's Registration Statement on Form S-8 (File No. 33-61085), as amended, which became effective July 17, 1995.
(5) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-K for the fiscal year ended December 31, 1995.
(6) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-Q for the quarter ended June 30, 1997.
(7) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-K for the fiscal year ended December 31, 1997.
(8) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-K for the fiscal year ended December 31, 1998.
(9) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-Q for the quarter ended March 31, 1999.
(10) Incorporated by reference to identically numbered exhibit of the Registrant's Registration Statement on Form S-8 (File No. 333-31304), filed on February 29, 2000.
(11) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-K for the fiscal year ended December 31, 1999.
(12) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-Q for the quarter ended June 30, 2000.
(13) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-Q for the quarter ended September 30, 2000.
(14) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 8-K, filed on December 15, 2000.
(15) Incorporated by reference to exhibit 4.2 of the Registrant's Registration Statement on Form S-8 (File No. 333-54384), filed on January 26, 2001.
# Filed herewith.
* Confidential treatment has previously been granted for portions of this exhibit pursuant to an order of the Commission.
** Confidential treatment has previously been requested for portions of this exhibit.
+ Management contract or compensatory plan or arrangement required to be filed as an exhibit to this Report on Form 10-K pursuant to Item 14(c) thereof.
(b) Reports on Form 8-K.
The following reports on Form 8-K were filed during the fourth quarter of fiscal 2000.
1. Current Report on Form 8-K dated November 17, 2000 and filed on December 11, 2000 announcing a jury verdict in the Xilinx litigation.
2. Current Report on Form 8-K dated December 14, 2000 and filed on December 15, 2000 announcing the sale of our equity interest in WaferTech, LLC.
SIGNATURES
Pursuant to the requirements of Section 13 or 15(d) of the Securities Exchange Act of 1934, the Registrant has duly caused this Report on Form 10-K to be signed on its behalf, by the undersigned thereto duly authorized.
ALTERA CORPORATION
By: /s/ NATHAN SARKISIAN -------------------------------------- Nathan Sarkisian Senior Vice President and Chief Financial Officer
March 6, 2001
POWER OF ATTORNEY
Know all persons by these present, that each person whose signature appears below constitutes and appoints Nathan Sarkisian, his or her attorney-in-fact, with the power of substitution, for him or her in any and all capacities, to sign any amendments to this Report on Form 10-K, and to file the same, with exhibits thereto and other documents in connection therewith, with the Securities and Exchange Commission, hereby ratifying and confirming all that said attorney-in-fact, or his or her substitute or substitutes, may do or cause to be done by virtue hereof.
Pursuant to the requirements of the Securities Exchange Act of 1934, this Report on Form 10-K has been signed below by the following persons on behalf of the registrant and in the capacities and on the dates indicated:
EXHIBIT INDEX
(1) Incorporated by reference to identically numbered exhibit of the Registrant's Registration Statement on Form S-1 (File No. 33-17717), as amended, which became effective March 29, 1988.
(2) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-K for the fiscal year ended December 31, 1993.
(3) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-Q for the quarter ended June 30, 1995.
(4) Incorporated by reference to identically numbered exhibit of the Registrant's Registration Statement on Form S-8 (File No. 33-61085), as amended, which became effective July 17, 1995.
(5) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-K for the fiscal year ended December 31, 1995.
(6) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-Q for the quarter ended June 30, 1997.
(7) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-K for the fiscal year ended December 31, 1997.
(8) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-K for the fiscal year ended December 31, 1998.
(9) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-Q for the quarter ended March 31, 1999.
(10) Incorporated by reference to identically numbered exhibit of the Registrant's Registration Statement on Form S-8 (File No. 333-31304), filed on February 29, 2000.
(11) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-K for the fiscal year ended December 31, 1999.
(12) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-Q for the quarter ended June 30, 2000.
(13) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 10-Q for the quarter ended September 30, 2000.
(14) Incorporated by reference to identically numbered exhibit of the Registrant's Report on Form 8-K, filed on December 15, 2000.
(15) Incorporated by reference to exhibit 4.2 of the Registrant's Registration Statement on Form S-8 (File No. 333-54384), filed on January 26, 2001.
# Filed herewith.
* Confidential treatment has previously been granted for portions of this exhibit pursuant to an order of the Commission.
** Confidential treatment has previously been requested for portions of this exhibit.
+ Management contract or compensatory plan or arrangement required to be filed as an exhibit to this Report on Form 10-K pursuant to Item 14(c) thereof.