help mc a real time clock standby mode i am having trouble obtaining the specified standby current drain from a mc a real time clock has anyone out there had some experience in doing this the specs call for a few sequences to be met before standby mode is activated and are a bit hard to decipher on that but i thought that i had it worked out however with a khz crystal the lowest current drain i can acheive at v vcc is ua this is three times the specified maximum under the conditions i am attempting to create i have done the following things made sure that reset is asserted for trlh after powerup and as is low during this time made sure that there is a cycle on as after the negation of rd or wr during which stby was asserted what am i doing wrong thanks very much martin
