re help with simms in article c fu u pxx austin ibm com guyd austin ibm com guy dawson writes in article lhdsy lahabra chevron com jjctc lhdsy lahabra chevron com james c tsiao writes in article apr fct unl pt fcm diana fct unl pt fernando correia martins mei writes spectre spectre nmt edu wrote when i look at a magazine ad that says deleted what exactly do the numbers mean i e which is the mb ns the numbers and refers to nanoseconds could someone explain exactly what this numbers means time spent bettwen processor s request and answer retrieved in case of reading it means the time required for the memory to refresh i e a x needs ns before it is ready to be read again nope it s the time taken to read data from memory it s the read time the memory will still have to be refreshed the whole phase is called a cycle the cycle time being about twice the access time i m sorry if i m misunderstanding your post but dram does not have to be refreshed on each access cycle so cycle time does not have to be twice the access time because of refresh phase the access time usually means the delay time from falling edge of raw address strobe ras to data bus driven dram access cycle timing chart can be roughly shown as following some signals are intentionally omitted addr ra ca ra ca ra raw address ca column address ras high low floating cas driven either h or l data valid valid cycle time access time or ras access time yes the cycle time is more than twice as the access time but not because of the refresh phase the refresh can be done either as a trailing phase of normal access cycle or as an individual cycle other stuff deleted ken nakata i apologize if there are incorrect rude and or impolite expressions in this mail or post they are not intended please consider that english is a second language for me and i don t have full understanding of certain words or each nuance of a phrase thank you ken nakata cis student njit
