SOI CMOS device and circuit technologies operating at low voltages dedicated for ultralow power applications are reviewed. It is important to improve energy efficiency while maintaining an acceptable speed performance in ultralow power applications for long-life battery operation, or using harvested power. Major obstacles for the low voltage operation of CMOS are large characteristic variability and small on–off ratio of transistors. The solution to this issue involves using a fully depleted silicon-on-insulator (FDSOI) transistor with back bias control. The current status of the device, and circuit technology development of FDSOI with back bias, is presented.