Publisher Summary This chapter discusses evolution of software radio, receiver using digital processing at baseband. The narrowband and wideband IF-sampling digital receivers are explored. Increasing ADC dynamic range using dither is examined. There are two fundamental limitations to maximizing SFDR in a high-speed ADC. First, is the distortion produced by the front-end amplifier and the sample-and-hold circuit, and second, that the distortion produced by nonlinearity in the actual transfer function of the encoder portion of the ADC. The key to high SFDR is to minimize the nonlinearity of each. It discusses the wideband radio transmitter considerations. Two basic transmit architectures are illustrated. The chapter further discusses about cellular telephone handsets and the role of ADCs and DACs in cellular telephone handsets. A brief description is provided on the SoftFone and Othello Radio Chipsets from Analog Devices and time-interleaved IF sampling ADCs with digital post-processors. It separately treats the subject advanced digital post processing and advanced filter bank (AFB). AFB is one of the first commercially available digital post-processing technologies to make a significant impact on the performance of time-interleaving ADC systems. Examples of AFB design: the AD12400 12-Bit, 400 MSPS ADC is presented. The AD 12400 is the first member of a new family of analog devices that leverage time interleaving and AFB.