How to reduce diode detector weak signal insertion-power-loss to
less than that possible when the input is impedance matched By
Ben H. Tongue Quick Summary: Diode detector insertion power loss
can be reduced below the value achieved under impedance matched
conditions provided it is operating below its LSLC point. The
optimal conditions are: (1) The output audio load resistance
equals twice the RF source resistance. (2) The Saturation
Current and Ideality Factor of the diode are such that the very-
low-signal output resistance of the detector (axis-crossing
resistance, aka Rd, of the diode) equals the output load
resistance. These conditions insure an impedance match at the
audio output and a 1:2 mismatch at the RF input (source
resistance = half the RF input resistance of the diode). Please
bear in mind that the LSLC point is a point on a graph of output
DC power vs input RF power of a diode detector system. It is not
a point on a graph of DC current vs voltage of a diode. Info on
the LSLC point is available i