Probabilistic CMOS (PCMOS) in the Nanoelectronics Regime
Motivated by the necessity to consider probabilistic approaches
to future designs, the main objective of this thesis was to
develop and characterize energy efficient probabilistic CMOS
(PCMOS) circuits that can be used to implement low energy
computing platforms. The simplest circuit characterized was a
PCMOS inverter (switch). An analytical model relating the energy
consumption per switching (E) of this switch to its probability
of correctness, p was derived. This characterization can also be
used to evaluate the energy and performance savings that are
achieved by PCMOS switch based computing platforms. The
characterization of a PCMOS inverter was also extended to larger
circuits whose probabilistic behavior was analyzed by first
developing probability models of primitive gates, which were
then input to a graph-based model to find the probabilities of
larger circuits. The analysis of larger probabilistic circuits
provides a basis for analyzing probabil