Design and VLSI Implementation of DDR SDRAM Controller for High
Speed Applications Synchronous DRAM (SDRAM) has become a
mainstream memory of choice in design due to its speed, burst
access and pipeline features. For high-end applications using
processors, the interface to the SDRAM is supported by the
processor's built-in peripheral module. However, for other
applications, the system designer must design a controller to
provide proper commands for SDRAM initialization, read/write
accesses and memory refresh. DDR SDRAM uses double data rate
architecture to achieve high-speed data transfers. DDR SDRAM
(referred to as DDR) transfers data on both the rising and
falling edge of the clock. This DDR controller is typically
implemented in a system between the DDR and the Processor.