Frequency adjustable clock oscillator based on frequency to voltage converter
A frequency adjustable clock oscillator based on a frequency to voltage converter is presented. A new architecture is employed without reference frequency input. The system model shows the conditions of system stability. A compensation circuit was used to cancel the variations of frequency over process and temperature. The range of output frequency is from 22.5 360 MHz, which is within 4.5% variation in worst cases. The circuit was designed in a 0.13 um CMOS 3.3 V device process, occupying a chip area of about 0.05 mm2. The clock oscillator can achieve 25 ps peak to peak jitter, 2 us locked time and consume 5 m W at a 3.3 V supply voltage and 200 MHz output clock.