The power consumption and thermal performance of integrated circuits has become a limiting factor for high-performance systems.[6][7][8] Mobile devices are also limited by the total amount of power available.[4] Minimizing power consumption in digital CMOS circuits requires significant design effort at all levels. Supply voltage reduction is one way to achieve this, but static supply voltage reduction can reduce performance. Dynamic voltage scaling systems are used to adjust the supply voltage to the specific operations the chip is performing.