Chip Placement with Diffusion
<|reference_start|>Chip Placement with Diffusion: Macro placement is a vital step in digital circuit design that defines the physical location of large collections of components, known as macros, on a 2-dimensional chip. The physical layout obtained during placement determines key performance metrics of the chip, such as power consumption, area, and performance. Existing learning-based methods typically fall short because of their reliance on reinforcement learning, which is slow and limits the flexibility of the agent by casting placement as a sequential process. Instead, we use a powerful diffusion model to place all components simultaneously. To enable such models to train at scale, we propose a novel architecture for the denoising model, as well as an algorithm to generate large synthetic datasets for pre-training. We empirically show that our model can tackle the placement task, and achieve competitive performance on placement benchmarks compared to state-of-the-art methods.<|reference_end|>
@article{lee2024chip,
    title={Chip Placement with Diffusion},
    author={Vint Lee, Chun Deng, Leena Elzeiny, Pieter Abbeel, John Wawrzynek},
    journal={arXiv preprint arXiv:2407.12282},
    year={2024},
    archivePrefix={arXiv},
    eprint={2407.12282},
    primaryClass={cs.LG cs.AI cs.AR}
}