Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications
<|reference_start|>Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications: In this work, we present a high-throughput field programmable gate array (FPGA) demonstrator of an artificial neural network (ANN)-based equalizer. The equalization is performed and illustrated in real-time for a 30 GBd, two-level pulse amplitude modulation (PAM2) optical communication system.<|reference_end|>
@article{ney2024real-time,
    title={Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical
  Communications},
    author={Jonas Ney, Patrick Matalla, Vincent Lauinger, Laurent Schmalen,
  Sebastian Randel, Norbert Wehn},
    journal={arXiv preprint arXiv:2402.15288},
    year={2024},
    archivePrefix={arXiv},
    eprint={2402.15288},
    primaryClass={eess.SP cs.LG}
}