CktGen: Specification-Conditioned Analog Circuit Generation
<|reference_start|>CktGen: Specification-Conditioned Analog Circuit Generation: Automatic synthesis of analog circuits presents significant challenges. Existing methods usually treat the task as optimization problems, which limits their transferability and reusability for new requirements. To address this limitation, we introduce a task that directly generates analog circuits based on specified specifications, termed specification-conditioned analog circuit generation. Specifically, we propose CktGen, a simple yet effective variational autoencoder (VAE) model, that maps specifications and circuits into a joint latent space, and reconstructs the circuit from the latent. Moreover, given that a single specification can correspond to multiple distinct circuits, simply minimizing the distance between the mapped latent representations of the circuit and specification does not capture these one-to-many relationships. To address this, we integrate contrastive learning and classifier guidance to prevent model collapse. We conduct comprehensive experiments on the Open Circuit Benchmark (OCB) and introduce new evaluation metrics for cross-model consistency in the specification-to-circuit generation task. Experimental results demonstrate substantial improvements over existing state-of-the-art methods.<|reference_end|>
@article{hou2024cktgen:,
    title={CktGen: Specification-Conditioned Analog Circuit Generation},
    author={Yuxuan Hou, Jianrong Zhang, Hua Chen, Min Zhou, Faxin Yu, Hehe Fan, Yi
  Yang},
    journal={arXiv preprint arXiv:2410.00995},
    year={2024},
    archivePrefix={arXiv},
    eprint={2410.00995},
    primaryClass={cs.LG}
}