VTR: An Optimized Vision Transformer for SAR ATR Acceleration on FPGA
<|reference_start|>VTR: An Optimized Vision Transformer for SAR ATR Acceleration on FPGA: Synthetic Aperture Radar (SAR) Automatic Target Recognition (ATR) is a key technique used in military applications like remote-sensing image recognition. Vision Transformers (ViTs) are the current state-of-the-art in various computer vision applications, outperforming their CNN counterparts. However, using ViTs for SAR ATR applications is challenging due to (1) standard ViTs require extensive training data to generalize well due to their low locality; the standard SAR datasets, however, have a limited number of labeled training data which reduces the learning capability of ViTs; (2) ViTs have a high parameter count and are computation intensive which makes their deployment on resource-constrained SAR platforms difficult. In this work, we develop a lightweight ViT model that can be trained directly on small datasets without any pre-training by utilizing the Shifted Patch Tokenization (SPT) and Locality Self-Attention (LSA) modules. We directly train this model on SAR datasets which have limited training samples to evaluate its effectiveness for SAR ATR applications. We evaluate our proposed model, that we call VTR (ViT for SAR ATR), on three widely used SAR datasets: MSTAR, SynthWakeSAR, and GBSAR. Further, we propose a novel FPGA accelerator for VTR, in order to enable deployment for real-time SAR ATR applications.<|reference_end|>
@article{wickramasinghe2024vtr:,
    title={VTR: An Optimized Vision Transformer for SAR ATR Acceleration on FPGA},
    author={Sachini Wickramasinghe, Dhruv Parikh, Bingyi Zhang, Rajgopal Kannan,
  Viktor Prasanna, Carl Busart},
    journal={arXiv preprint arXiv:2404.04527},
    year={2024},
    archivePrefix={arXiv},
    eprint={2404.04527},
    primaryClass={cs.CV cs.AI cs.AR cs.DC}
}