Micro-orchestration of RAN functions accelerated in FPGA SoC devices
<|reference_start|>Micro-orchestration of RAN functions accelerated in FPGA SoC devices: This work provides a vision on how to tackle the underutilization of compute resources in FPGA SoC devices used across 5G and edge computing infrastructures. A first step towards this end is the implementation of a resource management layer able to migrate and scale functions in such devices, based on context events. This layer sets the basis to design a hierarchical data-driven micro-orchestrator in charge of providing the lifecycle management of functions in FPGA SoC devices. In the O-RAN context, the micro-orchestrator is foreseen to take the form of an xApp/rApp tandem trained with RAN traffic and context data.<|reference_end|>
@article{bartzoudis2024micro-orchestration,
    title={Micro-orchestration of RAN functions accelerated in FPGA SoC devices},
    author={Nikolaos Bartzoudis, Jos'e Rubio Fern'andez, David L'opez-Bueno,
  Godfrey Kibalya and Angelos Antonopoulos},
    journal={arXiv preprint arXiv:2409.11362},
    year={2024},
    archivePrefix={arXiv},
    eprint={2409.11362},
    primaryClass={cs.NI}
}