Towards Generalized On-Chip Communication for Programmable Accelerators in Heterogeneous Architectures
<|reference_start|>Towards Generalized On-Chip Communication for Programmable Accelerators in Heterogeneous Architectures: We present several enhancements to the open-source ESP platform to support flexible and efficient on-chip communication for programmable accelerators in heterogeneous SoCs. These enhancements include 1) a flexible point-to-point communication mechanism between accelerators, 2) a multicast NoC that supports data forwarding to multiple accelerators simultaneously, 3) accelerator synchronization leveraging the SoC's coherence protocol, 4) an accelerator interface that offers fine-grained control over the communication mode used, and 5) an example ISA extension to support our enhancements. Our solution adds negligible area to the SoC architecture and requires minimal changes to the accelerators themselves. We have validated most of these features in complex FPGA prototypes and plan to include them in the open-source release of ESP in the coming months.<|reference_end|>
@article{zuckerman2024towards,
    title={Towards Generalized On-Chip Communication for Programmable Accelerators
  in Heterogeneous Architectures},
    author={Joseph Zuckerman, John-David Wellman, Ajay Vanamali, Manish Shankar,
  Gabriele Tombesi, Karthik Swaminathan, Kevin Lee, Mohit Kapur, Robert
  Philhower, Pradip Bose, Luca P. Carloni},
    journal={arXiv preprint arXiv:2407.04182},
    year={2024},
    archivePrefix={arXiv},
    eprint={2407.04182},
    primaryClass={cs.AR}
}