Hardware Implementation of Projection-Aggregation Decoders for Reed-Muller Codes
<|reference_start|>Hardware Implementation of Projection-Aggregation Decoders for Reed-Muller Codes: This paper presents the hardware implementation of two variants of projection-aggregation-based decoding of Reed-Muller (RM) codes, namely unique projection aggregation (UPA) and collapsed projection aggregation (CPA). Our study focuses on introducing hardware architectures for both UPA and CPA. Through thorough analysis and experimentation, we observe that the hardware implementation of UPA exhibits superior resource usage and reduced energy consumption compared to CPA for the vanilla IPA decoder. This finding underscores a critical insight: software optimizations, in isolation, may not necessarily translate into hardware cost-effectiveness.<|reference_end|>
@article{hashemipour-nazari2024hardware,
    title={Hardware Implementation of Projection-Aggregation Decoders for
  Reed-Muller Codes},
    author={Marzieh Hashemipour-Nazari, Andrea Nardi-Dei, Kees Goossens, Alexios
  Balatsoukas-Stimming},
    journal={arXiv preprint arXiv:2408.10850},
    year={2024},
    archivePrefix={arXiv},
    eprint={2408.10850},
    primaryClass={cs.AR cs.IT eess.SP math.IT}
}