A Programming Model for Disaggregated Memory over CXL
<|reference_start|>A Programming Model for Disaggregated Memory over CXL: CXL (Compute Express Link) is an emerging open industry-standard interconnect between processing and memory devices that is expected to revolutionize the way systems are designed in the near future. It enables cache-coherent shared memory pools in a disaggregated fashion at unprecedented scales, allowing algorithms to interact with a variety of storage devices using simple loads and stores in a cacheline granularity. Alongside with unleashing unique opportunities for a wide range of applications, CXL introduces new challenges of data management and crash consistency. Alas, CXL lacks an adequate programming model, which makes reasoning about the correctness and expected behaviors of algorithms and systems on top of it nearly impossible.   In this work, we present CXL0, the first programming model for concurrent programs running on top of CXL. We propose a high-level abstraction for CXL memory accesses and formally define operational semantics on top of that abstraction. We provide a set of general transformations that adapt concurrent algorithms to the new disruptive technology. Using these transformations, every linearizable algorithm can be easily transformed into its provably correct version in the face of a full-system or sub-system crash. We believe that this work will serve as the stepping stone for systems design and modelling on top of CXL, and support the development of future models as software and hardware evolve.<|reference_end|>
@article{assa2024a,
    title={A Programming Model for Disaggregated Memory over CXL},
    author={Gal Assa, Michal Friedman, Ori Lahav},
    journal={arXiv preprint arXiv:2407.16300},
    year={2024},
    archivePrefix={arXiv},
    eprint={2407.16300},
    primaryClass={cs.DC cs.ET}
}