High Performance Three-Terminal Thyristor RAM with a P+/P/N/P/N/N+ Doping Profile on a Silicon-Photonic CMOS Platform
<|reference_start|>High Performance Three-Terminal Thyristor RAM with a P+/P/N/P/N/N+ Doping Profile on a Silicon-Photonic CMOS Platform: 3T TRAM with doping profile (P+PNPNN+) is experimentally demonstrated on a silicon photonic platform. By using additional implant layers, this device provides excellent memory performance compared to the conventional structure (PNPN). TCAD is used to reflect the physical behavior, and the high-speed memory operations are described through the model.<|reference_end|>
@article{lee2024high,
    title={High Performance Three-Terminal Thyristor RAM with a P+/P/N/P/N/N+
  Doping Profile on a Silicon-Photonic CMOS Platform},
    author={Changseob Lee, Ikhyeon Kwon, Anirban Samanta, Siwei Li, and S. J. Ben
  Yoo},
    journal={arXiv preprint arXiv:2409.07598},
    year={2024},
    archivePrefix={arXiv},
    eprint={2409.07598},
    primaryClass={eess.SY cs.SY}
}