Tree Parity Machine Rekeying Architectures
<|reference_start|>Tree Parity Machine Rekeying Architectures: The necessity to secure the communication between hardware components in embedded systems becomes increasingly important with regard to the secrecy of data and particularly its commercial use. We suggest a low-cost (i.e. small logic-area) solution for flexible security levels and short key lifetimes. The basis is an approach for symmetric key exchange using the synchronisation of Tree Parity Machines. Fast successive key generation enables a key exchange within a few milliseconds, given realistic communication channels with a limited bandwidth. For demonstration we evaluate characteristics of a standard-cell ASIC design realisation as IP-core in 0.18-micrometer CMOS-technology.<|reference_end|>
@article{volkmer2005tree,
    title={Tree Parity Machine Rekeying Architectures},
    author={Markus Volkmer and Sebastian Wallner},
    journal={IEEE Transactions on Computers Vol. 54 No. 4, pp. 421-427, April
  2005},
    year={2005},
    archivePrefix={arXiv},
    eprint={cs/0502062},
    primaryClass={cs.CR cs.AR}
}