PCT No. PCT/SU91/00169 Sec. 371 Date Dec. 18, 1992 Sec. 102(e) Date Dec. 18, 1992 PCT Filed Aug. 20, 1991 PCT Pub. No. WO92/17847 PCT Pub. Date Oct. 15, 1992.A central processor for scientific-technica, economic-statistical computations, for solving the problems of modelling and control with the architecture of an extended instruction work comprises instruction data buffer memories 1 and 3, respectively, a control device 2, a data commutator 4, an arithmeticologic device 5, record-calling, indexing, associative memory, mathematical-to-physical address conversion, interface, subprogram device (6-11), as well as a control character device 13 and an operand readiness device 14, and provides high efficiency both on vector and scalar computations.
Wide instruction word architecture central processor