A semiconductor charge transfer synapse cell has a capacitor coupled between an input line and an intermediate node. A voltage pulse applied to the input line causes charge transfer from one summing line to another through a pair of series connected field-effect devices. Each of the devices has an associated gate potential which controls its resistance. In response to the low-to-high voltage transition of the input pulse current flows through the devices from the intermediate node to the summing lines. A high-to-low transition causes current to flow in the opposite direction. Because the relative conductances of the devices are different depending on the direction of current flow, a net charge is transferred from one summing line to the other. The amount of charge transferred is a function of the amplitude of the pulsed input, the gate potentials, and the capacitance value.
Charge domain differential conductance synapse cell for neural networks