FPGA apparat tezlashtiruvchisini oqimga asoslangan chiziqli qatlam uchun yaratish uchun siz Vitis HLS kutubxonalaridan foydalanishingiz mumkin, shu jumladan hls_math.h, hls_stream.h va ap_fixed.h. Siz kirish va chiqish oqimlarini, shuningdek og'irlik va yon ta'sirli massivlarni, ap_fixed&#60;32,10&#62; belgilangan nuqta turidan foydalanib, deklaratsiya qilishdan boshlashingiz mumkin. Bu erda kodning misoli: #include "hls_math.h" #include "hls_stream.h" #include "ap_fixed.h" typedef_apfixed<32, 10> data_t; void linear_layer_accelerator_hl_stream<data_t> &in_stream, output:: hls::<data
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