text:
<?xml version="1.0" encoding="utf-8"?>
<RelativeLayout xmlns:android="http://schemas.android.com/apk/res/android"
    android:layout_width="match_parent"
    android:layout_height="match_parent" >

        <View
            android:id="@+id/aboveWeek"
            android:layout_width="fill_parent"
            android:layout_height="2dp"
            android:background="#DB8C0C"
             />

        <View
            android:id="@+id/belowWeek"
            android:layout_width="fill_parent"
            android:layout_height="2dp"
            android:layout_below="@+id/weekText"
            android:background="#DB8C0C"
             />

    	<TextView
            android:id="@+id/submissionDate"
            android:layout_width="wrap_content"
            android:layout_height="wrap_content"
            android:layout_alignParentLeft="true"
            android:layout_below="@+id/belowWeek"
            android:layout_marginTop="10dp"
            android:fontFamily="sans-serif-thin"
            android:text="Large Text"
            android:textAppearance="?android:attr/textAppearanceLarge"
            android:textSize="30sp" />

        <ImageButton
            android:id="@+id/editDayButton"
            android:clickable="true"
            android:layout_width="wrap_content"
            android:layout_height="wrap_content"
            android:layout_alignParentRight="true"
            android:layout_below="@+id/belowWeek"
            android:layout_marginLeft="25dp"
            android:layout_marginRight="10dp"
            android:background="#00FFFFFF"
            android:maxHeight="20dp"
            android:maxWidth="20dp"
            android:scaleType="fitCenter"
            android:src="@drawable/ic_pen2" />

        <TextView
            android:id="@+id/weekText"
            android:layout_width="fill_parent"
            android:layout_height="45dp"
            android:layout_below="@+id/aboveWeek"

            android:fontFamily="sans-serif"
            android:textColor="#063A70"
            android:textSize="32sp"

            android:background="#FFFFFF"
            android:gravity="center"
            android:text="Week text"
            android:textAppearance="?android:attr/textAppearanceLarge" />

        <TextView
            android:id="@+id/workTime"
            android:layout_width="wrap_content"
            android:layout_height="wrap_content"
            android:layout_alignBaseline="@+id/submissionDate"
            android:layout_alignBottom="@+id/submissionDate"
            android:layout_toLeftOf="@+id/editDayButton"
            android:clickable="true"
            android:fontFamily="sans-serif-thin"
            android:text="Medium Text"
            android:textAppearance="?android:attr/textAppearanceLarge"
            android:textSize="30sp" />

    </RelativeLayout>


text:
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">

<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<title>diablo2015</title>
<meta name="date" content="2015-02-20">
<link rel="stylesheet" type="text/css" href="../stylesheet.css" title="Style">

diablo2015

Interfaces

Tickable

Classes

Autonomous

DualStickController

Grabber

Lifter

PhysicalConstants

Robot

Roller

Teleop

Enums

Robot.Mode

redpajama_set_name: RedPajamaGithub


text:
define(['jquery', 'OpenLayers', 'jsts'], function($, OpenLayers, jsts) {

	var WKT2GeoJSON = function (wkt){
		var wktReader = new jsts.io.WKTReader();
		var parser = new jsts.io.OpenLayersParser();

		var obj = wktReader.read(wkt)
		var g = parser.write(obj);
		var gType = g.CLASS_NAME;
		var features = [];
		if(gType == "OpenLayers.Geometry.Point"){
			var feature =  { "type": "Feature",
		      "geometry": { "type": "Point", "coordinates": [g.x, g.y] },
		      "properties": {}
		      };
			features.push(feature);
		}else if(gType == "OpenLayers.Geometry.MultiPoint" ){
			var coordinates = g.components;
			var points = [];
			for(var i = 0; i < coordinates.length;i++){
				points.push([coordinates[i].x, coordinates[i].y]);
			}

			var feature =  { "type": "Feature",
			      "geometry": { "type": "MultiPoint", "coordinates": points },
			      "properties": {}
			      };
			features.push(feature);

		}else if(gType == "OpenLayers.Geometry.LineString"){
			var coordinates = g.components;
			var points = [];
			for(var i = 0; i < coordinates.length;i++){
				points.push([coordinates[i].x, coordinates[i].y]);
			}

			var feature =  { "type": "Feature",
			      "geometry": { "type": "LineString", "coordinates": points },
			      "properties": {}
			      };
			features.push(feature);

		}else if(gType == "OpenLayers.Geometry.MultiLineString"){
			var lineStringArray = g.components;
			for(var i = 0; i < lineStringArray.length;i++){
				var lineString = lineStringArray[i];
				var coordinates = lineString.components;
				var points = [];
				for(var j = 0; j < coordinates.length;j++){
					points.push([coordinates[j].x, coordinates[j].y]);
				}

				var feature =  { "type": "Feature",
				      "geometry": { "type": "LineString", "coordinates": points },
				      "properties": {}
				      };
				features.push(feature);
			}

		}else if(gType == "OpenLayers.Geometry.Polygon"){
			var pointsArray = g.components;
			var polygonPoints = [];
			for(var i = 0; i < pointsArray[0].components.length;i++){
				var p = pointsArray[0].components[i];
				polygonPoints.push([p.x,p.y]);
			}
			var holesArray = [];

			for(var i = 1; i < pointsArray.length; i++){
				var holePoints = [];
				for(var j = 0; j < pointsArray[i].components.length;j++){
					var p = pointsArray[i].components[j];
					holePoints.push([p.x,p.y]);
				}
				holesArray.push(holePoints)
			}
			var coordinates = [];
			coordinates.push(polygonPoints);
			for(var i = 0; i < holesArray.length; i++){
				coordinates.push(holesArray[i]);
			}
			var feature =  { "type": "Feature",
				      "geometry": { "type": "Polygon", "coordinates": coordinates },
				      "properties": {}
			      };
			features.push(feature);

		}else if(gType == "OpenLayers.Geometry.MultiPolygon"){
			var components = g.components;
			for(var k = 0; k < components.length;k++){
				var pointsArray = components[k].components;
				var polygonPoints = [];
				for(var i = 0; i < pointsArray[0].components.length;i++){
					var p = pointsArray[0].components[i];
					polygonPoints.push([p.x,p.y]);
				}
				var holesArray = [];

				for(var i = 1; i < pointsArray.length; i++){
					var holePoints = [];
					for(var j = 0; j < pointsArray[i].components.length;j++){
						var p = pointsArray[i].components[j];
						holePoints.push([p.x,p.y]);
					}
					holesArray.push(holePoints)
				}
				var coordinates = [];
				coordinates.push(polygonPoints);
				for(var i = 0; i < holesArray.length; i++){
					coordinates.push(holesArray[i]);
				}
				var feature =  { "type": "Feature",
					      "geometry": { "type": "Polygon", "coordinates": coordinates },
					      "properties": {}
				      };
				features.push(feature);
			}
		}
		var geoJson = {};
		geoJson.type = "FeatureCollection";
		geoJson.features = features;
		console.log(g);
		return geoJson;
	}

	return {
		WKT2GeoJSON: WKT2GeoJSON
	}
});


text:
<?php

namespace yiiunit\extensions\sphinx\data\ar;

/**
 * @property int $id
 * @property string $title
 * @property string $content
 * @property int $type_id
 * @property array $category
 */
class RtIndex extends ActiveRecord
{
    public static function indexName()
    {
        return 'yii2_test_rt_index';
    }
}


text:
title: "KTM 625 LC4 SC SuperMoto, Bj. 2002"
type: verkauft
order: 10
---
## Story
Eigentlich war das Modell 2002 schon recht schnell ausverkauft. Zufällig fand sich aber dann doch noch eine in Bayern, die die meine wurde.

## Bild aus dem Prospekt
{% include wetty/image.html class="right" path="/assets/images/garage/ktm_625_lc4_sc_supermoto.jpg" %}

## Bilder
Meine im Renntrimm, mit meiner bevorzugten Startnummer.

{% include wetty/image.html class="center" path="/assets/images/garage/ktm_625_lc4_sc_supermoto_links.jpg" %}
{% include wetty/image.html class="center" path="/assets/images/garage/ktm_625_lc4_sc_supermoto_rechts.jpg" %}
{% include wetty/image.html class="center" path="/assets/images/garage/ktm_625_lc4_sc_supermoto_vorn.jpg" %}
{% include wetty/image.html class="center" path="/assets/images/garage/ktm_625_lc4_sc_supermoto_hinten.jpg" %}

## Motor

		 Motor 	 1-Zylinder, 4-Takt Motor

		 Bohrung x Hub 	 101 / 78mm

		 Starter 	 Kickstarter

		 Vergaser 	 Keihin FCR 41

		 Schmierung 	 Druckumlaufschierung mit 2 Eatonpumpen

		 Primärtrieb 	 30:81

		 Sekundärantrieb 	 X-Ring Kette 5/8 x 1/4" 520 VM

		 Kühlung 	 Flüssigkeitskühlung

		 Kupplung 	 Mehrscheibenkupplung im Ölbad

		 Zündung 	 Kokusan DC-CDI 4K3

		 Zündkerze 	 NGK DR8 EA

		 Verdichtung 	 11:1

		 Getriebe 	 5 Gänge

		 Steuerung 	 4 V / OHC mit Rollenkipphebel

		 Hubraum 	 625 ccm

		 Leistung 	 23kW / 6000 U/min

		 Max. Drehmoment 	 43Nm / 4500 U/min

		 Motoröl 	 Shell Avance Ultra 4

## Fahrgestell

		 Rahmen 	 Chrom-Molybdän, pulverbeschichtet

		 Rahmenheck 	 Aluminium

		 Lenker 	 Magura, Aluminium konifiziert

		 Federung vorne 	 WP-USD 43 MA

		 Federung hinten 	 WP-Monoshock

		 Federweg vorne/hinten 	 270 / 320 mm

		 Bremse vorne 	 Brembo, 320 mm

		 Bremse hinten 	 Brembo, 220 mm

		 Felge vorne/hinten 	 3,5 x 17", 5 x 17"

		 Bereifung vorne/hinten 	 120/70-17", 160/60-17"

		 Uebersetzung 	 17:38

		 Batterie 	 nein

		 Enddämpfer 	 Aluminium SXC

		 Steuerkopfwinkel 	 63 Grad

		 Nachlauf 	 93 mm

		 Radstand 	 1510 +/- 10 mm

		 Bodenfreiheit (unbelastet) 	 300 mm

		 Sitzhöhe (unbelastet) 	 920 mm

		 Tankinhalt 	 9 Liter / 1,5 Liter Reserve

		 Gewicht 	 ca. 123 kg

## Tripmaster
Kleiner Auszug aus dem [SuperMoto-Forum](http://www.supermoto-forum.de/):
Hier die Bastelanleitung für eine Fernbedienung (Es gibt selbstverständlich keine Garantie, dass es funktioniert und das damit nichts zerstört wird). Ich hab jedenfalls ziemlich alle Kombinationen von den Kabeln mal überbrückt und bei mir geht das Teil noch.

Nun aber:

Batterie besorgen und einbauen. Welche steht auf dem Gehäuse. Zum freien Stecker des Tachos führen 4 Kabel (grün, gelb, blau und lila). Grün ist das Masterkabel.

Grün mit Gelb für länger als 3 Sekunden kurz geschlossen bringt einen in die Konfiguration. Demnach sollte gelb der Mode Button sein. Grün mit blau ist dann rauf bzw. grün mit lila runter. Als Taster funktioniert alles, was einfach beim drücken die beiden Kontakte verbindet. Entweder nimmt man drei Taster aus dem Elektronikladen nebenan und bringt sie irgendwo im Cockpit unter, oder man holt sich im Motorradzubehör diese einzelnen HupenKnöpfe/Killschalter für an den Lenker. Hier kann sich jeder austoben.
Ich werd wahrscheinlich drei kleine Elektroniktaster nehmen und irgendwo im Lenkerpolster unterbringen.

Gruss Wetty

... dem Elektroinschinör ist nix zu schwör

Sehr schöne Bilder dazu gibts bei [Rudolf Zarits](http://home.pages.at/ktmschrauber/)


text:
export Navigation from './Navigation'
export Authenticated from './Authenticated'


text:
namespace TranscendenceChat.ServiceBusShared
{
    public class AccessTokenFastValidator
    {
        public AccessTokenFastValidator()
        {

        }

        public void SaveToken(string token, string deviceId, long userId)
        {
        }

        public bool Validate(string accessToken, string deviceId, long userId)
        {
            //TODO: just a quick call - does deviceId and userId belong to this token or not
            //TODO: implement using Redis cache

            return !string.IsNullOrWhiteSpace(accessToken) && !string.IsNullOrWhiteSpace(deviceId) && userId > 0;
        }
    }
}


text:
require 'facter/operatingsystem/base'
require 'facter/operatingsystem/osreleaselinux'
require 'facter/operatingsystem/cumuluslinux'
require 'facter/operatingsystem/linux'
require 'facter/operatingsystem/sunos'
require 'facter/operatingsystem/vmkernel'
require 'facter/operatingsystem/windows'

module Facter
  module Operatingsystem
    def self.implementation(kernel = Facter.value(:kernel))
      case kernel
      when "Linux", "GNU/kFreeBSD"
        release_info = Facter::Util::Operatingsystem.os_release
        if release_info['NAME'] == "Cumulus Linux"
          Facter::Operatingsystem::CumulusLinux.new
        elsif release_info['NAME'] == "CoreOS"
          Facter::Operatingsystem::OsReleaseLinux.new
        else
          Facter::Operatingsystem::Linux.new
        end
      when "SunOS"
        Facter::Operatingsystem::SunOS.new
      when "VMkernel"
        Facter::Operatingsystem::VMkernel.new
      when "windows"
        Facter::Operatingsystem::Windows.new
      else
        Facter::Operatingsystem::Base.new
      end
    end
  end
end


text:
<?php

/**
* Arquivo: Produtos.php (UTF-8)
*
* Data: 16/10/2014
* @author André Luis Rocha Menutole <andre.rocha@superpay.com.br>
*/

namespace Application\Home\Model;

use Core\AbstractModel;

//Model Exemplo

class Produto extends AbstractModel{
    public $tabela = "posts";

    public function listaProdutos($qtd, $offset = null) {
        return $this->read( null, $qtd, $offset, 'id DESC' );
    }
}


text:
"use strict";
var App_1 = require('./App');
exports.App = App_1.App;
var Chat_1 = require('./Chat');
exports.Chat = Chat_1.Chat;
var directLine_1 = require('./directLine');
exports.DirectLine = directLine_1.DirectLine;
exports.DirectLine3 = directLine_1.DirectLine;
//# sourceMappingURL=BotChat.js.map


text:
class AlbumArtistRelation < ActiveRecord::Base
end


text:
using System;
using System.Collections.Generic;

using Rhino;
using Rhino.Geometry;

namespace RhinoLSystem.Commands {
    public class Thorn : ModelerCommand {

        public override string CommandName() {
            return "Thorn";
        }

        public override int NumberOfArguments() {
            return 7;
        }

        public override void Execute(RhinoTurtle turtle, Rhino.RhinoDoc document, float[] args) {

            double length = args[0];
            double width = args[1];
            double height = args[2];

            double height_bias = args[3];
            double width_bias = args[4];
            double curl = args[5];

            float loft_type = args[6];

            //make four curves and crete closed loft
            Rhino.Geometry.LoftType loft_type_e = ModelerCommand.LoftTypeFromArgument( loft_type, CommandName() );

            curl = Constrain(curl, -1, 1);
            height_bias = Constrain(height_bias, 0.15, 1);
            width_bias = Constrain(width_bias, 0.15, 1);

            double t_inc = RhinoMath.ToRadians(45 * curl);

            double theta = 0;
            double dist = length / 3;
            //double edge_t = thickness * edge_thickness;
            double x = 0;
            double y = 0;
            //build control curve
            Point3d origin = new Point3d(0, 0, 0);

            // double h_wid = width * 0.5;
            double w_inc = width / 3;
            double w1 = w_inc * 3 * width_bias;
            double w2 = w_inc * 2 * width_bias;

            double h_inc = height / 3;
            double h1 = h_inc * 3 * height_bias;
            double h2 = h_inc * 2 * height_bias;

            //increment values
            theta += t_inc;
            x += dist * Math.Cos(theta);
            y += dist * Math.Sin(theta);

            //first control point
            Point3d cp1 = new Point3d(x, 0, y);
            //belly curve points inner/outer
            Point3d ib1 = PerpendicularPoint(cp1, h1, theta);
            Point3d ob1 = PerpendicularPoint(cp1, -h1, theta);
            //right/left points
            Point3d rp1 = cp1 + new Point3d(0, -w1, 0);
            Point3d lp1 = cp1 + new Point3d(0, w1, 0);

            theta += t_inc;
            x += dist * Math.Cos(theta);
            y += dist * Math.Sin(theta);

            Point3d cp2 = new Point3d(x, 0, y);
            //belly curve points inner/outer
            Point3d ib2 = PerpendicularPoint(cp2, h2, theta);
            Point3d ob2 = PerpendicularPoint(cp2, -h2, theta);
            //right/left points
            Point3d rp2 = cp2 + new Point3d(0, -w2, 0);
            Point3d lp2 = cp2 + new Point3d(0, w2, 0);

            theta += t_inc;
            x += dist * Math.Cos(theta);
            y += dist * Math.Sin(theta);

            Point3d end_point = new Point3d(x, 0, y);

            List<Point3d> points_oc = new List<Point3d>();
            List<Point3d> points_ic = new List<Point3d>();
            List<Point3d> points_re1 = new List<Point3d>();
            //List<Point3d> points_re2 = new List<Point3d>();
            List<Point3d> points_le1 = new List<Point3d>();
            //List<Point3d> points_le2 = new List<Point3d>();
            //outer curve
            points_oc.Add(origin + new Point3d(0, 0, -height));
            points_oc.Add(ob1);
            points_oc.Add(ob2);
            points_oc.Add(end_point);

            //inner curve
            points_ic.Add(origin + new Point3d(0, 0, height));
            points_ic.Add(ib1);
            points_ic.Add(ib2);
            points_ic.Add(end_point);

            //right edge curves
            points_re1.Add(origin + new Point3d(0, -width, 0));
            points_re1.Add(rp1);
            points_re1.Add(rp2);
            points_re1.Add(end_point);

            //left edge curve
            points_le1.Add(origin + new Point3d(0, width, 0));
            points_le1.Add(lp1);
            points_le1.Add(lp2);
            points_le1.Add(end_point);

            //create curves
            Curve oc_crv = Curve.CreateInterpolatedCurve(points_oc, 3);
            Curve ic_crv = Curve.CreateInterpolatedCurve(points_ic, 3);

            Curve re1_crv = Curve.CreateInterpolatedCurve(points_re1, 3);

            Curve le1_crv = Curve.CreateInterpolatedCurve(points_le1, 3);

            List<Curve> curves = new List<Curve>();

            curves.Add(oc_crv);
            curves.Add(re1_crv);

            curves.Add(ic_crv);

            curves.Add(le1_crv);

            Brep[] breps = Brep.CreateFromLoft(curves, Point3d.Unset, Point3d.Unset, loft_type_e, true);

            if (breps != null) {

                if (breps.Length == 1) {

                    Plane w_xy_plane = Plane.WorldXY;
                    Brep l_brep = breps[0];
                    l_brep.Transform(Transform.PlaneToPlane(w_xy_plane, turtle.Plane));

                    if (document.Objects.AddBrep(breps[0], turtle.Attributes) == Guid.Empty) {
                        throw new Exception("Failed to Create Brep object in: " + CommandName());
                    }
                } else {

                    throw new Exception("Too many surfaces Loft geometry in: " + CommandName());

                }

            } else {

                throw new Exception("Failed to Create Loft geometry in: " + CommandName());
            }
            //L1 = breps[0];

        }//end execute

        /// <summary>
        /// Helper function to constrain values - part of the checking process.
        /// </summary>
        /// <param name="val">value to constrain</param>
        /// <param name="min">minimum allowed value</param>
        /// <param name="max">maximum allowed value</param>
        /// <returns></returns>
        private double Constrain(double val, double min, double max) {

            if (val > max) {
                return max;
            }

            if (val < min) {
                return min;
            }

            return val;

        }

        /// <summary>
        /// Helper function for the building of profile curves,.
        /// </summary>
        /// <param name="point">base point</param>
        /// <param name="dist">distance from base point</param>
        /// <param name="ang">base angle in XZ Plane</param>
        /// <returns>Point perpendicular to base point in XZ Plane</returns>
        private Point3d PerpendicularPoint(Point3d point, double dist, double ang) {

            Point3d rPoint = new Point3d();
            double hpi = Math.PI * 0.5;
            rPoint.X = dist * Math.Cos(ang + hpi);
            rPoint.Z = dist * Math.Sin(ang + hpi);

            rPoint += point;

            return rPoint;

        }

    }//end class
}


text:
dongsamb Portfolio
=========================

## Link
####[http://pf.dongsamb.com](http://pf.dongsamb.com)

## info
- powered by [Jekyll](https://jekyllrb.com/)
- Using [Freelancer Jekyll theme](https://github.com/jeromelachaud/freelancer-theme)
- hosted by [Github Pages](https//pages.github.com/)

## Screenshot
![screenshot](https://raw.githubusercontent.com/dongsam/portfolio/master/screenshot.png)


text:
namespace Azure.Maps.Routing.Models
{
    /// <summary> An item returned from Route Directions Batch service call. </summary>
    internal partial class RouteDirectionsBatchItem : BatchResultItem
    {
        /// <summary> Initializes a new instance of RouteDirectionsBatchItem. </summary>
        internal RouteDirectionsBatchItem()
        {
        }

        /// <summary> Initializes a new instance of RouteDirectionsBatchItem. </summary>
        /// <param name="statusCode"> HTTP request status code. </param>
        /// <param name="response"> The result of the query. RouteDirections if the query completed successfully, ErrorResponse otherwise. </param>
        internal RouteDirectionsBatchItem(int? statusCode, RouteDirectionsBatchItemResponse response) : base(statusCode)
        {
            Response = response;
        }

        /// <summary> The result of the query. RouteDirections if the query completed successfully, ErrorResponse otherwise. </summary>
        public RouteDirectionsBatchItemResponse Response { get; }
    }
}


text:
require_relative './util/forge'
require_relative './util/stash'
require_relative './exceptions'

module Typetanic
  class Email
    extend Forge
    extend Stash

    REGEX = /^(?<local_part>[^@]+)@(?<hostname>[^@]+)$/

    def initialize(raw)
      @match = REGEX.match raw.strip
      unless match
        raise Invalid.new "'#{raw}' is not a valid email"
      end
    end

    attr_reader :match
    private :match

    def local_part
      match[:local_part]
    end

    def hostname
      match[:hostname]
    end

    def domains
      array = hostname.split '.'
      array.reverse
    end

    def top_level_domain
      domains.first
    end

    def to_s
      @match.to_s
    end
    alias_method :to_str, :to_s

    def <=>(other)
      domain_comparison = domains.join <=> other.domains.join
      return domain_comparison unless domain_comparison == 0
      local_part <=> other.local_part
    end

    def ==(other)
      to_s == other.to_s
    end

    def self.load(string)
      new string
    end
    alias_method :dump, :to_s
  end
end


text:
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">

<TITLE>
org.apache.hadoop.metrics.spi (chukwa 0.4.0 API)
</TITLE>

<META NAME="date" CONTENT="2010-04-12">

<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../../../stylesheet.css" TITLE="Style">

org.apache.hadoop.metrics.spi

Classes

AbstractMetricsContext


text:
""" Decorators for validating task requirements and outputs

This validation should cause errors to occur when gathering an assortment of
delayed tasks, and not when executed.

Validation of requirements and outputs may be specified in terms of the
`data` and `record` information that they interact with. A normalized
difference vegetation index, for example, requires two spectral bands and
outputs a single index. We want to allow the user to specify the names of the
input spectral bands and the name of the output transformation to make this
function more generalized and usable in a pipeline. The fact that this wrapper
function requires two input strings (as the spectral band names in an
``xarray.Dataset``, for example) can be specified using the ``@require``
decorator function, an indicator for either `data` or `record` structures,
and a ``list`` of objects.

The validation for this task may be specified as::

.. code-block:: python

    @requires(data=[str, str])
    @outputs(data=[str])
    def norm_diff(work, require, output, **config):
        ...

The objects used here were of type ``type``, but one might use ``str`` objects
if the names were suggestive of a particular intended meaning::

.. code-block:: python

    @requires(data=['nir', 'red'])
    @outputs(data=['ndvi'])
    def ndvi(work, require, output, **config):
        ...

Some tasks may allow a variable number of inputs. This may be accomplished
by providing an empty list, as demonstrated below for the `data` requirement::

.. code-block:: python
    @requires(data=[])
    @outputs(data=[str])
    def sum_all_spectral_bands(work, require, output, **config):
        ...

If a task allows a requirement or output, but this requirement or output is
optional, then it may be specified as optional using the full syntax in a tuple
``(bool: required, signature)``. By default, we assume that requirements and
output specifications are not optional.

.. code-block:: python
    @requires(data=[str, str],
             record=(False, [str]))
    def some_task(work, require, output, **config):
        ...

"""
import functools
import inspect

import decorator
import future.utils

from .language import OUTPUT, REQUIRE
from ..errors import PipelineConfigurationError as PCError

def eager_task(func):
    """ A task decorator that declares it can compute all pixels at once
    """
    func.is_eager = True
    return func

def _parse_signature(signature):
    """ Parse a signature for basic validity and structure

    Args:
        signature (iterable): A ``list`` of objects or a ``tuple`` of ``bool``,
            ``list`` giving the required-ness of this signature and the
            signature

    Returns:
        tuple[bool, list]: The signature

    Raises:
        KeyError: If ``name`` isn't a supported type of function signature
        TypeError: If ``signature`` is invalid
    """

    # Given as <str:name>=[<object>, ...]
    if isinstance(signature, list):
        return (True, signature)
    # Given as <str:name>=(<bool:required>, [<object>, ...]])
    elif (isinstance(signature, tuple) and len(signature) == 2 and
          isinstance(signature[0], bool) and isinstance(signature[1], list)):
        return signature
    else:
        raise PCError("Invalid signature: {sig}".format(sig=signature))

def _validate_specification(spec, signature):
    if not isinstance(spec, dict):
        raise TypeError(" should be a dictionary")

    for name, (required, description) in signature.items():
        if required and name not in spec:
            raise KeyError("Required attribute, '{}', not passed to function"
                           .format(name))
        elif name in spec:
            value = spec[name]
            # If the specification description has a specific length requirement
            if description and len(value) != len(description):
                raise ValueError("Specification requires {n} elements ({desc})"
                                 " but {n2} elements were passed"
                                 .format(n=len(description),
                                         desc=description,
                                         n2=len(value)))

def check(name, **signature):
    """ Validate inputs to argument `name`

    Args:
        name (str): Name of argument (this argument should expect a `dict`)
        signature (dict): Keyword arguments gathered

    Raises:
        PipelineConfigurationError: Raise if function use doesn't match
            required signature. Note that this error is a subclass of TypeError

    """
    # Allow:
    #   1) Explicit "required": `check('x', data=(False, [str]))`
    #   2) Assume default (not required): `check('x', data=[str])`
    for k, sig in signature.items():
        signature[k] = _parse_signature(sig)

    @decorator.decorator
    def wrapper(func, *args, **kwargs):
        arg_names, va_args, va_kwargs, _ = inspect.getargspec(func)
        if name not in arg_names:
            raise PCError("Argument specified, '{}', does not match "
                          "function call signature".format(name))
        arg_idx = arg_names.index(name)
        arg = args[arg_idx]

        try:
            _validate_specification(arg, signature)
        except Exception as exc:
            future.utils.raise_with_traceback(PCError(
                "Argument to '{}' is invalid:: {}: {}"
                .format(name, exc.__class__.__name__, exc)))
        return func(*args, **kwargs)

    return wrapper

#: Decorator to check inputs to `output` argument
outputs = functools.partial(check, OUTPUT)
#: Decorator to check inputs to `require` argument
requires = functools.partial(check, REQUIRE)


text:
class IPatchFilter: public IImageSubprocessor
{
public:
    virtual ~IPatchFilter() {};
    virtual std::vector<CImagePatch> FilterPatches(const std::vector<CImagePatch>& patches) const = 0;
};


text:
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text:
#ifndef __ARCH_MIPS_INCLUDE_PIC32MZ_CP0_H
#define __ARCH_MIPS_INCLUDE_PIC32MZ_CP0_H

/****************************************************************************
 * Included Files
 ****************************************************************************/

#include <nuttx/config.h>

#include <arch/mips32/cp0.h>

/****************************************************************************
 * Pre-Processor Definitions
 ****************************************************************************/
/* CP0 Register Addresses ***************************************************/

#ifdef __ASSEMBLY__

#  define PIC32MZ_CP0_INDEX      $0,0   /* Index into TLB array */
#  define PIC32MZ_CP0_RANDOM     $1,0   /* Randomly index into TLB array */
#  define PIC32MZ_CP0_ENTRYLO0   $2,0   /* Lower TLB entry, even pages */
#  define PIC32MZ_CP0_ENTRYLO1   $3,0   /* Lower TLB entry, odd pages */
#  define PIC32MZ_CP0_CONTEXT    $4,0   /* Address of page table entry in memory */
#  define PIC32MZ_CP0_USERLOCAL  $4,2   /* User read/write register */
#  define PIC32MZ_CP0_PAGEMASK   $5,0   /* Controls the variable page sizes */
#  define PIC32MZ_CP0_PAGEGRAIN  $5,1   /* Enables support of 1 KB pages */
#  define PIC32MZ_CP0_WIRED      $6,0   /* Number of fixed TLB entries */
#  define PIC32MZ_CP0_HWRENA     $7,0   /* Enables access via RDHWR hardware registers */
#  define PIC32MZ_CP0_BADVADDR   $8,0   /* Address of most recent exception */
#  define PIC32MZ_CP0_COUNT      $9,0   /* Processor cycle count */
#  define PIC32MZ_CP0_ENTRYHI    $10,0  /* Upper TLB entry */
#  define PIC32MZ_CP0_COMPARE    $11,0  /* Timer interrupt control */
#  define PIC32MZ_CP0_STATUS     $12,0  /* Processor status and control */
#  define PIC32MZ_CP0_INTCTL     $12,1  /* Interrupt system status and control */
#  define PIC32MZ_CP0_SRSCTL     $12,2  /* Shadow register set status and control */
#  define PIC32MZ_CP0_SRSMAP     $12,3  /* Maps from vectored interrupt to a shadow set */
#  define PIC32MZ_CP0_VIEWIPL    $12,4  /* Priority level access */
#  define PIC32MZ_CP0_SRSMAP2    $12,5  /* Vector number to shadow set mapping */
#  define PIC32MZ_CP0_CAUSE      $13,0  /* Cause of last general exception */
#  define PIC32MZ_CP0_VIEWRIPL   $13,4  /* RIPL accesss */
#  define PIC32MZ_CP0_NESTEDEXC  $13,5  /* Prior error and exception level */
#  define PIC32MZ_CP0_EPC        $14,0  /* Program counter at last exception */
#  define PIC32MZ_CP0_NESTEDEPC  $14,2  /* Prior EPC */
#  define PIC32MZ_CP0_PRID       $15,0  /* Processor identification and revision */
#  define PIC32MZ_CP0_EBASE      $15,1  /* Exception vector base register */
#  define PIC32MZ_CP0_CDMMBASE   $15,2  /* Common device memory map base */
#  define PIC32MZ_CP0_CONFIG     $16,0  /* Configuration register */
#  define PIC32MZ_CP0_CONFIG1    $16,1  /* Configuration register 1 */
#  define PIC32MZ_CP0_CONFIG2    $16,2  /* Configuration register 3 */
#  define PIC32MZ_CP0_CONFIG3    $16,3  /* Configuration register 3 */
#  define PIC32MZ_CP0_CONFIG4    $16,4  /* Configuration register 4 */
#  define PIC32MZ_CP0_CONFIG5    $16,5  /* Configuration register 5 */
#  define PIC32MZ_CP0_CONFIG7    $16,7  /* Configuration register 7 */
#  define PIC32MZ_CP0_LLADDR     $17,0  /* Load link address */
#  define PIC32MZ_CP0_WATCHLO    $18,0  /* Low-order watchpoint address */
#  define PIC32MZ_CP0_WATCHHI    $19,0  /* High-order watchpoint address */
#  define PIC32MZ_CP0_DEBUG      $23,0  /* Debug control and exception status */
#  define PIC32MZ_CP0_TRACECTRL  $23,1  /* EJTAG trace control */
#  define PIC32MZ_CP0_TRACECTRL2 $23,2  /* EJTAG trace control 2 */
#  define PIC32MZ_CP0_TRACEDATA1 $23,3  /* EJTAG user trace data 1 register */
#  define PIC32MZ_CP0_TRACEBPC   $23,4  /* EJTAG trace breakpoint register */
#  define PIC32MZ_CP0_DEBUG2     $23,5  /* Debug control/exception status 2 */
#  define PIC32MZ_CP0_DEPC       $24,0  /* Program counter at last debug exception */
#  define PIC32MZ_CP0_TRACEDATA2 $24,3  /* EJTAG user trace data 2 register */
#  define PIC32MZ_CP0_PERFCTL0   $25,0  /* Performance counter 0 control */
#  define PIC32MZ_CP0_PERFCNT0   $25,1  /* Performance counter 0 */
#  define PIC32MZ_CP0_PERFCTL1   $25,2  /* Performance counter 1 control */
#  define PIC32MZ_CP0_PERFCNT1   $25,3  /* Performance counter 1 */
#  define PIC32MZ_CP0_ERRCTL     $26,0  /* Test enable for cache RAM arrays */
#  define PIC32MZ_CP0_TAGLO      $28,0  /* Low-order portion of cache tag interface */
#  define PIC32MZ_CP0_DATALO     $28,1  /* Low-order portion of cache tag interface */
#  define PIC32MZ_CP0_ERREPC     $30,0  /* Program counter at last error */
#  define PIC32MZ_CP0_DESAVE     $31,0  /* Debug handler scratchpad register */
#endif

/* CP0 Registers ************************************************************/

/* Register Number: 0 Sel: 0 Name: Index
 * Compliance Level: Required for TLB-based MMU; Optional otherwise.
 * To be provided
 */

/* Register Number: 1 Sel: 0 Name: Random
 * Compliance Level: Required for TLB-based MMU; Optional otherwise.
 * To be provided
 */

/* Register Number: 2 Sel: 0 Name: EntryLo0
 * Compliance Level: Required for TLB-based MMU; Optional otherwise.
 * To be provided
 */

/* Register Number: 3 Sel: 0 Name: EntryLo1
 * Compliance Level: Required for TLB-based MMU; Optional otherwise.
 * To be provided
 */

/* Register Number: 4 Sel: 0 Name: Context
 * Compliance Level: Required for TLB-based MMU; Optional otherwise.
 * To be provided
 */

/* Register Number: 4 Sel: 2 Name: UserLocal
 * Function: User read/write register
 * Compliance Level: Required for TLB-based MMU; Optional otherwise.
 * To be provided
 */

/* Register Number: 5 Sel: 0 Name: PageMask
 * Function: Used for reading from and writing to the TLB
 * Compliance Level: Required for TLB-based MMU; Optional otherwise.
 * To be provided
 */

/* Register Number: 5 Sel: 1 Name: PageGrain
 * Function: Enable or disable the read and execute inhibit bits in the
 *           EntryLo0 and EntryLo1 registers.
 * Compliance Level: Required for TLB-based MMU; Optional otherwise.
 * To be provided
 */

/* Register Number: 6 Sel: 0 Name: Wired
 * Compliance Level: Required for TLB-based MMU; Optional otherwise.
 * To be provided
 */

/* Register Number: 7 Sel: 0 Name: HWREna
 * Function: Enables access via the RDHWR instruction to selected hardware
 *   registers in non-privileged mode.
 * Compliance Level: (Reserved for future extensions)
 */

#define CP0_HWRENA_SHIFT            (0)       /* Bits 0-3: Enable access to a hardware resource */
#define CP0_HWRENA_MASK             (15 << CP0_HWRENA_SHIFT)
#  define CP0_HWRENA_BIT0           (1 << CP0_HWRENA_SHIFT)
#  define CP0_HWRENA_BIT1           (2 << CP0_HWRENA_SHIFT)
#  define CP0_HWRENA_BIT2           (4 << CP0_HWRENA_SHIFT)
#  define CP0_HWRENA_BIT3           (8 << CP0_HWRENA_SHIFT)
#define CP0_HWRENA_ULR              (1 << 29) /* Bit 29: User Local Register bit */

/* Register Number: 8 Sel: 0 Name: BadVAddr
 * Function: Reports the address for the most recent address-related
 *   exception
 * Compliance Level: Required.
 *
 *   See arch/mips/include/mips32/cp0.h
 *
 * Register Number: 9 Sel: 0 Name: Count
 * Function: Processor cycle count
 * Compliance Level: Required.
 *
 *   See arch/mips/include/mips32/cp0.h
 */

/* Register Number: 10 Sel: 0 Name: EntryHi
 * Compliance Level: Required for TLB-based MMU; Optional otherwise.
 */

/* Register Number: 11 Sel: 0 Name: Compare
 * Function: Timer interrupt control
 * Compliance Level: Required.
 *
 *   See arch/mips/include/mips32/cp0.h
 */

/* Register Number: 12 Sel: 0 Name: Status
 * Function: Processor status and control
 * Compliance Level: Required.
 *
 *   See arch/mips/include/mips32/cp0.h
 *   NOTES:
 *   1. The following are reserved bits in the PIC32MZ:
 *      CP0_STATUS_UX   Bit 5: Enables 64-bit user address space (Not MIPS32)
 *      CP0_STATUS_SX   Bit 6: Enables 64-bit supervisor address space (Not MIPS32)
 *      CP0_STATUS_KX   Bit 7: Enables 64-bit kernel address space (Not MIPS32)
 *      CP0_STATUS_IMPL Bits 16-17: Implementation dependent
 *      CP0_STATUS_PX   Bit 23: Enables 64-bit operations (Not MIPS32)
 *      CP0_STATUS_FR   Bit 26: Controls the floating point register mode (Not MIPS32)
 *      CP0_STATUS_MX   Bit 24: Enables MDMX™ (Not MIPS32)
 *      CP0_STATUS_CU1  Bit 29: Controls access to coprocessor 1
 *      CP0_STATUS_CU2  Bit 30: Controls access to coprocessor 2
 *      CP0_STATUS_CU3  Bit 31: Controls access to coprocessor 3
 */

#undef CP0_STATUS_UX
#undef CP0_STATUS_SX
#undef CP0_STATUS_KX
#undef CP0_STATUS_IMPL
#undef CP0_STATUS_IMPL_SHIFT
#undef CP0_STATUS_IMPL_MASK
#undef CP0_STATUS_PX
#undef CP0_STATUS_FR
#undef CP0_STATUS_CU1
#undef CP0_STATUS_CU2
#undef CP0_STATUS_CU3

/*   2. The following field is of a different width.  Apparently, it
 *      excludes the software interrupt bits.
 *
 *      CP0_STATUS_IM   Bits 8-15: Interrupt Mask
 *      Vs.
 *      CP0_STATUS_IPL  Bits 10-16+18: Interrupt priority level
 *                      Bits 8-9 reserved
 */

#define CP0_STATUS_IPL_SHIFT        (10)   /*  Bits 10-16+18: Interrupt priority level */
#define CP0_STATUS_IPL_MASK         (0x17f << CP0_STATUS_IPL_SHIFT)

/*   3. Supervisor mode not supported
 *       CP0_STATUS_KSU Bits 3-4: Operating mode (with supervisor mode)
 */

#undef CP0_STATUS_KSU_SUPER

/* Register Number: 12 Sel: 1 Name: IntCtl */

#define CP0_INTCTL_VS_SHIFT         (5)       /* Bits 5-9: Vector spacing bits */
#define CP0_INTCTL_VS_MASK          (0x1f << CP0_INTCTL_VS_SHIFT)
#  define CP0_INTCTL_VS_0BYTES      (0x00 << CP0_INTCTL_VS_SHIFT)
#  define CP0_INTCTL_VS_32BYTES     (0x01 << CP0_INTCTL_VS_SHIFT)
#  define CP0_INTCTL_VS_64BYTES     (0x02 << CP0_INTCTL_VS_SHIFT)
#  define CP0_INTCTL_VS_128BYTES    (0x04 << CP0_INTCTL_VS_SHIFT)
#  define CP0_INTCTL_VS_256BYTES    (0x08 << CP0_INTCTL_VS_SHIFT)
#  define CP0_INTCTL_VS_512BYTES    (0x10 << CP0_INTCTL_VS_SHIFT)

/* Register Number: 12 Sel: 2 Name: SRSCtl */

#define CP0_SRSCTL_CSS_SHIFT        (0)       /* Bits 0-3: Current shadow bit set */
#define CP0_SRSCTL_CSS_MASK         (15 << CP0_SRSCTL_CSS_SHIFT)
#define CP0_SRSCTL_PSS_SHIFT        (6)       /* Bits 6-9: Previous shadow set */
#define CP0_SRSCTL_PSS_MASK         (15 << CP0_SRSCTL_PSS_SHIFT)
#define CP0_SRSCTL_ESS_SHIFT        (12)      /* Bits 12-15: Exception shadow sets */
#define CP0_SRSCTL_ESS_MASK         (15 << CP0_SRSCTL_ESS_SHIFT)
#define CP0_SRSCTL_EICSS_SHIFT      (18)      /* Bits 18-21: External interrupt controller shadow sets */
#define CP0_SRSCTL_EICSS_MASK       (15 << CP0_SRSCTL_EICSS_SHIFT)
#define CP0_SRSCTL_HSS_SHIFT        (26)      /* Bits 26-29: High shadow sets */
#define CP0_SRSCTL_HSS_MASK         (15 << CP0_SRSCTL_HSS_SHIFT)
#  define CP0_SRSCTL_HSS_1SET       (0 << CP0_SRSCTL_HSS_SHIFT) /* One shadow set (normal GPR set) */
#  define CP0_SRSCTL_HSS_2SETS      (1 << CP0_SRSCTL_HSS_SHIFT) /* Two shadow sets */
#  define CP0_SRSCTL_HSS_4SETS      (3 << CP0_SRSCTL_HSS_SHIFT) /* Four shadow sets */

/* Register Number: 12 Sel: 3 Name: SRSMap */

#define CP0_SRSMAP_SSV0_SHIFT       (0)       /* Bits 0-3: Shadow set vector 0 */
#define CP0_SRSMAP_SSV0_MASK        (15 << CP0_SRSMAP_SSV0_SHIFT)
#define CP0_SRSMAP_SSV1_SHIFT       (4)       /* Bits 4-7: Shadow set vector 1 */
#define CP0_SRSMAP_SSV1_MASK        (15 << CP0_SRSMAP_SSV1_SHIFT)
#define CP0_SRSMAP_SSV2_SHIFT       (8)       /* Bits 8-11: Shadow set vector 2 */
#define CP0_SRSMAP_SSV2_MASK        (15 << CP0_SRSMAP_SSV2_SHIFT)
#define CP0_SRSMAP_SSV3_SHIFT       (12)      /* Bits 12-15: Shadow set vector 3 */
#define CP0_SRSMAP_SSV3_MASK        (15 << CP0_SRSMAP_SSV3_SHIFT)
#define CP0_SRSMAP_SSV4_SHIFT       (16)      /* Bits 16-19: Shadow set vector 4 */
#define CP0_SRSMAP_SSV4_MASK        (15 << CP0_SRSMAP_SSV4_SHIFT)
#define CP0_SRSMAP_SSV5_SHIFT       (20)      /* Bits 20-23: Shadow set vector 5 */
#define CP0_SRSMAP_SSV5_MASK        (15 << CP0_SRSMAP_SSV5_SHIFT)
#define CP0_SRSMAP_SSV6_SHIFT       (24)      /* Bits 24-27: Shadow set vector 6 */
#define CP0_SRSMAP_SSV6_MASK        (15 << CP0_SRSMAP_SSV6_SHIFT)
#define CP0_SRSMAP_SSV7_SHIFT       (28)      /* Bits 28-31: Shadow set vector 7 */
#define CP0_SRSMAP_SSV7_MASK        (15 << CP0_SRSMAP_SSV7_SHIFT)

/* Register Number: 12 Sel: 4 Name: View_Ipl
 * To be provided
 */

/* Register Number: 12 Sel: 5 Name: SRSMap2
 * To be provided
 */

/* Register Number: 13 Sel: 0 Name: Cause
 * Function: Cause of last general exception
 * Compliance Level: Required.
 *
 *   See arch/mips/include/mips32/cp0.h
 *   NOTES: The following bits are added in the PIC32:
 */

#define CP0_CAUSE_R                 (1 << 26) /* Bit 26: R bit */
#define CP0_CAUSE_DC                (1 << 27) /* Bit 27: Disable count */
#define CP0_CAUSE_TI                (1 << 30) /* Bit 30: Timer interrupt bit */

/* Register Number: 13 Sel: 4 Name: View_RIPL
 * To be provided
 */

/* Register Number: 13 Sel: 5 Name: NestedExc
 * To be provided
 */

/* Register Number: 14 Sel: 0 Name: EPC
 * Function: Program counter at last exception
 * Compliance Level: Required.
 *
 *   See arch/mips/include/mips32/cp0.h
 */

/* Register Number: 14 Sel: 2 Name: NestedEPC
 * To be provided
 */

/* Register Number: 15 Sel: 0 Name: PRId
 * Function: Processor identification and revision
 * Compliance Level: Required.
 *
 *   See arch/mips/include/mips32/cp0.h
 *   NOTE: Slightly different bit interpretations of some fields:
 */

#define CP0_PRID_PATCH_SHIFT        (5)       /* Bits 0-1: Patch level */
#define CP0_PRID_PATCH_MASK         (3 << CP0_PRID_PATCH_SHIFT)
#define CP0_PRID_MINOR_SHIFT        (2)       /* Bits 2-4: Minor revision number */
#define CP0_PRID_MINOR_MASK         (7 << CP0_PRID_MINOR_SHIFT)
#define CP0_PRID_MAJOR_SHIFT        (5)       /* Bits 5-7: Major revision number */
#define CP0_PRID_MAJOR_MASK         (7 << CP0_PRID_MAJOR_SHIFT)

#undef CP0_PRID_OPTIONS_SHIFT
#undef CP0_PRID_OPTIONS_MASK

/* Register Number: 15 Sel: 1 Name: EBASE */

#define CP_EBASE_CPUNUM_SHIFT      (0)        /* Bits 0-9: CPU number */
#define CP_EBASE_CPUNUM_MASK       (0x3ff << CP_EBASE_CPUNUM_SHIFT)
#define CP_EBASE_SHIFT             (12)       /* Bits 30-31=10, Bits 12-29: Exception base */
#define CP_EBASE_MASK              (0x3ffff << CP_EBASE_SHIFT)

/* Register Number: 15 Sel: 2 Name: CDMMBase
 * To be provided
 */

/* Register Number: 16 Sel: 0 Name: Config
 * Function: Configuration register
 * Compliance Level: Required.
 *
 *   See arch/mips/include/mips32/cp0.h
 *   1. PIC32MZ is always little-endian.
 *   2. Implementation specific bits defined.
 */

#undef CP0_CONFIG_MT_NONE
#undef CP0_CONFIG_MT_TLB
#undef CP0_CONFIG_MT_BAT

#undef CP0_CONFIG_IMPL_SHIFT
#undef CP0_CONFIG_IMPL_MASK

#define CP0_CONFIG_DS               (1 << 16) /* Dual SRAM bit */
#define CP0_CONFIG_BM               (1 << 16) /* Burst Mode bit */
#define CP0_CONFIG_MM_SHIFT         (17)      /* Bits 17-18: Merge Mode bits */
#define CP0_CONFIG_MM_MASK          (3 << CP0_CONFIG_MM_SHIFT)
#  define CP0_CONFIG_MM_PROHIBITED  (0 << CP0_CONFIG_MM_SHIFT) /* Merging is not allowed */
#  define CP0_CONFIG_MM_ALLOWED     (2 << CP0_CONFIG_MM_SHIFT) /* Merging is allowed */
#define CP0_CONFIG_MDU              (1 << 20) /* Multipley/Divide unit bit */
#define CP0_CONFIG_SB               (1 << 21) /* Bit 32: Simple BE bus mode bit */
#define CP0_CONFIG_UDI              (1 << 22) /* Bit 22: User defined bit */
#define CPO_CONFIG_DSP              (1 << 23) /* Bit 24: Data Scratchpad RAM bit */
#define CPO_CONFIG_ISP              (1 << 24) /* Bit 24: Instruction Scratchpad RAM bit */
#define CP0_CONFIG_KU_SHIFT         (25)      /* Bits 25-27: KUSEG and USEG cacheability */
#define CP0_CONFIG_KU_MASK          (7 << CP0_CONFIG_KU_SHIFT)
#  define CP0_CONFIG_KU_UNCACHED    (2 << CP0_CONFIG_KU_SHIFT)
#  define CP0_CONFIG_KU_CACHEABLE   (3 << CP0_CONFIG_KU_SHIFT)
#define CP0_CONFIG_K23_SHIFT        (28)      /* Bits 28-30:  KSEG2 and KSEG3 cacheability */
#define CP0_CONFIG_K23_MASK         (7 << CP0_CONFIG_K23_SHIFT)
#  define CP0_CONFIG_K23_UNCACHED   (2 << CP0_CONFIG_K23_SHIFT)
#  define CP0_CONFIG_K23_CACHEABLE  (3 << CP0_CONFIG_K23_SHIFT)

/* Register Number: 16 Sel: 1 Name: Config1
 * Function: Configuration register 1
 * Compliance Level: Required.
 *
 *   See arch/mips/include/mips32/cp0.h
 *
 * Register Number: 16 Sel: 2 Name: Config2
 * Function: Configuration register 2
 * Compliance Level: Optional.
 *
 *   See arch/mips/include/mips32/cp0.h
 */

#undef CP0_CONFIG2_TBS_SHIFT
#undef CP0_CONFIG2_TBS_MASK

/* Register Number: 16 Sel: 3 Name: Config3
 * Function: Configuration register 3
 * Compliance Level: Optional.
 *
 *   See arch/mips/include/mips32/cp0.h
 */

#define CP0_CONFIG3_SP              (1 << 4)  /* Bit 4: Support page bit */
#define CP0_CONFIG3_VINT            (1 << 5)  /* Bit 5: Vector interrupt bit */
#define CP0_CONFIG3_VEIC            (1 << 6)  /* Bit 6: External interrupt controller supported */

/* Register Number: 16 Sel: 4 Name: Config4
 * To be provided
 */

/* Register Number: 16 Sel: 5 Name: Config5
 * To be provided
 */

/* Register Number: 16 Sel: 7 Name: Config7
 * To be provided
 */

/* Register Number: 17 Sel: 0 Name: LLAddr
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 18 Sel: 0 Name: WatchLo
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 19 Sel: 0 Name: WatchHi
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 20-22 Reserved
 * Compliance Level: Optional.
 */

/* Register Number: 23 Sel: 0 Name: Debug
 * Function: EJTAG Debug register
 * Compliance Level: Optional.
 */

#define CP0_DEBUG_DSS               (1 << 0) /* Bit 0: Debug single-step exception */
#define CP0_DEBUG_DBP               (1 << 1) /* Bit 1: Debug software breakpoint exception */
#define CP0_DEBUG_DDBL              (1 << 2) /* Bit 2: Debug data break exception on load */
#define CP0_DEBUG_DDBS              (1 << 3) /* Bit 3: Debug data break exception on store */
#define CP0_DEBUG_DIB               (1 << 4) /* Bit 4: Debug instruction break exception */
#define CP0_DEBUG_DINT              (1 << 5) /* Bit 5: Debug interrupt exception */
#define CP0_DEBUG_SST               (1 << 8) /* Bit 6: Enable debug single step exception */
#define CP0_DEBUG_NOSST             (1 << 9) /* Bit 7: No single step feature available */
#define CP0_DEBUG_DEXCCODE_SHIFT    (10)     /* Bits 10-14: Cause of latest exception in DEBUG mode */
#define CP0_DEBUG_DEXCCODE_MASK     (31 << CP0_DEBUG_DEXCCODE_SHIFT)
#define CP0_DEBUG_VER_SHIFT         (15)     /* Bits 15-17: EJTAG version */
#define CP0_DEBUG_VER_MASK          (7 << CP0_DEBUG_VER_SHIFT)
#define CP0_DEBUG_DDBLIMPR          (1 << 18) /* Bit 18: Imprecise debug data break load instruction */
#define CP0_DEBUG_DDBSIMPR          (1 << 19) /* Bit 19: Imprecise debug data break store instruction */
#define CP0_DEBUG_IEXI              (1 << 20) /* Bit 20: Imprecise error exception inhibit */
#define CP0_DEBUG_DBUSEP            (1 << 21) /* Bit 21: Data access bus error exception pending */
#define CP0_DEBUG_CACHEEP           (1 << 22) /* Bit 22: Imprecise cache error exception is pending */
#define CP0_DEBUG_MCHECKP           (1 << 23) /* Bit 23: Imprecise machine check exception is pending */
#define CP0_DEBUG_IBUSEP            (1 << 24) /* Bit 24: Bus error exception pending */
#define CP0_DEBUG_COUNTDM           (1 << 25) /* Bit 25: Count register behavior (1=running) */
#define CP0_DEBUG_HALT              (1 << 26) /* Bit 26: Internal system bus clock stopped */
#define CP0_DEBUG_DOZE              (1 << 27) /* Bit 27: Processor in low power mode */
#define CP0_DEBUG_LSNM              (1 << 28) /* Bit 28: Load/store in DSEG goes to main memory */
#define CP0_DEBUG_NODCR             (1 << 29) /* Bit 29: No DSEG preset */
#define CP0_DEBUG_DM                (1 << 30) /* Bit 30: Processor is operating in DEBUG mode */
#define CP0_DEBUG_DBD               (1 << 31) /* Bit 31: Last debug exception occurred in a dely slot */

/* Register Number: 23 Sel: 1 Name: TraceControl
 * Function: EJTAG Debug register
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 23 Sel: 2 Name: TraceControl2
 * Function: EJTAG Debug register
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 23 Sel: 3 Name: UserTraceData1
 * Function: EJTAG Debug register
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 23 Sel: 4 Name: TraceBPC
 * Function: EJTAG Debug register
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 23 Sel: 5 Name: Debug2
 * Function: EJTAG Debug register
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 24 Sel: 0 Name: DEPC
 * Function: Program counter at last EJTAG debug exception
 * Compliance Level: Optional.
 *
 *   See arch/mips/include/mips32/cp0.h
 */

/* Register Number: 24 Sel: 3 Name: UserTraceData2
 * Function:  EJTAG user trace data 2 register
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 25 Sel: 0 Name: PerfCtl0
 * Function:  Performance counter 0 control
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 25 Sel: 1 Name: PerfCnt0
 * Function:  Performance counter 0
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 25 Sel: 2 Name: PerfCtl1
 * Function:  Performance counter 1 control
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 25 Sel: 3 Name: PerfCnt1
 * Function:  Performance counter 1
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 26 Sel: 0 Name: ErrCtl
 * Function:  Software test enable of way-select and data RAM arrays for
 *            I-Cache and D-Cache
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 27 Reserved
 * Compliance Level: Recommended/Optional.
 */

/* Register Number: 28 Sel: 0 Name: TagLo
 * Function:  Low-order portion of cache tag interface
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 28 Sel: 1 Name: DataLo
 * Function:  Low-order portion of cache tag interface
 * Compliance Level: Optional.
 * To be provided
 */

/* Register Number: 29 Reserved
 * Compliance Level: Recommended/Optional.
 */

/* Register Number: 30 Sel: 0 Name: ErrorEPC
 * Function: Program counter at last error
 * Compliance Level: Required.
 *
 *   See arch/mips/include/mips32/cp0.h
 *
 * Register Number: 31 Sel: 0 Name: DeSAVE
 * Function: EJTAG debug exception save register
 * Compliance Level: Optional.
 *
 *   See arch/mips/include/mips32/cp0.h
 */

/****************************************************************************
 * Public Types
 ****************************************************************************/

#ifndef __ASSEMBLY__

/****************************************************************************
 * Inline Functions
 ****************************************************************************/

/****************************************************************************
 * Public Function Prototypes
 ****************************************************************************/

#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif

#undef EXTERN
#ifdef __cplusplus
}
#endif

#endif /* __ASSEMBLY__ */
#endif /* __ARCH_MIPS_INCLUDE_PIC32MZ_CP0_H */


text:
/*
Proxyes browser's History API, routing request to and from the aplication
*/

(function() {
  var __bind = function(fn, me){ return function(){ return fn.apply(me, arguments); }; };

  theoricus.core.Router = (function() {
    var Factory;

    Factory = null;

    Router.prototype.routes = [];

    Router.prototype.listeners = [];

    Router.prototype.trigger = true;

    /*
      @param [theoricus.Theoricus] @the   Shortcut for app's instance
      @param [Function] @on_change  state/url change handler
    */

    function Router(the, on_change) {
      var opts, route, _ref,
        _this = this;
      this.the = the;
      this.on_change = on_change;
      this.run = __bind(this.run, this);

      Factory = this.the.factory;
      _ref = app.routes;
      for (route in _ref) {
        opts = _ref[route];
        this.map(route, opts.to, opts.at, opts.el, this);
      }
      History.Adapter.bind(window, 'statechange', function() {
        return _this.route(History.getState());
      });
      setTimeout(function() {
        var url;
        url = window.location.pathname;
        if (url === "/") {
          url = app.root;
        }
        return _this.run(url);
      }, 1);
    }

    /*
      Creates and store a route

      @param [String] route
      @param [String] to
      @param [String] at
      @param [String] el
    */

    Router.prototype.map = function(route, to, at, el) {
      return this.routes.push(new theoricus.core.Route(route, to, at, el, this));
    };

    Router.prototype.route = function(state) {
      var route, url, _i, _len, _ref;
      if (this.trigger) {
        url = state.hash || state.title;
        url = url.replace('.', '');
        if ((url.slice(0, 1)) === '.') {
          url = url.slice(1);
        }
        if ((url.slice(0, 1)) !== '/') {
          url = "/" + url;
        }
        if (url === "/") {
          url = app.root;
        }
        _ref = this.routes;
        for (_i = 0, _len = _ref.length; _i < _len; _i++) {
          route = _ref[_i];
          if (route.matcher.test(url)) {
            if (typeof this.on_change === "function") {
              this.on_change(route.clone(url));
            }
            return;
          }
        }
      }
      return this.trigger = true;
    };

    Router.prototype.navigate = function(url, trigger, replace) {
      var action;
      if (trigger == null) {
        trigger = true;
      }
      if (replace == null) {
        replace = false;
      }
      this.trigger = trigger;
      action = replace ? "replaceState" : "pushState";
      return History[action](null, null, url);
    };

    Router.prototype.run = function(url, trigger) {
      var len;
      if (trigger == null) {
        trigger = true;
      }
      if (this.the.base_path != null) {
        url = url.replace(this.the.base_path, '');
      }
      if (url.substr(-1) === '/') {
        len = url.length;
        len--;
        url = url.substr(0, len);
      }
      this.trigger = trigger;
      return this.route({
        title: url
      });
    };

    Router.prototype.go = function(index) {
      return History.go(index);
    };

    Router.prototype.back = function() {
      return History.back();
    };

    Router.prototype.forward = function() {
      return History.forward();
    };

    return Router;

  })();

}).call(this);


text:
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    <title> Berkshire Hathaway Clone </title>
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