text:
package microsoft.aspnet.signalr.client.transport;

import java.io.IOException;

import microsoft.aspnet.signalr.client.FutureHelper;
import microsoft.aspnet.signalr.client.SignalRFuture;
import microsoft.aspnet.signalr.client.ConnectionBase;
import microsoft.aspnet.signalr.client.Constants;
import microsoft.aspnet.signalr.client.LogLevel;
import microsoft.aspnet.signalr.client.Logger;
import microsoft.aspnet.signalr.client.Platform;
import microsoft.aspnet.signalr.client.http.HttpConnection;
import microsoft.aspnet.signalr.client.http.HttpConnectionFuture;
import microsoft.aspnet.signalr.client.http.HttpConnectionFuture.ResponseCallback;
import microsoft.aspnet.signalr.client.http.InvalidHttpStatusCodeException;
import microsoft.aspnet.signalr.client.http.Request;
import microsoft.aspnet.signalr.client.http.Response;

/**
 * ClientTransport base implementation over Http
 */
public abstract class HttpClientTransport implements ClientTransport {
    protected static final int BUFFER_SIZE = 1024;

    protected HttpConnection mHttpConnection;
    protected boolean mStartedAbort = false;
    protected SignalRFuture<Void> mAbortFuture = null;

    private Logger mLogger;

    /**
     * Initializes the HttpClientTransport with a logger
     *
     * @param logger
     *            logger to log actions
     */
    public HttpClientTransport(Logger logger) {
        this(logger, Platform.createHttpConnection(logger));
    }

    public HttpClientTransport(Logger logger, HttpConnection httpConnection) {
        if (logger == null) {
            throw new IllegalArgumentException("logger");
        }

        mHttpConnection = httpConnection;
        mLogger = logger;
    }

    @Override
    public SignalRFuture<NegotiationResponse> negotiate(final ConnectionBase connection) {
        log("Start the negotiation with the server", LogLevel.Information);

        String url = connection.getUrl() + "negotiate" + TransportHelper.getNegotiateQueryString(connection);

        Request get = new Request(Constants.HTTP_GET);
        get.setUrl(url);
        get.setVerb(Constants.HTTP_GET);

        connection.prepareRequest(get);

        final SignalRFuture<NegotiationResponse> negotiationFuture = new SignalRFuture<NegotiationResponse>();

        log("Execute the request", LogLevel.Verbose);
        HttpConnectionFuture connectionFuture = mHttpConnection.execute(get, new ResponseCallback() {

            public void onResponse(Response response) {
                try {
                    log("Response received", LogLevel.Verbose);
                    throwOnInvalidStatusCode(response);

                    log("Read response data to the end", LogLevel.Verbose);
                    String negotiationContent = response.readToEnd();

                    log("Trigger onSuccess with negotiation data: " + negotiationContent, LogLevel.Verbose);
                    negotiationFuture.setResult(new NegotiationResponse(negotiationContent, connection.getJsonParser()));

                } catch (Throwable e) {
                    log(e);
                    negotiationFuture.triggerError(new NegotiationException("There was a problem in the negotiation with the server", e));
                }
            }
        });

        FutureHelper.copyHandlers(connectionFuture, negotiationFuture);

        return negotiationFuture;
    }

    @Override
    public SignalRFuture<Void> send(ConnectionBase connection, String data, final DataResultCallback callback) {
        try {
            log("Start sending data to the server: " + data, LogLevel.Information);

            Request post = new Request(Constants.HTTP_POST);
            post.setFormContent("data", data);
            post.setUrl(connection.getUrl() + "send" + TransportHelper.getSendQueryString(this, connection));
            post.setHeaders(connection.getHeaders());
            post.addHeader("Content-Type", "application/x-www-form-urlencoded");

            connection.prepareRequest(post);

            log("Execute the request", LogLevel.Verbose);
            HttpConnectionFuture future = mHttpConnection.execute(post, new ResponseCallback() {

                @Override
                public void onResponse(Response response) throws Exception {
                    log("Response received", LogLevel.Verbose);
                    throwOnInvalidStatusCode(response);

                    log("Read response to the end", LogLevel.Verbose);
                    String data = response.readToEnd();

                    if (data != null) {
                        log("Trigger onData with data: " + data, LogLevel.Verbose);
                        callback.onData(data);
                    }
                }
            });

            return future;
        } catch (Throwable e) {
            log(e);

            SignalRFuture<Void> future = new SignalRFuture<Void>();
            future.triggerError(e);

            return future;
        }
    }

    @Override
    public SignalRFuture<Void> abort(ConnectionBase connection) {
        synchronized (this) {
            if (!mStartedAbort) {
                log("Started aborting", LogLevel.Information);
                mStartedAbort = true;
                try {
                    String url = connection.getUrl() + "abort" + TransportHelper.getSendQueryString(this, connection);

                    Request post = new Request(Constants.HTTP_POST);

                    post.setUrl(url);
                    post.setHeaders(connection.getHeaders());

                    connection.prepareRequest(post);

                    log("Execute request", LogLevel.Verbose);
                    mAbortFuture = mHttpConnection.execute(post, new ResponseCallback() {

                        @Override
                        public void onResponse(Response response) {
                            log("Finishing abort", LogLevel.Verbose);
                            mStartedAbort = false;
                        }
                    });

                    return mAbortFuture;

                } catch (Throwable e) {
                    log(e);
                    log("Finishing abort", LogLevel.Verbose);
                    mStartedAbort = false;

                    SignalRFuture<Void> future = new SignalRFuture<Void>();
                    future.triggerError(e);

                    return future;
                }
            } else {
                return mAbortFuture;
            }
        }
    }

    protected void throwOnInvalidStatusCode(Response response) throws InvalidHttpStatusCodeException {
        if (response.getStatus() < 200 || response.getStatus() > 299) {
            String responseContent;

            try {
                responseContent = response.readToEnd();
            } catch (IOException e) {
                responseContent = "";
            }

            StringBuilder headersString = new StringBuilder();

            for (String header : response.getHeaders().keySet()) {
                headersString.append("[");
                headersString.append(header);
                headersString.append(": ");
                for (String headerValue : response.getHeader(header)) {
                    headersString.append(headerValue);
                    headersString.append("; ");
                }
                ;
                headersString.append("]; ");
            }

            throw new InvalidHttpStatusCodeException(response.getStatus(), responseContent, headersString.toString());
        }

    }

    protected void log(String message, LogLevel level) {
        mLogger.log(getName() + " - " + message, level);
    }

    protected void log(Throwable error) {
        mLogger.log(getName() + " - Error: " + error.toString(), LogLevel.Critical);
    }

}


text:
'use strict';

var FixedHeader = (function FixedHeader() {
  var headings;
  var selector;
  var view;
  var fixedContainer;
  var currentlyFixed;

  /**
   * Start listening scroll event, and applying the fixed header effect
   * @param  {String} scrollView HTML element that is going to be scrolled.
   * @param  {String} container  HTML element that is
   *                             going to contain the top header.
   * @param  {String} select     Selector of the headers to be checked.
   */
  var init = function init(scrollView, container, select) {
    selector = select;
    view = document.querySelector(scrollView);
    fixedContainer = document.querySelector(container);
    refresh();
    view.addEventListener('scroll', scrolling);
  };

  var refresh = function refresh() {
    headings = view.querySelectorAll(selector);
  };

  var scrolling = function scrolling() {
    var currentScroll = view.scrollTop;
    for (var i = headings.length - 1; i >= 0; i--) {
      var currentHeader = headings[i];
      var headingPosition = currentHeader.offsetTop;
      var offset = headingPosition - currentScroll;
      var currentHeight = currentHeader.offsetHeight;
      var differentHeaders = currentlyFixed != currentHeader;
      // Effect
      if (Math.abs(offset) < currentHeight && differentHeaders) {
        var toMove = Math.abs(offset) - currentHeight;
        var inEffect = toMove <= 0;
        var translateTop = 'translateY(' + toMove + 'px)';
        var transform = inEffect ? translateTop : null;
        fixedContainer.style.transform = transform;
      }

      // Switching Header
      if (offset < 0) {
        if (differentHeaders) {
          fixedContainer.style.transform = 'translateY(0)';
          currentlyFixed = currentHeader;
          var background = '-moz-element(#' + currentHeader.id + ')';
          fixedContainer.style.backgroundImage = background;
        }
        return;
      }
    }
    currentlyFixed = null;
    fixedContainer.style.transform = 'translateY(-100%)';
  };

  var stop = function stop() {
    view.removeEventListener('scroll', scrolling);
  };

  return {
    'init': init,
    'refresh': refresh,
    'stop': stop
  };
})();

redpajama_set_name: RedPajamaGithub


text:
  <pf-notification-list></pf-notification-list>

        <form class="toolbar-pf-actions">

            <button type="button" class="btn btn-default" ng-click="updateRange('30m')">30m</button>
            <button type="button" class="btn btn-default" ng-click="updateRange('1h')">1h</button>
            <button type="button" class="btn btn-default" ng-click="updateRange('4h')">4h</button>
            <button type="button" class="btn btn-default" ng-click="updateRange('8h')">8h</button>
            <button type="button" class="btn btn-default" ng-click="updateRange('12h')">12h</button>
            <button type="button" class="btn btn-default" ng-click="updateRange('1d')">1d</button>
            <button type="button" class="btn btn-default" ng-click="updateRange('7d')">7d</button>
            <button type="button" class="btn btn-default" ng-click="updateRange('30d')">30d</button>

            <button type="button" class="btn btn-default" ng-click="updateFilter()">Set Range To:</button>

              <input class="bootstrap-touchspin" type="text" id="offset" ng-model="filter.range.offset" />

              <select class="btn btn-default form-control" id="filter.range.unit" ng-options="opt as opt for opt in filter.range.unitOptions" ng-model="filter.range.unit"></select>

              <select class="btn btn-default form-control" id="filter.range.direction" ng-options="opt as opt for opt in filter.range.directionOptions" ng-model="filter.range.direction"></select>

              <input type='text' class="form-control" ng-model="filter.range.datetime" id="currentdatetime" name="currentdatetime"/>

        </form>

        <form class="toolbar-pf-actions" ng-submit="updateFilter()">

                <button type="button" class="btn btn-default dropdown-toggle" data-toggle="dropdown" aria-haspopup="true" aria-expanded="false">
                  Tag Query
                </button>

Tag Query

              <input type="text" class="form-control" ng-model="filter.alert.tagQuery" id="filter.alert.tagQuery" placeholder="Filter By Tag Query..." />

            Severity:

              <select class="btn btn-default combobox" id="filter.alert.severity" ng-options="opt as opt for opt in filter.alert.severityOptions" ng-model="filter.alert.severity"
                ng-change="updateFilter()"></select>

            Status:

              <select class="btn btn-default combobox" id="filter.alert.status" ng-options="opt as opt for opt in filter.alert.statusOptions" ng-model="filter.alert.status"
                ng-change="updateFilter()"></select>

              <button class="btn btn-link dropdown-toggle" type="button" id="alertsKebab" data-toggle="dropdown" aria-haspopup="true" aria-expanded="true">

              </button>

Ack Selected (TD?)

Resolve Selected (TD?)

Delete Selected (TD?)

        </form>

          <input type="checkbox" />

            <button class="btn btn-link dropdown-toggle" type="button" id="dropdownKebabRight1" data-toggle="dropdown" aria-haspopup="true" aria-expanded="true">

            </button>

Acknowledge

Resolve

Annotate

View

Delete

{{ alertItem.severity }}

{{ alertItem.ctime | date:'yyyy-MM-dd HH:mm:ss Z' }}

                    Details

                    {{ alertItem.notes ? alertItem.notes.length : 0 }} Notes

                    {{ alertItem.tags ? alertItem.tags.length : 0 }} Tags

                    {{ alertItem.lifecycle ? alertItem.lifecycle.length : 0 }}
                  Lifecycle

                    {{ alertItem.evalSets ? alertItem.evalSets.length : 0 }}
                  Conditions

                Category: {{ alertItem.category }}
 Data ID: {{ alertItem.dataId }}
 Alert Text: {{ alertItem.text }}

                Time: {{ note.ctime | date:'yyyy-MM-dd HH:mm:ss Z' }}
 User: {{ note.user }}
 {{ note.text }}

{{tag.key}}:

{{tag.value}}

                User: {{ lc.user }}
 Time: {{ lc.stime | date:'yyyy-MM-dd HH:mm:ss Z' }}
 Status: {{ lc.status }}

                Time: {{ ev.evalTimestamp | date:'yyyy-MM-dd HH:mm:ss Z' }}
 {{ ev.displayString }}

Select a Tenant

Use the upper right form to select a tenant which fetch data from Hawkular Alerting.


text:
import _extends from "@babel/runtime/helpers/extends";
import _objectWithoutProperties from "@babel/runtime/helpers/objectWithoutProperties";
var _excluded = ["mode", "gap", "stretched", "align", "getRootRef", "className", "children"];
import * as React from "react";
import { classNamesString } from "../../lib/classNames";
import "./ButtonGroup.module.css";

/**
 * @see https://vkcom.github.io/VKUI/#/ButtonGroup
 */
export var ButtonGroup = function ButtonGroup(_ref) {
  var _ref$mode = _ref.mode,
      mode = _ref$mode === void 0 ? "horizontal" : _ref$mode,
      _ref$gap = _ref.gap,
      gap = _ref$gap === void 0 ? "m" : _ref$gap,
      _ref$stretched = _ref.stretched,
      stretched = _ref$stretched === void 0 ? false : _ref$stretched,
      _ref$align = _ref.align,
      align = _ref$align === void 0 ? "left" : _ref$align,
      getRootRef = _ref.getRootRef,
      className = _ref.className,
      children = _ref.children,
      restProps = _objectWithoutProperties(_ref, _excluded);

  return /*#__PURE__*/React.createElement("div", _extends({
    className: classNamesString(className, "vkuiButtonGroup", styles["ButtonGroup--mode-".concat(mode)], gap !== "none" && styles["ButtonGroup--gap-".concat(gap)], stretched && "vkuiButtonGroup--stretched", align && styles["ButtonGroup--align-".concat(align)]),
    role: "group",
    ref: getRootRef
  }, restProps), children);
};
var styles = {
  "ButtonGroup--mode-vertical": "vkuiButtonGroup--mode-vertical",
  "ButtonGroup--mode-horizontal": "vkuiButtonGroup--mode-horizontal",
  "ButtonGroup--gap-space": "vkuiButtonGroup--gap-space",
  "ButtonGroup--gap-s": "vkuiButtonGroup--gap-s",
  "ButtonGroup--gap-m": "vkuiButtonGroup--gap-m",
  "ButtonGroup--align-left": "vkuiButtonGroup--align-left",
  "ButtonGroup--align-center": "vkuiButtonGroup--align-center",
  "ButtonGroup--align-right": "vkuiButtonGroup--align-right"
};
//# sourceMappingURL=ButtonGroup.js.map


text:
<project xmlns="http://maven.apache.org/POM/4.0.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://maven.apache.org/POM/4.0.0 http://maven.apache.org/maven-v4_0_0.xsd">
    <modelVersion>4.0.0</modelVersion>
    <parent>
        <groupId>org.jenkins-ci.plugins</groupId>
        <artifactId>plugin</artifactId>
        <version>1.609</version><!-- which version of Jenkins is this plugin built against? -->
    </parent>
    <build>
        <plugins>
            <plugin>
                <groupId>org.apache.maven.plugins</groupId>
                <artifactId>maven-surefire-plugin</artifactId>
                <version>2.5</version>
                <configuration>
                    <includes>
                        <include>**/*Test.java</include>
                    </includes>
                    <testFailureIgnore>true</testFailureIgnore>
                </configuration>
            </plugin>
            <plugin>
                <groupId>org.jenkins-ci.tools</groupId>
                <artifactId>maven-hpi-plugin</artifactId>
            </plugin>
        </plugins>
    </build>
    <artifactId>programmable-section</artifactId>
    <version>1.0</version>
    <packaging>hpi</packaging>
    <!-- get every artifact through repo.jenkins-ci.org, which proxies all the artifacts that we need -->
    <repositories>
        <repository>
            <id>repo.jenkins-ci.org</id>
            <url>http://repo.jenkins-ci.org/public/</url>
        </repository>
    </repositories>

    <pluginRepositories>
        <pluginRepository>
            <id>repo.jenkins-ci.org</id>
            <url>http://repo.jenkins-ci.org/public/</url>
        </pluginRepository>
    </pluginRepositories>
    <dependencies>
        <dependency>
            <groupId>org.jenkins-ci.plugins</groupId>
            <artifactId>sectioned-view</artifactId>
            <version>1.18</version>
            <type>jar</type>
            <optional>true</optional>
        </dependency>
        <dependency>
            <groupId>org.jenkins-ci.plugins</groupId>
            <artifactId>junit</artifactId>
            <version>1.2-beta-4</version>
            <type>jar</type>
        </dependency>
        <dependency>
            <artifactId>commons-lang</artifactId>
            <groupId>commons-lang</groupId>
            <type>jar</type>
            <version>2.6</version>
            <scope>provided</scope>
        </dependency>
    </dependencies>
</project>


text:
/****************************************************************************
 * Included Files
 ****************************************************************************/

#include <nuttx/config.h>

#include <stdint.h>
#include <debug.h>

#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/irq.h>

#include "up_arch.h"
#include "up_internal.h"

#ifdef CONFIG_SAMA5_PIO_IRQ
#  include "sam_pio.h"
#endif

#include "chip.h"
#include "mmu.h"
#include "cache.h"
#include "sctlr.h"
#include "chip/sam_aic.h"
#include "chip/sam_matrix.h"
#include "chip/sam_aximx.h"
#include "chip/sam_sfr.h"

#include "sam_irq.h"

/****************************************************************************
 * Pre-processor Definitions
 ****************************************************************************/

/****************************************************************************
 * Private types
 ****************************************************************************/

typedef uint32_t *(*doirq_t)(int irq, uint32_t *regs);

/****************************************************************************
 * Public Data
 ****************************************************************************/

volatile uint32_t *current_regs;

/* Symbols defined via the linker script */

extern uint32_t _vector_start; /* Beginning of vector block */
extern uint32_t _vector_end;   /* End+1 of vector block */

/****************************************************************************
 * Private Data
 ****************************************************************************/

static const uint8_t g_srctype[SCRTYPE_NTYPES] =
{
  0, 0, 1, 1, 2, 3
};

/* This is an arry of bit maps that can be used to quickly determine is the
 * peripheral identified by its PID is served by H64MX or H32MX.  Then the
 * appropriate MATRIX SPSELR register can be consulted to determine if the
 * peripheral interrupts are secured or not.
 */

#if defined(CONFIG_SAMA5_SAIC)
static const uint32_t g_h64mxpids[3] =
{
  H64MX_SPSELR0_PIDS, H64MX_SPSELR1_PIDS, H64MX_SPSELR2_PIDS
};
#endif

/****************************************************************************
 * Private Functions
 ****************************************************************************/

/****************************************************************************
 * Name: sam_dumpaic
 *
 * Description:
 *   Dump some interesting AIC registers
 *
 ****************************************************************************/

#if defined(CONFIG_DEBUG_IRQ)
static void sam_dumpaic(const char *msg, uintptr_t base, int irq)
{
  irqstate_t flags;

  flags = irqsave();
  lldbg("AIC (%s, base=%08x irq=%d):\n", msg, base, irq);

  /* Select the register set associated with this irq */

  putreg32(irq, base + SAM_AIC_SSR_OFFSET);

  /* Then dump all of the (readable) register contents */

  lldbg("  SSR: %08x  SMR: %08x  SVR: %08x  IVR: %08x\n",
        getreg32(base + SAM_AIC_SSR_OFFSET),
        getreg32(base + SAM_AIC_SMR_OFFSET),
        getreg32(base + SAM_AIC_SVR_OFFSET),
        getreg32(base + SAM_AIC_IVR_OFFSET));
  lldbg("  FVR: %08x  ISR: %08x\n",
        getreg32(base + SAM_AIC_FVR_OFFSET),
        getreg32(base + SAM_AIC_ISR_OFFSET));
  lldbg("  IPR: %08x       %08x       %08x       %08x\n",
        getreg32(base + SAM_AIC_IPR0_OFFSET),
        getreg32(base + SAM_AIC_IPR1_OFFSET),
        getreg32(base + SAM_AIC_IPR2_OFFSET),
        getreg32(base + SAM_AIC_IPR3_OFFSET));

  /* SAMA5D4 does not have the FFSR register */

#if defined(SAM_AIC_FFSR)
  lldbg("  IMR: %08x CISR: %08x  SPU: %08x FFSR: %08x\n",
        getreg32(base + SAM_AIC_IMR_OFFSET),
        getreg32(base + SAM_AIC_CISR_OFFSET),
        getreg32(base + SAM_AIC_SPU_OFFSET),
        getreg32(base + SAM_AIC_FFSR_OFFSET));
#else
  lldbg("  IMR: %08x CISR: %08x  SPU: %08x\n",
        getreg32(base + SAM_AIC_IMR_OFFSET),
        getreg32(base + SAM_AIC_CISR_OFFSET),
        getreg32(base + SAM_AIC_SPU_OFFSET));
#endif

  lldbg("  DCR: %08x WPMR: %08x WPSR: %08x\n",
        getreg32(base + SAM_AIC_DCR_OFFSET),
        getreg32(base + SAM_AIC_WPMR_OFFSET),
        getreg32(base + SAM_AIC_WPSR_OFFSET));

  irqrestore(flags);
}
#else
#  define sam_dumpaic(msg, base, irq)
#endif

/****************************************************************************
 * Name: sam_vectorsize
 *
 * Description:
 *   Return the size of the vector data
 *
 ****************************************************************************/

static inline size_t sam_vectorsize(void)
{
  uintptr_t src;
  uintptr_t end;

  src  = (uintptr_t)&_vector_start;
  end  = (uintptr_t)&_vector_end;

  return (size_t)(end - src);
}

/****************************************************************************
 * Name: sam_spurious
 *
 * Description:
 *   Spurious interrupt handler.
 *
 *   Paragraph 17.8.6, Spurious Interrupt: "The Advanced Interrupt Controller
 *   features protection against spurious interrupts. A spurious interrupt is
 *   defined as being the assertion of an interrupt source long enough for the
 *   AIC to assert the nIRQ, but no longer present when AIC_IVR is read. This
 *   is most prone to occur when:
 *
 *     o An external interrupt source is programmed in level-sensitive mode
 *       and an active level occurs for only a short time.
 *     o An internal interrupt source is programmed in level sensitive and
 *       the output signal of the corresponding embedded peripheral is
 *       activated for a short time. (As in the case for the Watchdog.)
 *     o An interrupt occurs just a few cycles before the software begins to
 *       mask it, thus resulting in a pulse on the interrupt source.
 *
 *   "The AIC detects a spurious interrupt at the time the AIC_IVR is read
 *   while no enabled interrupt source is pending. When this happens, the AIC
 *   returns the value stored by the programmer in AIC_SPU (Spurious Vector
 *   Register). The programmer must store the address of a spurious interrupt
 *   handler in AIC_SPU as part of the application, to enable an as fast as
 *   possible return to the normal execution flow. This handler writes in
 *   AIC_EOICR and performs a return from interrupt."
 *
 ****************************************************************************/

static uint32_t *sam_spurious(int irq, uint32_t *regs)
{
  /* This is probably irrelevant since true vectored interrupts are not used
   * in this implementation.  The value of AIC_IVR is ignored.
   */

#if defined(CONFIG_DEBUG_IRQ)
  lldbg("Spurious interrupt: IRQ %d\n", irq);
#endif
  return regs;
}

/****************************************************************************
 * Name: sam_fiqhandler
 *
 * Description:
 *   Default FIQ interrupt handler.
 *
 ****************************************************************************/

static uint32_t *sam_fiqhandler(int irq, uint32_t *regs)
{
  /* Dispatch the FIQ */

  return arm_doirq(SAM_IRQ_FIQ, regs);
}

/****************************************************************************
 * Name: sam_aic_issecure
 *
 * Description:
 *   Return true if the peripheral secure.
 *
 * Input Parameter:
 *   PID = IRQ number
 *
 ****************************************************************************/

#if defined(CONFIG_SAMA5_SAIC)
static bool sam_aic_issecure(uint32_t irq)
{
  uintptr_t regaddr;
  uint32_t bit;
  unsigned int regndx;

  /* Get the register index and bit mask */

  regndx = (irq >> 5);
  bit    = ((uint32_t)1 << (irq & 0x1f));

  /* Get the SPSELR register address */

  DEBUGASSERT(regndx < 3);
  if ((g_h64mxpids[regndx] & bit) != 0)
    {
      /* H64MX.  Use Matrix 0 */

      regaddr = SAM_MATRIX0_SPSELR(regndx);
    }
  else
    {
      /* H32MX.  Use Matrix 1 */

      regaddr = SAM_MATRIX1_SPSELR(regndx);
    }

  /* Return true if the bit corresponding to this IRQ is zero */

  return (getreg32(regaddr) & bit) == 0;
}
#endif

/****************************************************************************
 * Name: sam_aic_redirection
 *
 * Description:
 *   Redirect all interrupts to the AIC.  This function is only compiled if
 *   (1) the architecture supports an SAIC (CONFIG_SAMA5_HAVE_SAIC), but (2)
 *   Use of the SAIC has not been selected (!CONFIG_SAMA5_SAIC).
 *
 ****************************************************************************/

#if defined(CONFIG_SAMA5_HAVE_SAIC) && !defined(CONFIG_SAMA5_SAIC)
static void sam_aic_redirection(void)
{
  unsigned int regval;

  /* Check if interrupts are already redirected to the AIC */

  regval = getreg32(SAM_SFR_AICREDIR);
  if ((regval & SFR_AICREDIR_ENABLE) == 0)
    {
      /* Enable redirection of all interrupts to the AIC */

      regval  = getreg32(SAM_SFR_SN1);
      regval ^= SFR_AICREDIR_KEY;
      regval |= SFR_AICREDIR_ENABLE;
      putreg32(regval, SAM_SFR_AICREDIR);

#if defined(CONFIG_DEBUG_IRQ)
      /* Check if redirection was successfully enabled */

      regval = getreg32(SAM_SFR_AICREDIR);
      lldbg("Interrupts %s redirected to the AIC\n",
           (regval & SFR_AICREDIR_ENABLE) != 0 ? "ARE" : "NOT");
#endif
    }
}
#else
#  define sam_aic_redirection()
#endif

/****************************************************************************
 * Name: sam_aic_initialize
 *
 * Description:
 *   Initialize the AIC or the SAIC.
 *
 ****************************************************************************/

static void sam_aic_initialize(uintptr_t base)
{
  int i;

  /* Unprotect SMR, SVR, SPU and DCR register */

  putreg32(AIC_WPMR_WPKEY, base + SAM_AIC_WPMR_OFFSET);

  /* Configure the FIQ and the IRQs. */

  for (i = 0; i < SAM_IRQ_NINT; i++)
    {
      /* Select the interrupt registers */

      putreg32(i, base + SAM_AIC_SSR_OFFSET);

      /* Disable the interrupt */

      putreg32(AIC_IDCR_INTD, base + SAM_AIC_IDCR_OFFSET);

      /* Set the (unused) FIQ/IRQ handler */

      if (i == SAM_PID_FIQ)
        {
          putreg32((uint32_t)sam_fiqhandler, base + SAM_AIC_SVR_OFFSET);
        }
      else
        {
          putreg32((uint32_t)arm_doirq, base + SAM_AIC_SVR_OFFSET);
        }

      /* Set the default interrupt priority */

      putreg32(SAM_DEFAULT_PRIOR, base + SAM_AIC_SMR_OFFSET);

      /* Clear any pending interrupt */

      putreg32(AIC_ICCR_INTCLR, base + SAM_AIC_ICCR_OFFSET);
    }

  /* Set the (unused) spurious interrupt handler */

  putreg32((uint32_t)sam_spurious, base + SAM_AIC_SPU_OFFSET);

  /* Perform 8 interrupt acknowledgements by writing any value to the
   * EOICR register.
   */

  for (i = 0; i < 8; i++)
    {
      putreg32(AIC_EOICR_ENDIT, base + SAM_AIC_EOICR_OFFSET);
    }

  /* Restore protection and the interrupt state */

  putreg32(AIC_WPMR_WPKEY | AIC_WPMR_WPEN, base + SAM_AIC_WPMR_OFFSET);
}

/****************************************************************************
 * Public Functions
 ****************************************************************************/

/****************************************************************************
 * Name: up_irqinitialize
 *
 * Description:
 *   This function is called by up_initialize() during the bring-up of the
 *   system.  It is the responsibility of this function to but the interrupt
 *   subsystem into the working and ready state.
 *
 ****************************************************************************/

void up_irqinitialize(void)
{
#if defined(CONFIG_SAMA5_BOOT_ISRAM) || defined(CONFIG_SAMA5_BOOT_CS0FLASH)
  size_t vectorsize;
#endif

  /* The following operations need to be atomic, but since this function is
   * called early in the initialization sequence, we expect to have exclusive
   * access to the AIC.
   */

  /* Colorize the interrupt stack for debug purposes */

#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3
  {
    size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3);
    up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size),
                   intstack_size);
  }
#endif

  /* Redirect all interrupts to the AIC if so configured */

  sam_aic_redirection();

  /* Initialize the Advanced Interrupt Controller (AIC) */

  sam_aic_initialize(SAM_AIC_VBASE);

#if defined(CONFIG_SAMA5_SAIC)
  /* Initialize the Secure Advanced Interrupt Controller (SAIC) */

  sam_aic_initialize(SAM_SAIC_VBASE);

#endif

#if defined(CONFIG_ARCH_LOWVECTORS)
  /* If CONFIG_ARCH_LOWVECTORS is defined, then the vectors located at the
   * beginning of the .text region must appear at address at the address
   * specified in the VBAR.  There are three ways to accomplish this:
   *
   *   1. By explicitly mapping the beginning of .text region with a page
   *      table entry so that the virtual address zero maps to the beginning
   *      of the .text region.  VBAR == 0x0000:0000.
   *
   *   2. A second way is to map the use the AXI MATRIX remap register to
   *      map physical address zero to the beginning of the text region,
   *      either internal SRAM or EBI CS 0.  Then we can set an identity
   *      mapping to map the boot region at 0x0000:0000 to virtual address
   *      0x0000:00000.   VBAR == 0x0000:0000.
   *
   *      This method is used when booting from ISRAM or NOR FLASH.  In
   *      that case, vectors must lie at the beginning of NOFR FLASH.
   *
   *   3. Set the Cortex-A5 VBAR register so that the vector table address
   *      is moved to a location other than 0x0000:0000.
   *
   *      This is the method used when booting from SDRAM.
   *
   * - When executing from NOR FLASH, the first level bootloader is supposed
   *   to provide the AXI MATRIX mapping for us at boot time base on the state
   *   of the BMS pin.  However, I have found that in the test environments
   *   that I use, I cannot always be assured of that physical address mapping.
   *
   * - If we are executing out of ISRAM, then the SAMA5 primary bootloader
   *   probably copied us into ISRAM and set the AXI REMAP bit for us.
   *
   * - If we are executing from external SDRAM, then a secondary bootloader
   *   must have loaded us into SDRAM.  In this case, simply set the VBAR
   *   register to the address of the vector table (not necessary at the
   *   beginning or SDRAM).
   */

#if defined(CONFIG_SAMA5_BOOT_ISRAM) || defined(CONFIG_SAMA5_BOOT_CS0FLASH)
  /* Set the vector base address register to 0x0000:0000 */

  cp15_wrvbar(0);

#if 0 /* Disabled on reset */
  /* Disable MATRIX write protection */

  putreg32(MATRIX_WPMR_WPKEY, SAM_MATRIX_WPMR);
#endif

  /* Set remap state 0 if we are running from internal SRAM or from SDRAM.
   * If we booted into NOR FLASH, then the first level bootloader should
   * have already provided this mapping for us.
   *
   * This is done late in the boot sequence.  Any exceptions taken before
   * this point in time will be handled by the ROM code, not by the NuttX
   * interrupt since which was, up to this point, uninitialized.
   *
   *   Boot state:    ROM is seen at address 0x00000000
   *   Remap State 0: SRAM is seen at address 0x00000000 (through AHB slave
   *                  interface) instead of ROM.
   *   Remap State 1: HEBI is seen at address 0x00000000 (through AHB slave
   *                  interface) instead of ROM for external boot.
   *
   * Here we are assuming that vectors reside in the lower end of ISRAM.
   * Hmmm... this probably does not matter since we will map a page to
   * address 0x0000:0000 in that case anyway.
   */

#ifdef ATSAMA5D3
  putreg32(MATRIX_MRCR_RCB0, SAM_MATRIX_MRCR);   /* Enable Cortex-A5 remap */
#endif

#if defined(CONFIG_SAMA5_BOOT_ISRAM)
  putreg32(AXIMX_REMAP_REMAP0, SAM_AXIMX_REMAP); /* Remap SRAM */
#elif defined(ATSAMA5D3) /* && defined(CONFIG_SAMA5_BOOT_CS0FLASH) */
  putreg32(AXIMX_REMAP_REMAP1, SAM_AXIMX_REMAP); /* Remap NOR FLASH on CS0 */
#endif

  /* Make sure that there is no trace of any previous mapping (here we
   * that the L2 cache has not yet been enabled.
   */

  vectorsize = sam_vectorsize();
  cp15_invalidate_icache();
  cp15_invalidate_dcache(0, vectorsize);
  mmu_invalidate_region(0, vectorsize);

#if 0 /* Disabled on reset */
  /* Restore MATRIX write protection */

  putreg32(MATRIX_WPMR_WPKEY | MATRIX_WPMR_WPEN, SAM_MATRIX_WPMR);
#endif

#elif defined(CONFIG_SAMA5_BOOT_SDRAM)
  /* Set the VBAR register to the address of the vector table in SDRAM */

  DEBUGASSERT((((uintptr_t)&_vector_start) & ~VBAR_MASK) == 0);
  cp15_wrvbar((uint32_t)&_vector_start);

#endif /* CONFIG_SAMA5_BOOT_ISRAM || CONFIG_SAMA5_BOOT_CS0FLASH */
#endif /* CONFIG_ARCH_LOWVECTORS */

  /* currents_regs is non-NULL only while processing an interrupt */

  current_regs = NULL;

#ifndef CONFIG_SUPPRESS_INTERRUPTS
  /* Initialize logic to support a second level of interrupt decoding for
   * PIO pins.
   */

#ifdef CONFIG_SAMA5_PIO_IRQ
  sam_pioirqinitialize();
#endif

  /* And finally, enable interrupts */

  (void)irqenable();
#endif
}

/****************************************************************************
 * Name: arm_decodeirq, arm_decodefiq (and sam_decodeirq helper).
 *
 * Description:
 *   This function is called from the IRQ vector handler in arm_vectors.S.
 *   At this point, the interrupt has been taken and the registers have
 *   been saved on the stack.  This function simply needs to determine the
 *   the irq number of the interrupt and then to call arm_doirq to dispatch
 *   the interrupt.
 *
 *  Input parameters:
 *   regs - A pointer to the register save area on the stack.
 *
 ****************************************************************************/

static uint32_t *sam_decodeirq(uintptr_t base, uint32_t *regs)
{
  uint32_t irqid;
  uint32_t ivr;

 /* Paragraph 17.8.5 Protect Mode: "The Protect Mode permits reading the
  *   Interrupt Vector Register without performing the associated automatic
  *   operations. ... Writing PROT in AIC_DCR (Debug Control Register) at 0x1
  *   enables the Protect Mode.
  *
  *  "When the Protect Mode is enabled, the AIC performs interrupt stacking
  *    only when a write access is performed on the AIC_IVR. Therefore, the
  *    Interrupt Service Routines must write (arbitrary data) to the AIC_IVR
  *    just after reading it. The new context of the AIC, including the value
  *    of the Interrupt Status Register (AIC_ISR), is updated with the current
  *    interrupt only when AIC_IVR is written. ..."
  *
  *  "To summarize, in normal operating mode, the read of AIC_IVR performs the
  *   following operations within the AIC:
  *
  *   1. Calculates active interrupt (higher than current or spurious).
  *   2. Determines and returns the vector of the active interrupt.
  *   3. Memorizes the interrupt.
  *   4. Pushes the current priority level onto the internal stack.
  *   5. Acknowledges the interrupt.
  *
  * "However, while the Protect Mode is activated, only operations 1 to 3 are
  *  performed when AIC_IVR is read.  Operations 4 and 5 are only performed by
  *  the AIC when AIC_IVR is written.
  *
  * "Software that has been written and debugged using the Protect Mode runs
  *  correctly in Normal Mode without modification. However, in Normal Mode the
  *  AIC_IVR write has no effect and can be removed to optimize the code.
  */

  /* Write in the IVR to support Protect Mode */

  ivr = getreg32(base + SAM_AIC_IVR_OFFSET);
  putreg32(ivr, base + SAM_AIC_IVR_OFFSET);

  /* Get the IRQ number from the interrupt status register.  NOTE that the
   * IRQ number is the same is the peripheral ID (PID).
   */

  irqid = getreg32(base + SAM_AIC_ISR_OFFSET) & AIC_ISR_MASK;

  /* Dispatch the interrupt */

  regs = ((doirq_t)ivr)((int)irqid, regs);

  /* Acknowledge interrupt */

  putreg32(AIC_EOICR_ENDIT, base + SAM_AIC_EOICR_OFFSET);
  return regs;
}

/* This is the entry point from the ARM IRQ vector handler */

uint32_t *arm_decodeirq(uint32_t *regs)
{
  return sam_decodeirq(SAM_AIC_VBASE, regs);
}

#if defined(CONFIG_SAMA5_SAIC)
/* This is the entry point from the ARM FIQ vector handler */

uint32_t *arm_decodefiq(FAR uint32_t *regs)
{
  uint32_t *ret;

  /* In order to distinguish a FIQ from a true secure interrupt we need to
   * check the state of the FIQ line in the SAIC_CISR register.
   */

  if ((getreg32(SAM_SAIC_CISR) & AIC_CISR_NFIQ) != 0)
    {
      /* Handle the FIQ */

      ret = arm_doirq(SAM_IRQ_FIQ, regs);

      /* Acknowledge interrupt */

      putreg32(AIC_EOICR_ENDIT, SAM_SAIC_EOICR);
    }
  else
    {
      /* Handle the IRQ */

      ret = sam_decodeirq(SAM_SAIC_VBASE, regs);
    }

  return ret;
}
#endif

/****************************************************************************
 * Name: up_disable_irq (and sam_disable_irq helper)
 *
 * Description:
 *   Disable the IRQ specified by 'irq'
 *
 ****************************************************************************/

static void sam_disable_irq(uintptr_t base, int irq)
{
  irqstate_t flags;

  if (irq < SAM_IRQ_NINT)
    {
      /* These operations must be atomic */

      flags = irqsave();

      /* Select the register set associated with this irq */

      putreg32(irq, base + SAM_AIC_SSR_OFFSET);

      /* Disable the interrupt */

      putreg32(AIC_IDCR_INTD, base + SAM_AIC_IDCR_OFFSET);
      sam_dumpaic("disable", base, irq);
      irqrestore(flags);
    }
#ifdef CONFIG_SAMA5_PIO_IRQ
  else
    {
      /* Maybe it is a (derived) PIO IRQ */

      sam_pioirqdisable(irq);
    }
#endif
}

void up_disable_irq(int irq)
{
#if defined(CONFIG_SAMA5_SAIC)
  if (sam_aic_issecure(irq))
    {
      sam_disable_irq(SAM_SAIC_VBASE, irq);
    }
  else
#endif
    {
      sam_disable_irq(SAM_AIC_VBASE, irq);
    }
}

/****************************************************************************
 * Name: up_enable_irq (and sam_enable_irq helper)
 *
 * Description:
 *   Enable the IRQ specified by 'irq'
 *
 ****************************************************************************/

static void sam_enable_irq(uintptr_t base, int irq)
{
  irqstate_t flags;

  if (irq < SAM_IRQ_NINT)
    {
      /* These operations must be atomic */

      flags = irqsave();

      /* Select the register set associated with this irq */

      putreg32(irq, base + SAM_AIC_SSR_OFFSET);

      /* Enable the interrupt */

      putreg32(AIC_IECR_INTEN, base + SAM_AIC_IECR_OFFSET);
      sam_dumpaic("enable", base, irq);
      irqrestore(flags);
    }
#ifdef CONFIG_SAMA5_PIO_IRQ
  else
    {
      /* Maybe it is a (derived) PIO IRQ */

      sam_pioirqenable(irq);
    }
#endif
}

void up_enable_irq(int irq)
{
#if defined(CONFIG_SAMA5_SAIC)
  if (sam_aic_issecure(irq))
    {
      sam_enable_irq(SAM_SAIC_VBASE, irq);
    }
  else
#endif
    {
      sam_enable_irq(SAM_AIC_VBASE, irq);
    }
}

/****************************************************************************
 * Name: up_prioritize_irq (and sam_prioritize_irq helper)
 *
 * Description:
 *   Set the priority of an IRQ.
 *
 *   Since this API is not supported on all architectures, it should be
 *   avoided in common implementations where possible.
 *
 ****************************************************************************/

#ifdef CONFIG_ARCH_IRQPRIO
static int sam_prioritize_irq(uint32_t base, int irq, int priority)
{
  irqstate_t flags;
  uint32_t regval;

  DEBUGASSERT(irq < SAM_IRQ_NINT && (unsigned)priority <= AIC_SMR_PRIOR_MASK);
  if (irq < SAM_IRQ_NINT)
    {
      /* These operations must be atomic */

      flags = irqsave();

      /* Select the register set associated with this irq */

      putreg32(irq, base + SAM_AIC_SSR_OFFSET);

      /* Unprotect and write the SMR register */

      putreg32(AIC_WPMR_WPKEY, base + SAM_AIC_WPMR_OFFSET);

      /* Set the new priority, preserving the current srctype */

      regval  = getreg32(base + SAM_AIC_SMR_OFFSET);
      regval &= ~AIC_SMR_PRIOR_MASK;
      regval |= (uint32_t)priority << AIC_SMR_PRIOR_SHIFT;
      putreg32(regval, base + SAM_AIC_SMR_OFFSET);

      /* Restore protection and the interrupt state */

      putreg32(AIC_WPMR_WPKEY | AIC_WPMR_WPEN, base + SAM_AIC_WPMR_OFFSET);
      sam_dumpaic("prioritize", base, irq);
      irqrestore(flags);
    }

  return OK;
}

int up_prioritize_irq(int irq, int priority)
{
#if defined(CONFIG_SAMA5_SAIC)
  if (sam_aic_issecure(irq))
    {
      sam_prioritize_irq(SAM_SAIC_VBASE, irq, priority);
    }
  else
#endif
    {
      sam_prioritize_irq(SAM_AIC_VBASE, irq, priority);
    }
}
#endif

/****************************************************************************
 * Name: sam_irq_srctype (and _sam_irq_srctype helper)
 *
 * Description:
 *   irq     - Identifies the IRQ source to be configured
 *   srctype - IRQ source configuration
 *
 ****************************************************************************/

static void _sam_irq_srctype(uintptr_t base, int irq,
                             enum sam_srctype_e srctype)
{
  irqstate_t flags;
  uint32_t regval;

  DEBUGASSERT(irq < SAM_IRQ_NINT && (unsigned)srctype < SCRTYPE_NTYPES);

  /* These operations must be atomic */

  flags = irqsave();

  /* Select the register set associated with this irq */

  putreg32(irq, base + SAM_AIC_SSR_OFFSET);

  /* Unprotect and write the SMR register */

  putreg32(AIC_WPMR_WPKEY, base + SAM_AIC_WPMR_OFFSET);

  /* Set the new srctype, preserving the current priority */

  regval  = getreg32(base + SAM_AIC_SMR_OFFSET);
  regval &= ~AIC_SMR_SRCTYPE_MASK;
  regval |= (uint32_t)g_srctype[srctype] << AIC_SMR_SRCTYPE_SHIFT;
  putreg32(regval, base + SAM_AIC_SMR_OFFSET);

  /* Restore protection and the interrupt state */

  putreg32(AIC_WPMR_WPKEY | AIC_WPMR_WPEN, base + SAM_AIC_WPMR_OFFSET);
  sam_dumpaic("srctype", base, irq);
  irqrestore(flags);
}

void sam_irq_srctype(int irq, enum sam_srctype_e srctype)
{
#if defined(CONFIG_SAMA5_SAIC)
  if (sam_aic_issecure(irq))
    {
      _sam_irq_srctype(SAM_SAIC_VBASE, irq, srctype);
    }
  else
#endif
    {
      _sam_irq_srctype(SAM_AIC_VBASE, irq, srctype);
    }
}


text:
import React from 'react';
import { Components, registerComponent } from '../../lib/vulcan-lib';
import Dialog from '@material-ui/core/Dialog';
import DialogTitle from '@material-ui/core/DialogTitle';
import DialogContent from '@material-ui/core/DialogContent';
import { AnalyticsContext } from "../../lib/analyticsEvents";

const EditTagsDialog = ({post, onClose }: {
  post: PostsList,
  onClose: ()=>void
}) => {
  const { FooterTagList } = Components
  return <Dialog open={true} onClose={onClose} fullWidth maxWidth="sm" disableEnforceFocus>
    <AnalyticsContext pageSectionContext="editTagsDialog">
      <DialogTitle>{post.title}</DialogTitle>
      <DialogContent>
        <FooterTagList post={post}/>
      </DialogContent>
    </AnalyticsContext>
  </Dialog>
}

const EditTagsDialogComponent = registerComponent('EditTagsDialog', EditTagsDialog);

declare global {
  interface ComponentTypes {
    EditTagsDialog: typeof EditTagsDialogComponent
  }
}


text:
package net.miz_hi.smileessence.model.status.event;

import net.miz_hi.smileessence.model.status.user.UserModel;

public abstract class UserEvent extends EventModel
{

    public UserEvent(UserModel source)
    {
        super(source);
    }

    @Override
    public String getTextContent()
    {
        return "";
    }

}


text:
<?xml version="1.0" encoding="UTF-8"?>
<resource xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns="http://datacite.org/schema/kernel-4" xsi:schemaLocation="http://datacite.org/schema/kernel-4 http://schema.datacite.org/meta/kernel-4/metadata.xsd">
  <identifier identifierType="DOI">10.5072/example</identifier>
  <creators>
    <creator>
      <creatorName nameType="Personal">Mari, Bernard</creatorName>
      <givenName>Bernard</givenName>
      <familyName>Mari</familyName>
    </creator>
    <creator>
      <creatorName nameType="Personal">Puissegur, Marie-Pierre</creatorName>
      <givenName>Marie-Pierre</givenName>
      <familyName>Puissegur</familyName>
    </creator>
    <creator>
      <creatorName nameType="Personal">Barbry, Pascal</creatorName>
      <givenName>Pascal</givenName>
      <familyName>Barbry</familyName>
    </creator>
    <creator>
      <creatorName nameType="Personal">Lebrigand, Kevin</creatorName>
      <givenName>Kevin</givenName>
      <familyName>Lebrigand</familyName>
    </creator>
  </creators>
  <titles>
    <title xml:lang="en">
      Identification of putative novel specific targets of mir-210 in A549 human adenocarcinoma cells
    </title>
  </titles>
  <publisher xml:lang="fr">
    Institut de Pharmacologie Moleculaire et Cellulaire (IPMC), CNRS UMR6097, Universite de Nice Sophia-Antipolis, 660 route des lucioles, 06560 Valbonne - Sophia-Antipolis, France
  </publisher>
  <publicationYear>2010</publicationYear>
  <subjects>
    <subject schemeURI="http://www.nlm.nih.gov/mesh/meshhome.html" subjectScheme="Mesh">Neoplasms</subject>
    <subject schemeURI="http://purl.obolibrary.org/obo/obi" subjectScheme="OBI">Transcription profiling</subject>
    <subject schemeURI="http://www.ncbi.nlm.nih.gov/Taxonomy/" subjectScheme="NCBITaxon">Homo sapiens</subject>
    <subject schemeURI="http://www.ebi.ac.uk/efo" subjectScheme="Mesh">A549</subject>
    <subject schemeURI="http://purl.obolibrary.org/obo/obi" subjectScheme="OBI">DNA microarray</subject>
  </subjects>
  <contributors>
    <contributor contributorType="HostingInstitution">
      <contributorName xml:lang="fr" nameType="Organizational">INIST-CNRS</contributorName>
    </contributor>
  </contributors>
  <language>en</language>
  <resourceType resourceTypeGeneral="Text">Experiment report</resourceType>
  <relatedIdentifiers>
    <relatedIdentifier relatedIdentifierType="URL" relatedMetadataScheme="ISA-Tab" relationType="HasMetadata" schemeType="Text" schemeURI="http://isatab.sourceforge.net/docs/ISA-TAB_release-candidate-1_v1.0_24nov08.pdf">http://www.ncbi.nlm.nih.gov/geo/query/acc.cgi?acc=GSE18695</relatedIdentifier>
  </relatedIdentifiers>
  <sizes>
    <size>183 ko</size>
    <size>3 pages</size>
  </sizes>
  <formats>
    <format>PDF</format>
  </formats>
  <rightsList>
    <rights xml:lang="en-US" schemeURI="https://spdx.org/licenses/"   rightsIdentifierScheme="SPDX" rightsIdentifier="CC-BY-NC-ND-3.0"  rightsURI="http://creativecommons.org/licenses/by-nc-nd/3.0/"/>  </rightsList>
  <descriptions>
    <description xml:lang="en" descriptionType="Abstract">
      To identify putative novel specific targets of mir-210, we overexpressed miR-210 as well as miR-34a and a siRNA targeted against E2F3 in A549 human adenocarcinoma cells by transfecting them with synthetic pre-miRNAs or a synthetic negative pre-miRNA
      as control (miR-Neg). RNA samples were harvested at 48 hours post-transfection and 2 independent experiments performed in dye-swap: miR-210 versus miR-Neg ; miR-34a versus miR-Neg ; si-E2F3 versus miR-Neg ; si-control versus miR-Neg.
    </description>
  </descriptions>
</resource>


text:
/* global angular, $ */
(function () {
    "use strict";
    angular.module('geowebtoolkit.ui.components', [
        'geowebtoolkit.ui.components.opacity-slider',
        'geowebtoolkit.ui.components.layer-control',
        'geowebtoolkit.ui.components.layers-drop-down',
        'geowebtoolkit.ui.components.base-layer-selector',
        'geowebtoolkit.ui.components.google-place-name-search',
        'geowebtoolkit.ui.components.geo-place-name-search',
        'geowebtoolkit.ui.components.layer-interaction-toggle',
        'geowebtoolkit.ui.components.deprecated',
        'geowebtoolkit.ui.components.measure-toggle'
    ]);
})();


text:
DATA_DIR = '../data/'
# 线下调试模型所用数据文件的位置
OFF_LINE = '../data/offline/'
# 小样本位置
SAMPLES_DIR = '../data/offline/samples/'
# 分解后的行文数据文件
PARTS_DIR = '../data/parts/'
# 统计文件
STATISTICS = '../data/statistics/'

# 原始数据文件
TRAIN_ITEM = '../data/tianchi_mobile_recommend_train_item.csv'
TRAIN_USER = '../data/tianchi_mobile_recommend_train_user.csv'

# 提交文件名
PREDICT = '../data/tianchi_mobile_recommendation_predict.csv'

# 按照用户名和时间排序后的原始数据文件
TRAIN_USER_SORTED = '../data/tianchi_mobile_recommend_train_user_sorted.csv'
TRAIN_USER_PARTS = '../data/parts/part_%d.csv'
FEATURE = '../data/feature.csv'
FEATURE_PARTS = '../data/parts/feature_%s.csv'

# 线下调试模型所用的原始训练集和结果集
TRAN_USER_OFFLINE = '../data/offline/train_user.csv'
LABEL_OFFLINE = '../data/offline/label.csv'
ANSWER_OFFLINE = '../data/offline/answer.csv'
FEATURE_OFFLINE = '../data/offline/feature.csv'

# 小样本文件名
TRAIN_USER_SAMPLES = '../data/offline/samples/train_user_%d.csv'
LABEL_SAMPLES = '../data/offline/samples/label_%d.csv'
ANSWER_SAMPLES = '../data/offline/samples/answer_%d.csv'
PREDICT_SAMPLES = '../data/offline/samples/predict_%d.csv'
FEATURE_SAMPLES = '../data/offline/samples/feature_%s.csv'

USER_STATISTICS = '../data/statistics/user.csv'
ITEM_STATISTICS = '../data/statistics/item.csv'
SUBITEM_STATISTICS = '../data/statistics/subitem.csv'
USER_STATISTICS_OFFLINE = '../data/statistics/user_offline.csv'
ITEM_STATISTICS_OFFLINE = '../data/statistics/item_offline.csv'
SUBITEM_STATISTICS_OFFLINE = '../data/statistics/subitem_offline.csv'

# constants
END_TIME = '2014-12-19 00'
OFFLINE_END_TIME = '2014-12-18 00'

# 需要进行的动作

import os

dirs = [DATA_DIR, OFF_LINE, SAMPLES_DIR, PARTS_DIR, STATISTICS]
for d in dirs:
    if not os.path.isdir(d):
        os.mkdir(d)


text:
package fm.pattern.tokamak.server.dsl;

import static org.apache.commons.lang3.RandomStringUtils.randomAlphabetic;

import fm.pattern.tokamak.server.model.GrantType;
import fm.pattern.tokamak.server.service.GrantTypeService;
import fm.pattern.valex.Result;

public class GrantTypeDSL extends AbstractDSL<GrantTypeDSL, GrantType> {

	private String name = randomAlphabetic(10);
	private String description = null;

	public static GrantTypeDSL grantType() {
		return new GrantTypeDSL();
	}

	public GrantTypeDSL withName(String name) {
		this.name = name;
		return this;
	}

	public GrantTypeDSL withDescription(String description) {
		this.description = description;
		return this;
	}

	public GrantType build() {
		return create();
	}

	public GrantType save() {
		Result<GrantType> result = load(GrantTypeService.class).create(create());
		if (result.accepted()) {
			return result.getInstance();
		}
		throw new IllegalStateException("Unable to create grant type, errors: " + result.getErrors().toString());
	}

	private GrantType create() {
		GrantType grantType = new GrantType(name);
		grantType.setDescription(description);
		return grantType;
	}

}