text:
/***
 * author: charmyin
 * datetime: 2013-2-26 21:00
 * title: Control the organizationManage.jsp ~
 ***/

//Global the item name
var itemName="用户";

//Global all organization treeObj and setting
var selectedNodeId;
var allOrganizationTreeObj;
var allOrganizationTreeSetting = {
		data:{
			simpleData:{
				enable:true,
				idKey:"id",
				pIdKey:"parentId"
			}
		},
		callback:{
			onClick:function (event,treeId,node) {
				//Load organizationGrid by selected tree node's id as parentId
//				$("#organizationGrid").datagrid({
//					url:'organizationparent/'+node.id+'/all'
//				});
				selectedNodeId = node.id;
				//初始化新增和修改页面的隐藏值
				initParentId();
				$("#userGrid").datagrid({
					url:'user/organizationId/'+node.id+'/allUser',
					loadFilter:pagerFilter,
					method:'get',
					toolbar:'#toolbar',
					pagination:true,
					collapsible:true,
					title:"用户管理&nbsp----&nbsp"+node.name,
					rownumbers:true,
					singleSelect:false,
					pageSize:8,
				    pageList:[8,16,32,48,64],
					columns:[[
					          {field:'ck', checkbox:true },
					          {field:'id', title:'编号' },
					          {field:'loginId', title:'登录名'},
					          {field:'name', title:'昵称'},
					          {field:'cellPhone', title:'电话号码'},
					          {field:'sex', title:'性别',formatter:function(value,row,index){
	        		  				if (row.sex==0){
	        		  					return "男"
	        		  				} else if (row.sex==1){
	        		  					return "女";
	        		  				}else{
	        		  					return "";
	        		  				}
	        		  			}},
					          //{field:'dateCreated', title:'注册日期'},
					          //{field:'state', title:'是否禁用'},
					          {field:'remark', title:'备注'}
					]],
					onLoadError: function(msge){
						$.messager.alert('错误信息','服务器连接已断开或服务器内部错误!','error');
					}
				});
			}
		}
};

//Load all the organization Tree
function loadOrganizationTree(){
	$.ajax({
	  type: "GET",
	  url: "organization/all"
	}).done(function( msg ) {
		for(var i=0; i<msg.length; i++){
			msg[i].organizationType==0 ? (msg[i].isParent = false) : (msg[i].isParent = true);
		}
	  //Load the system manage tree
	  allOrganizationTreeObj = $.fn.zTree.init($("#div_allOrganization_tree"), allOrganizationTreeSetting, msg);
	 //rename the
	  var rootNode = allOrganizationTreeObj.getNodeByParam("id","1");
	  rootNode.name = $("title").html();
	  allOrganizationTreeObj.refresh();
	  //if selected a node, then append it ,else append the root node
	  var selectedNode;
	  if(selectedNodeId){
		  selectedNode = allOrganizationTreeObj.getNodeByParam("id",selectedNodeId);
	  }else{
		  selectedNode = allOrganizationTreeObj.getNodes()[0];
	  }
	  allOrganizationTreeObj.expandNode(selectedNode,true,false,false,false);
	  //Select the node which id is selectedNodeId, then trigger the click event on it
	  allOrganizationTreeObj.selectNode(selectedNode);
	  //sometime it require the server twice, I wonder~
	  $("#"+selectedNode.tId+"_a").trigger("click");
	});
}

//Used for client pagination
function pagerFilter(data){
    if (typeof data.length == 'number' && typeof data.splice == 'function'){    // is array
        data = {
            total: data.length,
            rows: data
        };
    }
    var dg = $(this);
    var opts = dg.datagrid('options');
    var pager = dg.datagrid('getPager');
    pager.pagination({
    	onBeforeRefresh:function(){
    		dg.datagrid("reload");
    	},
        onSelectPage:function(pageNum, pageSize){
            opts.pageNumber = pageNum;
            opts.pageSize = pageSize;
            pager.pagination('refresh',{
                pageNumber:pageNum,
                pageSize:pageSize
            });
            dg.datagrid('loadData',data);
        }
    });
    if (!data.originalRows){
        data.originalRows = (data.rows);
    }
    var start = (opts.pageNumber-1)*parseInt(opts.pageSize);
    var end = start + parseInt(opts.pageSize);
    data.rows = (data.originalRows.slice(start, end));
    return data;
}

//载入
function loadRolesForChoose(){
	var selectedNode = allOrganizationTreeObj.getNodeByParam("id",selectedNodeId);
	var htmlInner = "";
	//The first Get all the role belong to the same organization
	$.ajax({
	  type: "GET",
	  url: "role/orgId/"+selectedNode.id+"/all"
	}).done(function( msg ) {
		if(url.indexOf('update')>-1){
			//Get the uset id
			var row = $('#userGrid').datagrid('getSelected');
			//The second request the role of the user
			$.ajax({
			  type: "GET",
			  url: "user/"+row.id+"/roleNames"
			}).done(function( msg ) {
				//Check the checkboxes which
				$(".roleChooseClass").each(function(){
					for(var i=0; i<msg.length; i++){
						if($(this).val()==msg[i]){
							$(this).attr("checked","checked");
						}
					}
				});
			});
		}

		//alert(msg[0].name);
		htmlInner+="

";
		for(var i=0; i<msg.length; i++){
			htmlInner+='             <input type="checkbox" class="roleChooseClass" value="'+msg[i].name+'"/>'+msg[i].name+'
';
		}
		$("#innerRoleChoose").html(htmlInner);
	});
}

/********************************************************Initial the page*****************************************************/
$(function(){

	//Disable cache
	jQuery.ajaxSetup({ cache: false });
	//载入成功后,刷新左边树
	//Load the organization tree
	loadOrganizationTree();
	//Load grid
	//选择用户角色
	$("#btn_roles").click(function(){
		$('#role-dlg').dialog('open').dialog('setTitle','选择角色');
		loadRolesForChoose();
	});
});

//OrganizationCrud dialog
var url;

//Initial the parentId
function initParentId(){
	//Input the value and hidden value of parentId input
	var selectedNode = allOrganizationTreeObj.getNodeByParam("id",selectedNodeId);
	$("#hidden_organizationId").val(selectedNodeId);
	$("#input_organizationName").val(selectedNode.name);
}

function newForm(){
    $('#dlg').dialog('open').dialog('setTitle','新建'+itemName+'');
    $("#div_initPassphrase").hide();
    $("#input_loginId").removeAttr("readonly");
    $('#fm').form('clear');
    initParentId();
    $('#sexCombox').combobox('setValue', 0);
    url = 'user/save';
}
function editForm(){

    var row = $('#userGrid').datagrid('getSelected');

  //载入角色到input_role
	$.ajax({
	  type: "GET",
	  url: "user/"+row.id+"/roleNames"
	 // url: "role/getRolesByUserId/"+row.id
	}).done(function( msg ) {
		var roleString='';
		for(var i =0; i<msg.length;i++){
			if(i==(msg.length-1)){
				roleString+=msg[i]
			}else{
				roleString+=(msg[i]+',');
			}

		}
		$("#input_role").val(roleString);
		if (row){
	    	initParentId();
	    	$("#input_loginId").attr("readonly","readonly");
	        $('#dlg').dialog('open').dialog('setTitle','修改'+itemName+':'+row.loginId);
	        $("#div_initPassphrase").show();
//	        获取所属群组,修改时显示
//	        var nodes=allOrganizationTreeObj.getSelectedNodes();
	        $('#fm').form('load',row);
	        url = 'user/update?id='+row.id;
	    }
	});

}

function saveForm(){
    $('#fm').form('submit',{
        url: url,
        onSubmit: function(){
        	//组件验证,未通过则返回false
        	return $(this).form('validate');
        },
        success: function(resultString){
        	var result;
        	try{
        		 result = eval("("+resultString+")");
        	}catch(error){
        		$.messager.show({
                	title: '提示',
                    msg: resultString,
                    style:{
                		right:'',
                		top:document.body.scrollTop+document.documentElement.scrollTop,
                		bottom:''
                	}
                });
        		return;
        	}

            if (result.errorMsg){
                $.messager.show({
                	title: '提示!',
                    msg: "
"+result.errorMsg+"
",
                    style:{
                		right:'',
                		top:document.body.scrollTop+document.documentElement.scrollTop,
                		bottom:''
                	}
                });
            } else {
                $('#dlg').dialog('close');        // close the dialog

                $.messager.show({
                	title: '提示',
                    msg: "
保存成功!
",
                    style:{
                		right:'',
                		top:document.body.scrollTop+document.documentElement.scrollTop,
                		bottom:''
                	}
                });

                selectedNodeId = $("#hidden_organizationId").val();
                //Reload left tree and refresh the datagrid
                loadOrganizationTree();
            }
        }
    });
}

function destroySelectedItems(){
    var rows = $('#userGrid').datagrid('getSelections');
    var rowsLength = rows.length;
    if (rowsLength>0){
        $.messager.confirm('提示信息','确定删除选中'+itemName+'?',function(r){
            if (r){
            	var idsString='';
            	for(var i=0; i<rows.length; i++){
            		if((i+1)==rowsLength){
            			idsString+=rows[i].id;
            		}else{
            			idsString+=(rows[i].id+',');
            		}
            	}
            	$.post('user/deleteByIds',{ids:idsString},function(result){
                    if (result.suc){
                    	$.messager.show({
                        	title: '提示',
                            msg: "
删除成功!
",
                            style:{
                        		right:'',
                        		top:document.body.scrollTop+document.documentElement.scrollTop,
                        		bottom:''
                        	}
                        });
                    	//Reload left tree and refresh the datagrid
                    	loadOrganizationTree();
                    } else {
                        $.messager.show({    // show error message
                            title: '提示!',
                            msg: "
"+result.errorMsg+"
",
                            style:{
                        		right:'',
                        		top:document.body.scrollTop+document.documentElement.scrollTop,
                        		bottom:''
                        	}
                        });
                    }
                });
            }
        });
    }else{
    	$.messager.show({    // show error message
            title: '提示!',
            msg: "
请选择要删除的行!
",
            style:{
        		right:'',
        		top:document.body.scrollTop+document.documentElement.scrollTop,
        		bottom:''
        	}
        });
    }
}

//保存选择的role到form隐藏input中
var saveRole = function(){
	var roles="";
	$(".roleChooseClass").each(function(){
		if($(this).is(':checked')){
			roles+=($(this).val()+',');
		}
	});
	if(roles!=""){
		roles = roles.substring(0,roles.length-1);
	}
	$("#input_role").val(roles);
	$('#role-dlg').dialog('close');
};


text:
using System;

namespace CherrySeed.TypeTransformations
{
    class DoubleTransformation : TypeTransformationBase
    {
        public override object Transform(Type type, string str)
        {
            return double.Parse(str);
        }
    }
}

redpajama_set_name: RedPajamaGithub


text:
<!DOCTYPE html>

        <title>{% block title %}{% end %}</title>
        <meta http-equiv='Content-Type' content='text/html'; charset='utf-8'/> <meta http-equiv='Content-Language' content = 'zh-cn'/>
        <meta name="keywords" content ="github data"/>
        <meta name="author" content="cloudaice"/>
        <meta name="viewport" content="width=device-width, initial-scale=1.0">
        <meta name="description" content="make data simple">

        <link rel="stylesheet" type="text/css" href="/static/css/bootstrap.min.css"/>
        <link rel="stylesheet" type="text/css" href="/static/css/bootstrap-responsive.min.css"/>
        <link rel="stylesheet" type="text/css" href="/static/css/jquery-ui.css"/>
        <link rel="stylesheet" type="text/css" href="/static/css/datepicker.css">
        <link rel="stylesheet" type="text/css" href="/static/css/base.css">
        {% block css %} {% end %}

 Github Data

                    {% block content %}{% end %}

                Create By  Xiang Chao @ 2013.

        {% block script %}
        {% end %}


text:
import * as React from 'react';
import {Context} from './createContext';
import {IAction} from './Interfaces';

export interface RootProps {
    children?: () => React.ReactElement<any>;
    context: Context<any>;
}

export class Root extends React.Component<RootProps, any> {
    static propTypes = {
        children: React.PropTypes.any.isRequired
    };

    static childContextTypes = {
        context: React.PropTypes.instanceOf(Context).isRequired,
        contextState: React.PropTypes.any.isRequired,
        dispatchOnContext: React.PropTypes.func.isRequired
    };

    constructor(props: RootProps, context: any) {
        super(props, context);

        this.state = {
            contextState: this.props.context.getState(),
            dispatchOnContext: this.props.context.getDispatchFunction()
        };

        this.mountListener();
    }

    componentWillUnmount() {
        this.unmountListener();
    }

    private listener() {
        this.setState({
            contextState: this.props.context.getState()
        });
    }

    private mountListener() {
        this.listener = this.listener.bind(this);
        this.props.context.register(this.listener);
    }

    private unmountListener() {
        this.props.context.unregister(this.listener);
        delete this.listener;
    }

    render() {
        return this.props.children();
    }

    getChildContext() {
        return {
            context: this.props.context,
            contextState: this.state.contextState,
            dispatchOnContext: this.state.dispatchOnContext
        };
    }
}


text:
FROM scratch
MAINTAINER Ewa Socala <socaa@google.com>
ADD resource-consumer /resource-consumer
EXPOSE 8080
ENTRYPOINT ["/resource-consumer"]


text:
package org.netbeans.jpa.modeler.core.widget.flow.relation;

import org.netbeans.jpa.modeler.core.widget.attribute.relation.RelationAttributeWidget;
import org.netbeans.jpa.modeler.core.widget.relation.flow.direction.Bidirectional;
import org.netbeans.modeler.specification.model.document.IModelerScene;
import org.netbeans.modeler.widget.edge.info.EdgeWidgetInfo;

/**
 *
 * @author Gaurav_Gupta
 */
public class BMTMRelationFlowWidget extends MTMRelationFlowWidget implements Bidirectional {

    private RelationAttributeWidget targetRelationAttributeWidget;

    public BMTMRelationFlowWidget(IModelerScene scene, EdgeWidgetInfo edge) {
        super(scene, edge);
    }

    /**
     * @return the targetRelationAttributeWidget
     */
    @Override
    public RelationAttributeWidget getTargetRelationAttributeWidget() {
        return targetRelationAttributeWidget;
    }

    /**
     * @param targetRelationAttributeWidget the targetRelationAttributeWidget to
     * set
     */
    @Override
    public void setTargetRelationAttributeWidget(RelationAttributeWidget targetRelationAttributeWidget) {
        this.targetRelationAttributeWidget = targetRelationAttributeWidget;
    }

}


text:
<?php
namespace atoum\AtoumBundle\tests\units\DomCrawler;

use mageekguy\atoum;
use atoum\AtoumBundle\DomCrawler\Crawler;
use atoum\AtoumBundle\DomCrawler\DOMNode as TestedClass;

class DOMNode extends atoum\test
{
    public function test__construct()
    {
        $this
            ->if($node = new \StdClass)
            ->then
                ->exception(function () use ($node) {
                    new TestedClass($node);
                })
                    ->isInstanceOf('\\InvalidArgumentException')
                    ->hasMessage('Node should be an instance of either \\DOMNode or \\Symfony\\Component\\DomCrawler\\Crawler, got ' . get_class($node))
            ->if($node = new \DOMElement(uniqid('_')))
            ->then
                ->object($object = new TestedClass($node))
                ->object($object->getNode())->isIdenticalTo($node)
            ->if($crawler = new \Symfony\Component\DomCrawler\Crawler())
            ->then
                ->object($object = new TestedClass($crawler))
                ->object($object->getNode())->isIdenticalTo($crawler)
        ;
    }

    public function testText()
    {
        $this
            ->if($node = new \DOMElement(uniqid('_'), $value = uniqid()))
            ->and($object = new TestedClass($node))
            ->then
                ->string($object->text())->isEqualTo($value)
            ->if($crawler = new \Symfony\Component\DomCrawler\Crawler(array($node)))
            ->and($object = new TestedClass($crawler))
            ->then
                ->string($object->text())->isEqualTo($value)
        ;
    }

    public function testAttr()
    {
        $this
            ->given($document = new \DOMDocument())
            ->if($node = $document->createElement(uniqid('_')))
            ->and($object = new TestedClass($node))
            ->then
                ->string($object->attr(uniqid()))->isEmpty()
            ->if($crawler = new \Symfony\Component\DomCrawler\Crawler(array($node)))
            ->and($object = new TestedClass($crawler))
            ->then
                ->variable($object->attr(uniqid()))->isNull()
            ->if($a = $node->setAttribute($attr = uniqid('_'), $value = uniqid()))
            ->and($object = new TestedClass($node))
            ->then
                ->string($object->attr($attr))->isEqualTo($value)
            ->if($crawler = new \Symfony\Component\DomCrawler\Crawler(array($node)))
            ->and($object = new TestedClass($crawler))
            ->then
                ->string($object->attr($attr))->isEqualTo($value)
        ;
    }

    public function testChildren()
    {
        $this
            ->given($document = new \DOMDocument())
            ->if($node = $document->createElement(uniqid('_')))
            ->and($child = $document->createElement(uniqid('_')))
            ->and($node->appendChild($child))
            ->and($crawler = new Crawler(array($node)))
            ->and($object = new TestedClass($crawler))
            ->then
                ->object($children = $object->children())->isInstanceOf('\\Symfony\\Component\\DomCrawler\\Crawler')
                ->boolean($children->contains($child))->isTrue()
            ->if($object = new TestedClass($node))
            ->then
                ->object($children = $object->children())->isInstanceOf('\\Symfony\\Component\\DomCrawler\\Crawler')
                ->boolean($children->contains($child))->isTrue()
        ;
    }
}


text:
from .ftml import FTML

# aliases
ftml = FTML


text:
module Backup

include("module_common.jl")

const _libcloud_backup_types = PyCall.PyNULL()
const _libcloud_backup_providers = PyCall.PyNULL()
const _libcloud_backup_base = PyCall.PyNULL()

immutable BackupDriver
    o::PyObject

    function BackupDriver(provider::Compat.String, args...; kwargs...)
        cls = _libcloud_backup_providers[:get_driver](provider)
        BackupDriver(cls(args...; kwargs...))
    end
    BackupDriver(driver::PyObject) = new(driver)
end
show(io::IO, c::BackupDriver) = print(io, c.o[:__str__]())

immutable BackupTarget
    o::PyObject

    id::Nullable{Compat.String}
    name::Compat.String
    address::Compat.String
    typ::Compat.String
    extra::Dict
    driver::BackupDriver

    function BackupTarget(o::PyObject)
        new(o, o[:id], o[:name], o[:address], o[:type], o[:extra], BackupDriver(o[:driver]))
    end
end
PyObject(o::BackupTarget) = o.o
convert(::Type{BackupTarget}, o::PyObject) =  BackupTarget(o)
show(io::IO, o::BackupTarget) = print(io, o.o[:__str__]())
@doc LazyHelp(_libcloud_backup_base, "BackupTarget") BackupTarget

immutable BackupTargetJob
    o::PyObject

    id::Nullable{Compat.String}
    status::Compat.String
    progress::Int
    target::BackupTarget
    extra::Dict
    driver::BackupDriver

    function BackupTargetJob(o::PyObject)
        new(o, o[:id], o[:status], o[:progress], BackupTarget(o[:target]), o[:extra], BackupDriver(o[:driver]))
    end
end
PyObject(o::BackupTargetJob) = o.o
convert(::Type{BackupTargetJob}, o::PyObject) =  BackupTargetJob(o)
show(io::IO, o::BackupTargetJob) = print(io, o.o[:__str__]())
@doc LazyHelp(_libcloud_backup_base, "BackupTargetJob") BackupTargetJob

immutable BackupTargetRecoveryPoint
    o::PyObject

    id::Nullable{Compat.String}
    date::DateTime
    target::BackupTarget
    extra::Dict
    driver::BackupDriver

    function BackupTargetRecoveryPoint(o::PyObject)
        new(o, o[:id], o[:date], BackupTarget(o[:target]), o[:extra], BackupDriver(o[:driver]))
    end
end
PyObject(o::BackupTargetRecoveryPoint) = o.o
convert(::Type{BackupTargetRecoveryPoint}, o::PyObject) =  BackupTargetRecoveryPoint(o)
show(io::IO, o::BackupTargetRecoveryPoint) = print(io, o.o[:__str__]())
@doc LazyHelp(_libcloud_backup_base, "BackupTargetRecoveryPoint") BackupTargetRecoveryPoint

const _backupdriver_fns = [
    :get_supported_target_types, :list_targets,
    :create_target, :create_target_from_node, :create_target_from_storage_container,
    :update_target, :delete_target,
    :list_recovery_points, :recover_target, :recover_target_out_of_place,
    :get_target_job, :list_target_jobs, :create_target_job, :resume_target_job, :suspend_target_job, :cancel_target_job
]

const _backup_target_fns = [ :update, :delete ]
const _backup_target_job_fns = [ :cancel, :suspend, :resume ]
const _backup_target_recovery_point_fns = [ :recover, :recover_to ]

for f in union(Set(_backupdriver_fns), Set(_base_driver_fns))
    sf = string(f)
    @eval @doc LazyHelp(_libcloud_backup_base, "BackupDriver", $sf) $(f)(b::BackupDriver, args...; kwargs...) = b.o[$(sf)](args...; kwargs...)
end

for f in _backup_target_fns
    sf = string(f)
    @eval @doc LazyHelp(_libcloud_backup_base, "BackupTarget", $sf) $(f)(b::BackupTarget, args...; kwargs...) = b.o[$(sf)](args...; kwargs...)
end

for f in _backup_target_job_fns
    sf = string(f)
    @eval @doc LazyHelp(_libcloud_backup_base, "BackupTargetJob", $sf) $(f)(b::BackupTargetJob, args...; kwargs...) = b.o[$(sf)](args...; kwargs...)
end

for f in _backup_target_recovery_point_fns
    sf = string(f)
    @eval @doc LazyHelp(_libcloud_backup_base, "BackupTargetRecoveryPoint", $sf) $(f)(b::BackupTargetRecoveryPoint, args...; kwargs...) = b.o[$(sf)](args...; kwargs...)
end

# Initialize cloud backup
function __init__()
    copy!(_libcloud_backup_types, pyimport("libcloud.backup.types"))
    copy!(_libcloud_backup_providers, pyimport("libcloud.backup.providers"))
    copy!(_libcloud_backup_base, pyimport("libcloud.backup.base"))

    global const BackupProvider = pywrap(_libcloud_backup_types[:Provider])
    global const BackupTargetType = pywrap(_libcloud_backup_types[:BackupTargetType])
    global const BackupTargetJobStatusType = pywrap(_libcloud_backup_types[:BackupTargetJobStatusType])

    _map_types(_libcloud_backup_base, (BackupTarget, BackupTargetJob, BackupTargetRecoveryPoint))
end

# types
export BackupProvider, BackupDriver, BackupTargetType, BackupTarget, BackupTargetJob, BackupTargetRecoveryPoint
# backup driver functions
export get_supported_target_types, list_targets,
       create_target, create_target_from_node, create_target_from_storage_container,
       update_target, delete_target,
       list_recovery_points, recover_target, recover_target_out_of_place,
       get_target_job, list_target_jobs, create_target_job, resume_target_job, suspend_target_job, cancel_target_job
# backup target functions
export update, delete
# backup target job functions
export cancel, suspend, resume
# backup target recovery point functions
export recover, recover_to

end # module Backup


text:
'use strict';

import {Registry} from 'vs/platform/platform';
import types = require('vs/base/common/types');
import {IConfigurationNode, IConfigurationRegistry, Extensions} from 'vs/platform/configuration/common/configurationRegistry';

export function setNode(root: any, key: string, value: any): void {
	const segments = key.split('.');
	const last = segments.pop();

	let curr = root;
	segments.forEach(s => {
		let obj = curr[s];
		switch (typeof obj) {
			case 'undefined':
				obj = curr[s] = Object.create(null);
				break;
			case 'object':
				break;
			default:
				console.log('Conflicting configuration setting: ' + key + ' at ' + s + ' with ' + JSON.stringify(obj));
		}
		curr = obj;
	});

	curr[last] = value;
}

function processDefaultValues(withConfig: (config: IConfigurationNode, isTop?: boolean) => boolean): void {
	const configurations = Registry.as<IConfigurationRegistry>(Extensions.Configuration).getConfigurations();

	const visit = (config: IConfigurationNode, level: number) => {
		const handled = withConfig(config, level === 0);

		if (Array.isArray(config.allOf)) {
			config.allOf.forEach((c) => {
				// if the config node only contains an `allOf` we treat the `allOf` children as if they were at the top level
				visit(c, (!handled && level === 0) ? level : level + 1);
			});
		}
	};

	configurations.sort((c1, c2) => {
		if (typeof c1.order !== 'number') {
			return 1;
		}

		if (typeof c2.order !== 'number') {
			return -1;
		}
		if (c1.order === c2.order) {
			const title1 = c1.title || '';
			const title2 = c2.title || '';
			return title1.localeCompare(title2);
		}
		return c1.order - c2.order;
	}).forEach((config) => {
		visit(config, 0);
	});
}

export function getDefaultValues(): any {
	const ret: any = Object.create(null);

	const handleConfig = (config: IConfigurationNode, isTop: boolean): boolean => {
		if (config.properties) {
			Object.keys(config.properties).forEach((key) => {
				const prop = config.properties[key];
				let value = prop.default;
				if (types.isUndefined(prop.default)) {
					value = getDefaultValue(prop.type);
				}
				setNode(ret, key, value);
			});

			return true;
		}

		return false;
	};

	processDefaultValues(handleConfig);

	return ret;
}

export function getDefaultValuesContent(indent: string): string {
	let lastEntry = -1;
	const result: string[] = [];
	result.push('{');

	const handleConfig = (config: IConfigurationNode, isTop: boolean): boolean => {
		let handled = false;
		if (config.title) {
			handled = true;
			if (isTop) {
				result.push('');
				result.push('// ' + config.title);
			} else {
				result.push(indent + '// ' + config.title);
			}
			result.push('');
		}

		if (config.properties) {
			handled = true;
			Object.keys(config.properties).forEach((key) => {

				const prop = config.properties[key];
				let defaultValue = prop.default;
				if (types.isUndefined(defaultValue)) {
					defaultValue = getDefaultValue(prop.type);
				}
				if (prop.description) {
					result.push(indent + '// ' + prop.description);
				}

				let valueString = JSON.stringify(defaultValue, null, indent);
				if (valueString && (typeof defaultValue === 'object')) {
					valueString = addIndent(valueString, indent);
				}

				if (lastEntry !== -1) {
					result[lastEntry] += ',';
				}
				lastEntry = result.length;

				result.push(indent + JSON.stringify(key) + ': ' + valueString);
				result.push('');
			});
		}

		return handled;
	};

	processDefaultValues(handleConfig);

	result.push('}');

	return result.join('\n');
}

function addIndent(str: string, indent: string): string {
	return str.split('\n').join('\n' + indent);
}

function getDefaultValue(type: string | string[]): any {
	const t = Array.isArray(type) ? (<string[]>type)[0] : <string>type;
	switch (t) {
		case 'boolean':
			return false;
		case 'integer':
		case 'number':
			return 0;
		case 'string':
			return '';
		case 'array':
			return [];
		case 'object':
			return {};
		default:
			return null;
	}
}

export function flatten(contents: any): any {
	const root = Object.create(null);

	for (let key in contents) {
		setNode(root, key, contents[key]);
	}

	return root;
}

export function getConfigurationKeys(): string[] {
	const keys: string[] = [];

	const configurations = Registry.as<IConfigurationRegistry>(Extensions.Configuration).getConfigurations();
	configurations.forEach(config => {
		if (config.properties) {
			keys.push(...Object.keys(config.properties));
		}
	});

	return keys;
}


text:
title: Weekly VM updates - Bitrise CLI 1.3.6 and Node.js on Linux
date: 2016-07-16 11:03 UTC
tags: announcement, status
authors: Viktor Benei|viktorbenei@bitrise.io
---

## Summary

As usual a new [Bitrise CLI](https://github.com/bitrise-io/bitrise)
version was published on the second Tuesday of the month (this last Tuesday),
and as there was no show-stopper issue we updated the VMs this weekend to use the
latest Bitrise CLI version: `1.3.6` 🎉

You can read more about the new CLI version in our previous blog post:
[Monthly release of Bitrise CLI (July)](/2016/07/13/monthly-release-of-bitrise-cli-july.html).

One more notable update: the Android / Linux stack now has Node.js v6 pre-installed! 😱
The Node.js version right now is the same on the macOS "Edge" stack and on the
Linux / Android stack (`v6.3.0`) and will be updated on both at every weekend.

## macOS Stacks

As usual, all of the macOS Stacks received a dependency manager cache (`brew`, `cocoapods` and `bitrise CLI`) update.
*These Cache updates __do not__ change the pre-installed tool versions, it's
only an update of package manager caches, for faster dependency installs.*

**The only exception is the "Edge" stack, which is re-built every week**,
so it includes the latest-and-greatest versions of the pre-installed tools,
not just dependency manager cache updates.

As everything else we use for
provisioning the macOS VMs, the weekly cache update `Ansible` playbook
[can be found on GitHub](https://github.com/bitrise-io/osx-box-bootstrap/blob/master/weekly-cache-update-playbook.yml).

You can find this week's Stack `diff`s on GitHub:

* Xcode "Edge": [diff](https://github.com/bitrise-io/bitrise.io/pull/46/commits/a5b3a8e7dab7e23d6cab330d4036a275d30f8d3d) / [full system report](https://github.com/bitrise-io/bitrise.io/blob/master/system_reports/osx-xcode-edge.log)
* Xcode 8.0.x: [diff](https://github.com/bitrise-io/bitrise.io/pull/46/commits/15f6e1440b33d735583cefd7a2e49bc84c28300a) / [full system report](https://github.com/bitrise-io/bitrise.io/blob/master/system_reports/osx-xcode-8.0.x.log)
* Xcode 7.3: [diff](https://github.com/bitrise-io/bitrise.io/pull/46/commits/82c5715cff4e8f229ded6e9ed0791fe6f5b7335c) / [full system report](https://github.com/bitrise-io/bitrise.io/blob/master/system_reports/osx-xcode-7.3.log)
* Xcode 7.2: [diff](https://github.com/bitrise-io/bitrise.io/pull/46/commits/5ed1761880355baa5070576475097b6c33a522bd) / [full system report](https://github.com/bitrise-io/bitrise.io/blob/master/system_reports/osx-xcode-7.2.log)
* Xcode 6.4: [diff](https://github.com/bitrise-io/bitrise.io/pull/46/commits/cfe7fc7b560dfa3cf7b9f3fdce5bb918856a58f6) / [full system report](https://github.com/bitrise-io/bitrise.io/blob/master/system_reports/osx-xcode-6.4.log)

## Android / Linux (Docker) Stack

You can find this week's Stack `diff`s on GitHub:

* Ubuntu 16.04: [diff](https://github.com/bitrise-io/bitrise.io/pull/46/commits/a39d8412ccfa18d492e81989c279e83938d6a4aa) / [full system report](https://github.com/bitrise-io/bitrise.io/blob/master/system_reports/docker-based-android-setup.log)

## Xamarin Stacks

Xamarin Stacks are based on the OS X stacks, so the dependency manager cache updates are applied
on these stacks too (see the `OS X Stacks: Dependency manager cache updates` section for more detail).

In addition to the dependency manager cache updates Xamarin Stacks are upgraded to the latest
Xamarin Studio versions on every weekend.

You can find this week's Stack `diff`s on GitHub:

* Xamarin Stable: [diff](https://github.com/bitrise-io/bitrise.io/pull/46/commits/b9c04b0853e2e853ce81846171ee9c6e4ac04e93) / [full system report](https://github.com/bitrise-io/bitrise.io/blob/master/system_reports/osx-xamarin-stable.log)
* Xamarin Beta: [diff](https://github.com/bitrise-io/bitrise.io/pull/46/commits/1ab2102719f0cee6b9ed2c19069fd959eef47e2a) / [full system report](https://github.com/bitrise-io/bitrise.io/blob/master/system_reports/osx-xamarin-beta.log)
* Xamarin Alpha: [diff](https://github.com/bitrise-io/bitrise.io/pull/46/commits/18b957b9ba1f75c907b11272d479061829c4e21d) / [full system report](https://github.com/bitrise-io/bitrise.io/blob/master/system_reports/osx-xamarin-alpha.log)

## Stack / System Reports

You can find the full system report of all of the available Stacks
on GitHub: [https://github.com/bitrise-io/bitrise.io/tree/master/system_reports](https://github.com/bitrise-io/bitrise.io/tree/master/system_reports).

If you'd like to add additional tools to be pre-installed you can find the
instructions on [GitHub](https://github.com/bitrise-io/bitrise.io#request-a-tool-to-be-pre-installed-on-a-build-machine),
for both the Linux and for the OS X stacks.


text:
"""PyCrypto 3DES implementation."""

from .cryptomath import *
from .tripledes import *

if pycryptoLoaded:
    import Crypto.Cipher.DES3

    def new(key, mode, IV):
        return PyCrypto_TripleDES(key, mode, IV)

    class PyCrypto_TripleDES(TripleDES):

        def __init__(self, key, mode, IV):
            TripleDES.__init__(self, key, mode, IV, "pycrypto")
            key = bytesToString(key)
            IV = bytesToString(IV)
            self.context = Crypto.Cipher.DES3.new(key, mode, IV)

        def encrypt(self, plaintext):
            plaintext = bytesToString(plaintext)
            return stringToBytes(self.context.encrypt(plaintext))

        def decrypt(self, ciphertext):
            ciphertext = bytesToString(ciphertext)
            return stringToBytes(self.context.decrypt(ciphertext))


text:
Modify the values in appd-env.sh as appropriate for your environment.

# Deploy/install a new service
`./ubuntu-deploy-service.sh appd-controller.init.d.sh`

## Deploy/install all services (Optional)
`./ubuntu-deploy-all-services.sh`
You'll need to comment in/out the appropriate services

# Service Usage

## Check service status
`service appd-controller status`

## Start service
`service appd-controller start`

## Stop service
`service appd-controller stop`

## Restart service
`service appd-controller restart`

## Check status for all services
``./AppDyanamics/status.sh`
You'll need to comment in/out the appropriate services


text:
package retryutils

import (
	"testing"
	"time"

	"github.com/stretchr/testify/require"
)

// TestLinear tests retry logic
func TestLinear(t *testing.T) {
	t.Parallel()

	r, err := NewLinear(LinearConfig{
		Step: time.Second,
		Max:  3 * time.Second,
	})
	require.NoError(t, err)
	require.Equal(t, r.Duration(), time.Duration(0))
	r.Inc()
	require.Equal(t, r.Duration(), time.Second)
	r.Inc()
	require.Equal(t, r.Duration(), 2*time.Second)
	r.Inc()
	require.Equal(t, r.Duration(), 3*time.Second)
	r.Inc()
	require.Equal(t, r.Duration(), 3*time.Second)
	r.Reset()
	require.Equal(t, r.Duration(), time.Duration(0))
}

func TestLinearRetryMax(t *testing.T) {
	t.Parallel()

	cases := []struct {
		desc              string
		config            LinearConfig
		previousCompareFn require.ComparisonAssertionFunc
	}{
		{
			desc: "FullJitter",
			config: LinearConfig{
				First:  time.Second * 45,
				Step:   time.Second * 30,
				Max:    time.Minute,
				Jitter: NewFullJitter(),
			},
			previousCompareFn: require.NotEqual,
		},
		{
			desc: "HalfJitter",
			config: LinearConfig{
				First:  time.Second * 45,
				Step:   time.Second * 30,
				Max:    time.Minute,
				Jitter: NewHalfJitter(),
			},
			previousCompareFn: require.NotEqual,
		},
		{
			desc: "SeventhJitter",
			config: LinearConfig{
				First:  time.Second * 45,
				Step:   time.Second * 30,
				Max:    time.Minute,
				Jitter: NewSeventhJitter(),
			},
			previousCompareFn: require.NotEqual,
		},

		{
			desc: "NoJitter",
			config: LinearConfig{
				First: time.Second * 45,
				Step:  time.Second * 30,
				Max:   time.Minute,
			},
			previousCompareFn: require.Equal,
		},
	}

	for _, tc := range cases {
		tc := tc
		t.Run(tc.desc, func(t *testing.T) {
			t.Parallel()
			linear, err := NewLinear(tc.config)
			require.NoError(t, err)

			// artificially spike the attempts to get to max
			linear.attempt = 100

			// get the initial previous value to compare with
			previous := linear.Duration()
			linear.Inc()

			for i := 0; i < 50; i++ {
				duration := linear.Duration()
				linear.Inc()

				// ensure duration does not exceed maximum
				require.LessOrEqual(t, duration, tc.config.Max)

				// ensure duration comparison to previous is satisfied
				tc.previousCompareFn(t, duration, previous)
			}
		})
	}
}


text:
<title>Machine Constraints - Using the GNU Compiler Collection (GCC)</title>
<meta http-equiv="Content-Type" content="text/html">
<meta name="description" content="Using the GNU Compiler Collection (GCC)">
<meta name="generator" content="makeinfo 4.13">
<link title="Top" rel="start" href="index.html#Top">
<link rel="up" href="Constraints.html#Constraints" title="Constraints">
<link rel="prev" href="Modifiers.html#Modifiers" title="Modifiers">
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Previous: Modifiers,
Up: Constraints

6.42.4 Constraints for Particular Machines

Whenever possible, you should use the general-purpose constraint letters
in asm arguments, since they will convey meaning more readily to
people reading your code.  Failing that, use the constraint letters
that usually have very similar meanings across architectures.  The most
commonly used constraints are ‘<samp>m</samp>’ and ‘<samp>r</samp>’ (for memory and
general-purpose registers respectively; see Simple Constraints), and
‘<samp>I</samp>’, usually the letter indicating the most common
immediate-constant format.

Each architecture defines additional constraints.  These constraints
are used by the compiler itself for instruction generation, as well as
for asm statements; therefore, some of the constraints are not
particularly useful for asm.  Here is a summary of some of the
machine-dependent constraints available on some particular machines;
it includes both constraints that are useful for asm and
constraints that aren't.  The compiler source file mentioned in the
table heading for each architecture is the definitive reference for
the meanings of that architecture's constraints.

AArch64 family—<samp>config/aarch64/constraints.md</samp>

k
The stack pointer register (SP)

w
Floating point or SIMD vector register

I
Integer constant that is valid as an immediate operand in an ADD
instruction

J
Integer constant that is valid as an immediate operand in a SUB
instruction (once negated)

K
Integer constant that can be used with a 32-bit logical instruction

L
Integer constant that can be used with a 64-bit logical instruction

M
Integer constant that is valid as an immediate operand in a 32-bit MOV
pseudo instruction. The MOV may be assembled to one of several different
machine instructions depending on the value

N
Integer constant that is valid as an immediate operand in a 64-bit MOV
pseudo instruction

S
An absolute symbolic address or a label reference

Y
Floating point constant zero

Z
Integer constant zero

Ush
The high part (bits 12 and upwards) of the pc-relative address of a symbol
within 4GB of the instruction

Q
A memory address which uses a single base register with no offset

Ump
A memory address suitable for a load/store pair instruction in SI, DI, SF and
DF modes

ARC —<samp>config/arc/constraints.md</samp>

q
Registers usable in ARCompact 16-bit instructions: r0-r3,
r12-r15.  This constraint can only match when the <samp>-mq</samp>
option is in effect.

e
Registers usable as base-regs of memory addresses in ARCompact 16-bit memory
instructions: r0-r3, r12-r15, sp.
This constraint can only match when the <samp>-mq</samp>
option is in effect.

D
ARC FPX (dpfp) 64-bit registers. D0, D1.

I
A signed 12-bit integer constant.

Cal
constant for arithmetic/logical operations.  This might be any constant
that can be put into a long immediate by the assmbler or linker without
involving a PIC relocation.

K
A 3-bit unsigned integer constant.

L
A 6-bit unsigned integer constant.

CnL
One's complement of a 6-bit unsigned integer constant.

CmL
Two's complement of a 6-bit unsigned integer constant.

M
A 5-bit unsigned integer constant.

O
A 7-bit unsigned integer constant.

P
A 8-bit unsigned integer constant.

H
Any const_double value.

ARM family—<samp>config/arm/constraints.md</samp>

w
VFP floating-point register

G
The floating-point constant 0.0

I
Integer that is valid as an immediate operand in a data processing
instruction.  That is, an integer in the range 0 to 255 rotated by a
multiple of 2

J
Integer in the range −4095 to 4095

K
Integer that satisfies constraint ‘<samp>I</samp>’ when inverted (ones complement)

L
Integer that satisfies constraint ‘<samp>I</samp>’ when negated (twos complement)

M
Integer in the range 0 to 32

Q
A memory reference where the exact address is in a single register
(`‘<samp>m</samp>’' is preferable for asm statements)

R
An item in the constant pool

S
A symbol in the text segment of the current file

Uv
A memory reference suitable for VFP load/store insns (reg+constant offset)

Uy
A memory reference suitable for iWMMXt load/store instructions.

Uq
A memory reference suitable for the ARMv4 ldrsb instruction.

AVR family—<samp>config/avr/constraints.md</samp>

l
Registers from r0 to r15

a
Registers from r16 to r23

d
Registers from r16 to r31

w
Registers from r24 to r31.  These registers can be used in ‘<samp>adiw</samp>’ command

e
Pointer register (r26–r31)

b
Base pointer register (r28–r31)

q
Stack pointer register (SPH:SPL)

t
Temporary register r0

x
Register pair X (r27:r26)

y
Register pair Y (r29:r28)

z
Register pair Z (r31:r30)

I
Constant greater than −1, less than 64

J
Constant greater than −64, less than 1

K
Constant integer 2

L
Constant integer 0

M
Constant that fits in 8 bits

N
Constant integer −1

O
Constant integer 8, 16, or 24

P
Constant integer 1

G
A floating point constant 0.0

Q
A memory address based on Y or Z pointer with displacement.

Epiphany—<samp>config/epiphany/constraints.md</samp>

U16
An unsigned 16-bit constant.

K
An unsigned 5-bit constant.

L
A signed 11-bit constant.

Cm1
A signed 11-bit constant added to −1.
Can only match when the <samp>-m1reg-<var>reg</var></samp> option is active.

Cl1
Left-shift of −1, i.e., a bit mask with a block of leading ones, the rest
being a block of trailing zeroes.
Can only match when the <samp>-m1reg-<var>reg</var></samp> option is active.

Cr1
Right-shift of −1, i.e., a bit mask with a trailing block of ones, the
rest being zeroes.  Or to put it another way, one less than a power of two.
Can only match when the <samp>-m1reg-<var>reg</var></samp> option is active.

Cal
Constant for arithmetic/logical operations.
This is like i, except that for position independent code,
no symbols / expressions needing relocations are allowed.

Csy
Symbolic constant for call/jump instruction.

Rcs
The register class usable in short insns.  This is a register class
constraint, and can thus drive register allocation.
This constraint won't match unless <samp>-mprefer-short-insn-regs</samp> is
in effect.

Rsc
The the register class of registers that can be used to hold a
sibcall call address.  I.e., a caller-saved register.

Rct
Core control register class.

Rgs
The register group usable in short insns.
This constraint does not use a register class, so that it only
passively matches suitable registers, and doesn't drive register allocation.

Rra
Matches the return address if it can be replaced with the link register.

Rcc
Matches the integer condition code register.

Sra
Matches the return address if it is in a stack slot.

Cfm
Matches control register values to switch fp mode, which are encapsulated in
UNSPEC_FP_MODE.

CR16 Architecture—<samp>config/cr16/cr16.h</samp>

b
Registers from r0 to r14 (registers without stack pointer)

t
Register from r0 to r11 (all 16-bit registers)

p
Register from r12 to r15 (all 32-bit registers)

I
Signed constant that fits in 4 bits

J
Signed constant that fits in 5 bits

K
Signed constant that fits in 6 bits

L
Unsigned constant that fits in 4 bits

M
Signed constant that fits in 32 bits

N
Check for 64 bits wide constants for add/sub instructions

G
Floating point constant that is legal for store immediate

Hewlett-Packard PA-RISC—<samp>config/pa/pa.h</samp>

a
General register 1

f
Floating point register

q
Shift amount register

x
Floating point register (deprecated)

y
Upper floating point register (32-bit), floating point register (64-bit)

Z
Any register

I
Signed 11-bit integer constant

J
Signed 14-bit integer constant

K
Integer constant that can be deposited with a zdepi instruction

L
Signed 5-bit integer constant

M
Integer constant 0

N
Integer constant that can be loaded with a ldil instruction

O
Integer constant whose value plus one is a power of 2

P
Integer constant that can be used for and operations in depi
and extru instructions

S
Integer constant 31

U
Integer constant 63

G
Floating-point constant 0.0

A
A lo_sum data-linkage-table memory operand

Q
A memory operand that can be used as the destination operand of an
integer store instruction

R
A scaled or unscaled indexed memory operand

T
A memory operand for floating-point loads and stores

W
A register indirect memory operand

picoChip family—<samp>picochip.h</samp>

k
Stack register.

f
Pointer register.  A register which can be used to access memory without
supplying an offset.  Any other register can be used to access memory,
but will need a constant offset.  In the case of the offset being zero,
it is more efficient to use a pointer register, since this reduces code
size.

t
A twin register.  A register which may be paired with an adjacent
register to create a 32-bit register.

a
Any absolute memory address (e.g., symbolic constant, symbolic
constant + offset).

I
4-bit signed integer.

J
4-bit unsigned integer.

K
8-bit signed integer.

M
Any constant whose absolute value is no greater than 4-bits.

N
10-bit signed integer

O
16-bit signed integer.

PowerPC and IBM RS6000—<samp>config/rs6000/constraints.md</samp>

b
Address base register

d
Floating point register (containing 64-bit value)

f
Floating point register (containing 32-bit value)

v
Altivec vector register

wa
Any VSX register if the -mvsx option was used or NO_REGS.

wd
VSX vector register to hold vector double data or NO_REGS.

wf
VSX vector register to hold vector float data or NO_REGS.

wg
If <samp>-mmfpgpr</samp> was used, a floating point register or NO_REGS.

wh
Floating point register if direct moves are available, or NO_REGS.

wi
FP or VSX register to hold 64-bit integers for VSX insns or NO_REGS.

wj
FP or VSX register to hold 64-bit integers for direct moves or NO_REGS.

wk
FP or VSX register to hold 64-bit doubles for direct moves or NO_REGS.

wl
Floating point register if the LFIWAX instruction is enabled or NO_REGS.

wm
VSX register if direct move instructions are enabled, or NO_REGS.

wn
No register (NO_REGS).

wr
General purpose register if 64-bit instructions are enabled or NO_REGS.

ws
VSX vector register to hold scalar double values or NO_REGS.

wt
VSX vector register to hold 128 bit integer or NO_REGS.

wu
Altivec register to use for float/32-bit int loads/stores  or NO_REGS.

wv
Altivec register to use for double loads/stores  or NO_REGS.

ww
FP or VSX register to perform float operations under <samp>-mvsx</samp> or NO_REGS.

wx
Floating point register if the STFIWX instruction is enabled or NO_REGS.

wy
FP or VSX register to perform ISA 2.07 float ops or NO_REGS.

wz
Floating point register if the LFIWZX instruction is enabled or NO_REGS.

wD
Int constant that is the element number of the 64-bit scalar in a vector.

wQ
A memory address that will work with the lq and stq
instructions.

h
‘<samp>MQ</samp>’, ‘<samp>CTR</samp>’, or ‘<samp>LINK</samp>’ register

q
‘<samp>MQ</samp>’ register

c
‘<samp>CTR</samp>’ register

l
‘<samp>LINK</samp>’ register

x
‘<samp>CR</samp>’ register (condition register) number 0

y
‘<samp>CR</samp>’ register (condition register)

z
‘<samp>XER[CA]</samp>’ carry bit (part of the XER register)

I
Signed 16-bit constant

J
Unsigned 16-bit constant shifted left 16 bits (use ‘<samp>L</samp>’ instead for
SImode constants)

K
Unsigned 16-bit constant

L
Signed 16-bit constant shifted left 16 bits

M
Constant larger than 31

N
Exact power of 2

O
Zero

P
Constant whose negation is a signed 16-bit constant

G
Floating point constant that can be loaded into a register with one
instruction per word

H
Integer/Floating point constant that can be loaded into a register using
three instructions

m
Memory operand.
Normally, m does not allow addresses that update the base register.
If ‘<samp><</samp>’ or ‘<samp>></samp>’ constraint is also used, they are allowed and
therefore on PowerPC targets in that case it is only safe
to use ‘<samp>m<></samp>’ in an asm statement if that asm statement
accesses the operand exactly once.  The asm statement must also
use ‘<samp>%U<var><opno></var></samp>’ as a placeholder for the “update” flag in the
corresponding load or store instruction.  For example:

               asm ("st%U0 %1,%0" : "=m<>" (mem) : "r" (val));

is correct but:

               asm ("st %1,%0" : "=m<>" (mem) : "r" (val));

is not.

es
A “stable” memory operand; that is, one which does not include any
automodification of the base register.  This used to be useful when
‘<samp>m</samp>’ allowed automodification of the base register, but as those are now only
allowed when ‘<samp><</samp>’ or ‘<samp>></samp>’ is used, ‘<samp>es</samp>’ is basically the same
as ‘<samp>m</samp>’ without ‘<samp><</samp>’ and ‘<samp>></samp>’.

Q
Memory operand that is an offset from a register (it is usually better
to use ‘<samp>m</samp>’ or ‘<samp>es</samp>’ in asm statements)

Z
Memory operand that is an indexed or indirect from a register (it is
usually better to use ‘<samp>m</samp>’ or ‘<samp>es</samp>’ in asm statements)

R
AIX TOC entry

a
Address operand that is an indexed or indirect from a register (‘<samp>p</samp>’ is
preferable for asm statements)

S
Constant suitable as a 64-bit mask operand

T
Constant suitable as a 32-bit mask operand

U
System V Release 4 small data area reference

t
AND masks that can be performed by two rldic{l, r} instructions

W
Vector constant that does not require memory

j
Vector constant that is all zeros.

Intel 386—<samp>config/i386/constraints.md</samp>

R
Legacy register—the eight integer registers available on all
i386 processors (a, b, c, d,
si, di, bp, sp).

q
Any register accessible as <var>r</var>l.  In 32-bit mode, a,
b, c, and d; in 64-bit mode, any integer register.

Q
Any register accessible as <var>r</var>h: a, b,
c, and d.

a
The a register.

b
The b register.

c
The c register.

d
The d register.

S
The si register.

D
The di register.

A
The a and d registers.  This class is used for instructions
that return double word results in the ax:dx register pair.  Single
word values will be allocated either in ax or dx.
For example on i386 the following implements rdtsc:

               unsigned long long rdtsc (void)
               {
                 unsigned long long tick;
                 __asm__ __volatile__("rdtsc":"=A"(tick));
                 return tick;
               }

This is not correct on x86_64 as it would allocate tick in either ax
or dx.  You have to use the following variant instead:

               unsigned long long rdtsc (void)
               {
                 unsigned int tickl, tickh;
                 __asm__ __volatile__("rdtsc":"=a"(tickl),"=d"(tickh));
                 return ((unsigned long long)tickh << 32)|tickl;
               }

f
Any 80387 floating-point (stack) register.

t
Top of 80387 floating-point stack (%st(0)).

u
Second from top of 80387 floating-point stack (%st(1)).

y
Any MMX register.

x
Any SSE register.

Yz
First SSE register (%xmm0).

I
Integer constant in the range 0 ... 31, for 32-bit shifts.

J
Integer constant in the range 0 ... 63, for 64-bit shifts.

K
Signed 8-bit integer constant.

L
0xFF or 0xFFFF, for andsi as a zero-extending move.

M
0, 1, 2, or 3 (shifts for the lea instruction).

N
Unsigned 8-bit integer constant (for in and out
instructions).

G
Standard 80387 floating point constant.

C
Standard SSE floating point constant.

e
32-bit signed integer constant, or a symbolic reference known
to fit that range (for immediate operands in sign-extending x86-64
instructions).

Z
32-bit unsigned integer constant, or a symbolic reference known
to fit that range (for immediate operands in zero-extending x86-64
instructions).

Intel IA-64—<samp>config/ia64/ia64.h</samp>

a
General register r0 to r3 for addl instruction

b
Branch register

c
Predicate register (‘<samp>c</samp>’ as in “conditional”)

d
Application register residing in M-unit

e
Application register residing in I-unit

f
Floating-point register

m
Memory operand.  If used together with ‘<samp><</samp>’ or ‘<samp>></samp>’,
the operand can have postincrement and postdecrement which
require printing with ‘<samp>%Pn</samp>’ on IA-64.

G
Floating-point constant 0.0 or 1.0

I
14-bit signed integer constant

J
22-bit signed integer constant

K
8-bit signed integer constant for logical instructions

L
8-bit adjusted signed integer constant for compare pseudo-ops

M
6-bit unsigned integer constant for shift counts

N
9-bit signed integer constant for load and store postincrements

O
The constant zero

P
0 or −1 for dep instruction

Q
Non-volatile memory for floating-point loads and stores

R
Integer constant in the range 1 to 4 for shladd instruction

S
Memory operand except postincrement and postdecrement.  This is
now roughly the same as ‘<samp>m</samp>’ when not used together with ‘<samp><</samp>’
or ‘<samp>></samp>’.

FRV—<samp>config/frv/frv.h</samp>

a
Register in the class ACC_REGS (acc0 to acc7).

b
Register in the class EVEN_ACC_REGS (acc0 to acc7).

c
Register in the class CC_REGS (fcc0 to fcc3 and
icc0 to icc3).

d
Register in the class GPR_REGS (gr0 to gr63).

e
Register in the class EVEN_REGS (gr0 to gr63).
Odd registers are excluded not in the class but through the use of a machine
mode larger than 4 bytes.

f
Register in the class FPR_REGS (fr0 to fr63).

h
Register in the class FEVEN_REGS (fr0 to fr63).
Odd registers are excluded not in the class but through the use of a machine
mode larger than 4 bytes.

l
Register in the class LR_REG (the lr register).

q
Register in the class QUAD_REGS (gr2 to gr63).
Register numbers not divisible by 4 are excluded not in the class but through
the use of a machine mode larger than 8 bytes.

t
Register in the class ICC_REGS (icc0 to icc3).

u
Register in the class FCC_REGS (fcc0 to fcc3).

v
Register in the class ICR_REGS (cc4 to cc7).

w
Register in the class FCR_REGS (cc0 to cc3).

x
Register in the class QUAD_FPR_REGS (fr0 to fr63).
Register numbers not divisible by 4 are excluded not in the class but through
the use of a machine mode larger than 8 bytes.

z
Register in the class SPR_REGS (lcr and lr).

A
Register in the class QUAD_ACC_REGS (acc0 to acc7).

B
Register in the class ACCG_REGS (accg0 to accg7).

C
Register in the class CR_REGS (cc0 to cc7).

G
Floating point constant zero

I
6-bit signed integer constant

J
10-bit signed integer constant

L
16-bit signed integer constant

M
16-bit unsigned integer constant

N
12-bit signed integer constant that is negative—i.e. in the
range of −2048 to −1

O
Constant zero

P
12-bit signed integer constant that is greater than zero—i.e. in the
range of 1 to 2047.

Blackfin family—<samp>config/bfin/constraints.md</samp>

a
P register

d
D register

z
A call clobbered P register.

q<var>n</var>
A single register.  If <var>n</var> is in the range 0 to 7, the corresponding D
register.  If it is A, then the register P0.

D
Even-numbered D register

W
Odd-numbered D register

e
Accumulator register.

A
Even-numbered accumulator register.

B
Odd-numbered accumulator register.

b
I register

v
B register

f
M register

c
Registers used for circular buffering, i.e. I, B, or L registers.

C
The CC register.

t
LT0 or LT1.

k
LC0 or LC1.

u
LB0 or LB1.

x
Any D, P, B, M, I or L register.

y
Additional registers typically used only in prologues and epilogues: RETS,
RETN, RETI, RETX, RETE, ASTAT, SEQSTAT and USP.

w
Any register except accumulators or CC.

Ksh
Signed 16 bit integer (in the range −32768 to 32767)

Kuh
Unsigned 16 bit integer (in the range 0 to 65535)

Ks7
Signed 7 bit integer (in the range −64 to 63)

Ku7
Unsigned 7 bit integer (in the range 0 to 127)

Ku5
Unsigned 5 bit integer (in the range 0 to 31)

Ks4
Signed 4 bit integer (in the range −8 to 7)

Ks3
Signed 3 bit integer (in the range −3 to 4)

Ku3
Unsigned 3 bit integer (in the range 0 to 7)

P<var>n</var>
Constant <var>n</var>, where <var>n</var> is a single-digit constant in the range 0 to 4.

PA
An integer equal to one of the MACFLAG_XXX constants that is suitable for
use with either accumulator.

PB
An integer equal to one of the MACFLAG_XXX constants that is suitable for
use only with accumulator A1.

M1
Constant 255.

M2
Constant 65535.

J
An integer constant with exactly a single bit set.

L
An integer constant with all bits set except exactly one.

H

Q
Any SYMBOL_REF.

M32C—<samp>config/m32c/m32c.c</samp>

Rsp
Rfb
Rsb
‘<samp>$sp</samp>’, ‘<samp>$fb</samp>’, ‘<samp>$sb</samp>’.

Rcr
Any control register, when they're 16 bits wide (nothing if control
registers are 24 bits wide)

Rcl
Any control register, when they're 24 bits wide.

R0w
R1w
R2w
R3w
$r0, $r1, $r2, $r3.

R02
$r0 or $r2, or $r2r0 for 32 bit values.

R13
$r1 or $r3, or $r3r1 for 32 bit values.

Rdi
A register that can hold a 64 bit value.

Rhl
$r0 or $r1 (registers with addressable high/low bytes)

R23
$r2 or $r3

Raa
Address registers

Raw
Address registers when they're 16 bits wide.

Ral
Address registers when they're 24 bits wide.

Rqi
Registers that can hold QI values.

Rad
Registers that can be used with displacements ($a0, $a1, $sb).

Rsi
Registers that can hold 32 bit values.

Rhi
Registers that can hold 16 bit values.

Rhc
Registers chat can hold 16 bit values, including all control
registers.

Rra
$r0 through R1, plus $a0 and $a1.

Rfl
The flags register.

Rmm
The memory-based pseudo-registers $mem0 through $mem15.

Rpi
Registers that can hold pointers (16 bit registers for r8c, m16c; 24
bit registers for m32cm, m32c).

Rpa
Matches multiple registers in a PARALLEL to form a larger register.
Used to match function return values.

Is3
−8 ... 7

IS1
−128 ... 127

IS2
−32768 ... 32767

IU2
0 ... 65535

In4
−8 ... −1 or 1 ... 8

In5
−16 ... −1 or 1 ... 16

In6
−32 ... −1 or 1 ... 32

IM2
−65536 ... −1

Ilb
An 8 bit value with exactly one bit set.

Ilw
A 16 bit value with exactly one bit set.

Sd
The common src/dest memory addressing modes.

Sa
Memory addressed using $a0 or $a1.

Si
Memory addressed with immediate addresses.

Ss
Memory addressed using the stack pointer ($sp).

Sf
Memory addressed using the frame base register ($fb).

Ss
Memory addressed using the small base register ($sb).

S1
$r1h

MeP—<samp>config/mep/constraints.md</samp>

a
The $sp register.

b
The $tp register.

c
Any control register.

d
Either the $hi or the $lo register.

em
Coprocessor registers that can be directly loaded ($c0-$c15).

ex
Coprocessor registers that can be moved to each other.

er
Coprocessor registers that can be moved to core registers.

h
The $hi register.

j
The $rpc register.

l
The $lo register.

t
Registers which can be used in $tp-relative addressing.

v
The $gp register.

x
The coprocessor registers.

y
The coprocessor control registers.

z
The $0 register.

A
User-defined register set A.

B
User-defined register set B.

C
User-defined register set C.

D
User-defined register set D.

I
Offsets for $gp-rel addressing.

J
Constants that can be used directly with boolean insns.

K
Constants that can be moved directly to registers.

L
Small constants that can be added to registers.

M
Long shift counts.

N
Small constants that can be compared to registers.

O
Constants that can be loaded into the top half of registers.

S
Signed 8-bit immediates.

T
Symbols encoded for $tp-rel or $gp-rel addressing.

U
Non-constant addresses for loading/saving coprocessor registers.

W
The top half of a symbol's value.

Y
A register indirect address without offset.

Z
Symbolic references to the control bus.

MicroBlaze—<samp>config/microblaze/constraints.md</samp>

d
A general register (r0 to r31).

z
A status register (rmsr, $fcc1 to $fcc7).

MIPS—<samp>config/mips/constraints.md</samp>

d
An address register.  This is equivalent to r unless
generating MIPS16 code.

f
A floating-point register (if available).

h
Formerly the hi register.  This constraint is no longer supported.

l
The lo register.  Use this register to store values that are
no bigger than a word.

x
The concatenated hi and lo registers.  Use this register
to store doubleword values.

c
A register suitable for use in an indirect jump.  This will always be
$25 for <samp>-mabicalls</samp>.

v
Register $3.  Do not use this constraint in new code;
it is retained only for compatibility with glibc.

y
Equivalent to r; retained for backwards compatibility.

z
A floating-point condition code register.

I
A signed 16-bit constant (for arithmetic instructions).

J
Integer zero.

K
An unsigned 16-bit constant (for logic instructions).

L
A signed 32-bit constant in which the lower 16 bits are zero.
Such constants can be loaded using lui.

M
A constant that cannot be loaded using lui, addiu
or ori.

N
A constant in the range −65535 to −1 (inclusive).

O
A signed 15-bit constant.

P
A constant in the range 1 to 65535 (inclusive).

G
Floating-point zero.

R
An address that can be used in a non-macro load or store.

ZC
When compiling microMIPS code, this constraint matches a memory operand
whose address is formed from a base register and a 12-bit offset.  These
operands can be used for microMIPS instructions such as ll and
sc.  When not compiling for microMIPS code, ZC is
equivalent to R.

ZD
When compiling microMIPS code, this constraint matches an address operand
that is formed from a base register and a 12-bit offset.  These operands
can be used for microMIPS instructions such as prefetch.  When
not compiling for microMIPS code, ZD is equivalent to p.

Motorola 680x0—<samp>config/m68k/constraints.md</samp>

a
Address register

d
Data register

f
68881 floating-point register, if available

I
Integer in the range 1 to 8

J
16-bit signed number

K
Signed number whose magnitude is greater than 0x80

L
Integer in the range −8 to −1

M
Signed number whose magnitude is greater than 0x100

N
Range 24 to 31, rotatert:SI 8 to 1 expressed as rotate

O
16 (for rotate using swap)

P
Range 8 to 15, rotatert:HI 8 to 1 expressed as rotate

R
Numbers that mov3q can handle

G
Floating point constant that is not a 68881 constant

S
Operands that satisfy 'm' when -mpcrel is in effect

T
Operands that satisfy 's' when -mpcrel is not in effect

Q
Address register indirect addressing mode

U
Register offset addressing

W
const_call_operand

Cs
symbol_ref or const

Ci
const_int

C0
const_int 0

Cj
Range of signed numbers that don't fit in 16 bits

Cmvq
Integers valid for mvq

Capsw
Integers valid for a moveq followed by a swap

Cmvz
Integers valid for mvz

Cmvs
Integers valid for mvs

Ap
push_operand

Ac
Non-register operands allowed in clr

Moxie—<samp>config/moxie/constraints.md</samp>

A
An absolute address

B
An offset address

W
A register indirect memory operand

I
A constant in the range of 0 to 255.

N
A constant in the range of 0 to −255.

MSP430–<samp>config/msp430/constraints.md</samp>

R12
Register R12.

R13
Register R13.

K
Integer constant 1.

L
Integer constant -1^20..1^19.

M
Integer constant 1-4.

Ya
Memory references which do not require an extended MOVX instruction.

Yl
Memory reference, labels only.

Ys
Memory reference, stack only.

NDS32—<samp>config/nds32/constraints.md</samp>

w
LOW register class $r0 to $r7 constraint for V3/V3M ISA.

l
LOW register class $r0 to $r7.

d
MIDDLE register class $r0 to $r11, $r16 to $r19.

h
HIGH register class $r12 to $r14, $r20 to $r31.

t
Temporary assist register $ta (i.e. $r15).

k
Stack register $sp.

Iu03
Unsigned immediate 3-bit value.

In03
Negative immediate 3-bit value in the range of −7–0.

Iu04
Unsigned immediate 4-bit value.

Is05
Signed immediate 5-bit value.

Iu05
Unsigned immediate 5-bit value.

In05
Negative immediate 5-bit value in the range of −31–0.

Ip05
Unsigned immediate 5-bit value for movpi45 instruction with range 16–47.

Iu06
Unsigned immediate 6-bit value constraint for addri36.sp instruction.

Iu08
Unsigned immediate 8-bit value.

Iu09
Unsigned immediate 9-bit value.

Is10
Signed immediate 10-bit value.

Is11
Signed immediate 11-bit value.

Is15
Signed immediate 15-bit value.

Iu15
Unsigned immediate 15-bit value.

Ic15
A constant which is not in the range of imm15u but ok for bclr instruction.

Ie15
A constant which is not in the range of imm15u but ok for bset instruction.

It15
A constant which is not in the range of imm15u but ok for btgl instruction.

Ii15
A constant whose compliment value is in the range of imm15u
and ok for bitci instruction.

Is16
Signed immediate 16-bit value.

Is17
Signed immediate 17-bit value.

Is19
Signed immediate 19-bit value.

Is20
Signed immediate 20-bit value.

Ihig
The immediate value that can be simply set high 20-bit.

Izeb
The immediate value 0xff.

Izeh
The immediate value 0xffff.

Ixls
The immediate value 0x01.

Ix11
The immediate value 0x7ff.

Ibms
The immediate value with power of 2.

Ifex
The immediate value with power of 2 minus 1.

U33
Memory constraint for 333 format.

U45
Memory constraint for 45 format.

U37
Memory constraint for 37 format.

Nios II family—<samp>config/nios2/constraints.md</samp>

I
Integer that is valid as an immediate operand in an
instruction taking a signed 16-bit number. Range
−32768 to 32767.

J
Integer that is valid as an immediate operand in an
instruction taking an unsigned 16-bit number. Range
0 to 65535.

K
Integer that is valid as an immediate operand in an
instruction taking only the upper 16-bits of a
32-bit number. Range 32-bit numbers with the lower
16-bits being 0.

L
Integer that is valid as an immediate operand for a
shift instruction. Range 0 to 31.

M
Integer that is valid as an immediate operand for
only the value 0. Can be used in conjunction with
the format modifier z to use r0
instead of 0 in the assembly output.

N
Integer that is valid as an immediate operand for
a custom instruction opcode. Range 0 to 255.

S
Matches immediates which are addresses in the small
data section and therefore can be added to gp
as a 16-bit immediate to re-create their 32-bit value.

PDP-11—<samp>config/pdp11/constraints.md</samp>

a
Floating point registers AC0 through AC3.  These can be loaded from/to
memory with a single instruction.

d
Odd numbered general registers (R1, R3, R5).  These are used for
16-bit multiply operations.

f
Any of the floating point registers (AC0 through AC5).

G
Floating point constant 0.

I
An integer constant that fits in 16 bits.

J
An integer constant whose low order 16 bits are zero.

K
An integer constant that does not meet the constraints for codes
‘<samp>I</samp>’ or ‘<samp>J</samp>’.

L
The integer constant 1.

M
The integer constant −1.

N
The integer constant 0.

O
Integer constants −4 through −1 and 1 through 4; shifts by these
amounts are handled as multiple single-bit shifts rather than a single
variable-length shift.

Q
A memory reference which requires an additional word (address or
offset) after the opcode.

R
A memory reference that is encoded within the opcode.

RL78—<samp>config/rl78/constraints.md</samp>

Int3
An integer constant in the range 1 ... 7.

Int8
An integer constant in the range 0 ... 255.

J
An integer constant in the range −255 ... 0

K
The integer constant 1.

L
The integer constant -1.

M
The integer constant 0.

N
The integer constant 2.

O
The integer constant -2.

P
An integer constant in the range 1 ... 15.

Qbi
The built-in compare types–eq, ne, gtu, ltu, geu, and leu.

Qsc
The synthetic compare types–gt, lt, ge, and le.

Wab
A memory reference with an absolute address.

Wbc
A memory reference using BC as a base register, with an optional offset.

Wca
A memory reference using AX, BC, DE, or HL for the address, for calls.

Wcv
A memory reference using any 16-bit register pair for the address, for calls.

Wd2
A memory reference using DE as a base register, with an optional offset.

Wde
A memory reference using DE as a base register, without any offset.

Wfr
Any memory reference to an address in the far address space.

Wh1
A memory reference using HL as a base register, with an optional one-byte offset.

Whb
A memory reference using HL as a base register, with B or C as the index register.

Whl
A memory reference using HL as a base register, without any offset.

Ws1
A memory reference using SP as a base register, with an optional one-byte offset.

Y
Any memory reference to an address in the near address space.

A
The AX register.

B
The BC register.

D
The DE register.

R
A through L registers.

S
The SP register.

T
The HL register.

Z08W
The 16-bit R8 register.

Z10W
The 16-bit R10 register.

Zint
The registers reserved for interrupts (R24 to R31).

a
The A register.

b
The B register.

c
The C register.

d
The D register.

e
The E register.

h
The H register.

l
The L register.

v
The virtual registers.

w
The PSW register.

x
The X register.

RX—<samp>config/rx/constraints.md</samp>

Q
An address which does not involve register indirect addressing or
pre/post increment/decrement addressing.

Symbol
A symbol reference.

Int08
A constant in the range −256 to 255, inclusive.

Sint08
A constant in the range −128 to 127, inclusive.

Sint16
A constant in the range −32768 to 32767, inclusive.

Sint24
A constant in the range −8388608 to 8388607, inclusive.

Uint04
A constant in the range 0 to 15, inclusive.

SPARC—<samp>config/sparc/sparc.h</samp>

f
Floating-point register on the SPARC-V8 architecture and
lower floating-point register on the SPARC-V9 architecture.

e
Floating-point register.  It is equivalent to ‘<samp>f</samp>’ on the
SPARC-V8 architecture and contains both lower and upper
floating-point registers on the SPARC-V9 architecture.

c
Floating-point condition code register.

d
Lower floating-point register.  It is only valid on the SPARC-V9
architecture when the Visual Instruction Set is available.

b
Floating-point register.  It is only valid on the SPARC-V9 architecture
when the Visual Instruction Set is available.

h
64-bit global or out register for the SPARC-V8+ architecture.

C
The constant all-ones, for floating-point.

A
Signed 5-bit constant

D
A vector constant

I
Signed 13-bit constant

J
Zero

K
32-bit constant with the low 12 bits clear (a constant that can be
loaded with the sethi instruction)

L
A constant in the range supported by movcc instructions (11-bit
signed immediate)

M
A constant in the range supported by movrcc instructions (10-bit
signed immediate)

N
Same as ‘<samp>K</samp>’, except that it verifies that bits that are not in the
lower 32-bit range are all zero.  Must be used instead of ‘<samp>K</samp>’ for
modes wider than SImode

O
The constant 4096

G
Floating-point zero

H
Signed 13-bit constant, sign-extended to 32 or 64 bits

P
The constant -1

Q
Floating-point constant whose integral representation can
be moved into an integer register using a single sethi
instruction

R
Floating-point constant whose integral representation can
be moved into an integer register using a single mov
instruction

S
Floating-point constant whose integral representation can
be moved into an integer register using a high/lo_sum
instruction sequence

T
Memory address aligned to an 8-byte boundary

U
Even register

W
Memory address for ‘<samp>e</samp>’ constraint registers

w
Memory address with only a base register

Y
Vector zero

SPU—<samp>config/spu/spu.h</samp>

a
An immediate which can be loaded with the il/ila/ilh/ilhu instructions.  const_int is treated as a 64 bit value.

c
An immediate for and/xor/or instructions.  const_int is treated as a 64 bit value.

d
An immediate for the iohl instruction.  const_int is treated as a 64 bit value.

f
An immediate which can be loaded with fsmbi.

A
An immediate which can be loaded with the il/ila/ilh/ilhu instructions.  const_int is treated as a 32 bit value.

B
An immediate for most arithmetic instructions.  const_int is treated as a 32 bit value.

C
An immediate for and/xor/or instructions.  const_int is treated as a 32 bit value.

D
An immediate for the iohl instruction.  const_int is treated as a 32 bit value.

I
A constant in the range [−64, 63] for shift/rotate instructions.

J
An unsigned 7-bit constant for conversion/nop/channel instructions.

K
A signed 10-bit constant for most arithmetic instructions.

M
A signed 16 bit immediate for stop.

N
An unsigned 16-bit constant for iohl and fsmbi.

O
An unsigned 7-bit constant whose 3 least significant bits are 0.

P
An unsigned 3-bit constant for 16-byte rotates and shifts

R
Call operand, reg, for indirect calls

S
Call operand, symbol, for relative calls.

T
Call operand, const_int, for absolute calls.

U
An immediate which can be loaded with the il/ila/ilh/ilhu instructions.  const_int is sign extended to 128 bit.

W
An immediate for shift and rotate instructions.  const_int is treated as a 32 bit value.

Y
An immediate for and/xor/or instructions.  const_int is sign extended as a 128 bit.

Z
An immediate for the iohl instruction.  const_int is sign extended to 128 bit.

S/390 and zSeries—<samp>config/s390/s390.h</samp>

a
Address register (general purpose register except r0)

c
Condition code register

d
Data register (arbitrary general purpose register)

f
Floating-point register

I
Unsigned 8-bit constant (0–255)

J
Unsigned 12-bit constant (0–4095)

K
Signed 16-bit constant (−32768–32767)

L
Value appropriate as displacement.

(0..4095)
for short displacement

(−524288..524287)
for long displacement

M
Constant integer with a value of 0x7fffffff.

N
Multiple letter constraint followed by 4 parameter letters.

0..9:
number of the part counting from most to least significant

H,Q:
mode of the part

D,S,H:
mode of the containing operand

0,F:
value of the other parts (F—all bits set)

          The constraint matches if the specified part of a constant
has a value different from its other parts.

Q
Memory reference without index register and with short displacement.

R
Memory reference with index register and short displacement.

S
Memory reference without index register but with long displacement.

T
Memory reference with index register and long displacement.

U
Pointer with short displacement.

W
Pointer with long displacement.

Y
Shift count operand.

Score family—<samp>config/score/score.h</samp>

d
Registers from r0 to r32.

e
Registers from r0 to r16.

t
r8—r11 or r22—r27 registers.

h
hi register.

l
lo register.

x
hi + lo register.

q
cnt register.

y
lcb register.

z
scb register.

a
cnt + lcb + scb register.

c
cr0—cr15 register.

b
cp1 registers.

f
cp2 registers.

i
cp3 registers.

j
cp1 + cp2 + cp3 registers.

I
High 16-bit constant (32-bit constant with 16 LSBs zero).

J
Unsigned 5 bit integer (in the range 0 to 31).

K
Unsigned 16 bit integer (in the range 0 to 65535).

L
Signed 16 bit integer (in the range −32768 to 32767).

M
Unsigned 14 bit integer (in the range 0 to 16383).

N
Signed 14 bit integer (in the range −8192 to 8191).

Z
Any SYMBOL_REF.

Xstormy16—<samp>config/stormy16/stormy16.h</samp>

a
Register r0.

b
Register r1.

c
Register r2.

d
Register r8.

e
Registers r0 through r7.

t
Registers r0 and r1.

y
The carry register.

z
Registers r8 and r9.

I
A constant between 0 and 3 inclusive.

J
A constant that has exactly one bit set.

K
A constant that has exactly one bit clear.

L
A constant between 0 and 255 inclusive.

M
A constant between −255 and 0 inclusive.

N
A constant between −3 and 0 inclusive.

O
A constant between 1 and 4 inclusive.

P
A constant between −4 and −1 inclusive.

Q
A memory reference that is a stack push.

R
A memory reference that is a stack pop.

S
A memory reference that refers to a constant address of known value.

T
The register indicated by Rx (not implemented yet).

U
A constant that is not between 2 and 15 inclusive.

Z
The constant 0.

TI C6X family—<samp>config/c6x/constraints.md</samp>

a
Register file A (A0–A31).

b
Register file B (B0–B31).

A
Predicate registers in register file A (A0–A2 on C64X and
higher, A1 and A2 otherwise).

B
Predicate registers in register file B (B0–B2).

C
A call-used register in register file B (B0–B9, B16–B31).

Da
Register file A, excluding predicate registers (A3–A31,
plus A0 if not C64X or higher).

Db
Register file B, excluding predicate registers (B3–B31).

Iu4
Integer constant in the range 0 ... 15.

Iu5
Integer constant in the range 0 ... 31.

In5
Integer constant in the range −31 ... 0.

Is5
Integer constant in the range −16 ... 15.

I5x
Integer constant that can be the operand of an ADDA or a SUBA insn.

IuB
Integer constant in the range 0 ... 65535.

IsB
Integer constant in the range −32768 ... 32767.

IsC
Integer constant in the range -2^20 ... 2^20 - 1.

Jc
Integer constant that is a valid mask for the clr instruction.

Js
Integer constant that is a valid mask for the set instruction.

Q
Memory location with A base register.

R
Memory location with B base register.

Z
Register B14 (aka DP).

TILE-Gx—<samp>config/tilegx/constraints.md</samp>

R00
R01
R02
R03
R04
R05
R06
R07
R08
R09
R10
Each of these represents a register constraint for an individual
register, from r0 to r10.

I
Signed 8-bit integer constant.

J
Signed 16-bit integer constant.

K
Unsigned 16-bit integer constant.

L
Integer constant that fits in one signed byte when incremented by one
(−129 ... 126).

m
Memory operand.  If used together with ‘<samp><</samp>’ or ‘<samp>></samp>’, the
operand can have postincrement which requires printing with ‘<samp>%In</samp>’
and ‘<samp>%in</samp>’ on TILE-Gx.  For example:

               asm ("st_add %I0,%1,%i0" : "=m<>" (*mem) : "r" (val));

M
A bit mask suitable for the BFINS instruction.

N
Integer constant that is a byte tiled out eight times.

O
The integer zero constant.

P
Integer constant that is a sign-extended byte tiled out as four shorts.

Q
Integer constant that fits in one signed byte when incremented
(−129 ... 126), but excluding -1.

S
Integer constant that has all 1 bits consecutive and starting at bit 0.

T
A 16-bit fragment of a got, tls, or pc-relative reference.

U
Memory operand except postincrement.  This is roughly the same as
‘<samp>m</samp>’ when not used together with ‘<samp><</samp>’ or ‘<samp>></samp>’.

W
An 8-element vector constant with identical elements.

Y
A 4-element vector constant with identical elements.

Z0
The integer constant 0xffffffff.

Z1
The integer constant 0xffffffff00000000.

TILEPro—<samp>config/tilepro/constraints.md</samp>

R00
R01
R02
R03
R04
R05
R06
R07
R08
R09
R10
Each of these represents a register constraint for an individual
register, from r0 to r10.

I
Signed 8-bit integer constant.

J
Signed 16-bit integer constant.

K
Nonzero integer constant with low 16 bits zero.

L
Integer constant that fits in one signed byte when incremented by one
(−129 ... 126).

m
Memory operand.  If used together with ‘<samp><</samp>’ or ‘<samp>></samp>’, the
operand can have postincrement which requires printing with ‘<samp>%In</samp>’
and ‘<samp>%in</samp>’ on TILEPro.  For example:

               asm ("swadd %I0,%1,%i0" : "=m<>" (mem) : "r" (val));

M
A bit mask suitable for the MM instruction.

N
Integer constant that is a byte tiled out four times.

O
The integer zero constant.

P
Integer constant that is a sign-extended byte tiled out as two shorts.

Q
Integer constant that fits in one signed byte when incremented
(−129 ... 126), but excluding -1.

T
A symbolic operand, or a 16-bit fragment of a got, tls, or pc-relative
reference.

U
Memory operand except postincrement.  This is roughly the same as
‘<samp>m</samp>’ when not used together with ‘<samp><</samp>’ or ‘<samp>></samp>’.

W
A 4-element vector constant with identical elements.

Y
A 2-element vector constant with identical elements.

Xtensa—<samp>config/xtensa/constraints.md</samp>

a
General-purpose 32-bit register

b
One-bit boolean register

A
MAC16 40-bit accumulator register

I
Signed 12-bit integer constant, for use in MOVI instructions

J
Signed 8-bit integer constant, for use in ADDI instructions

K
Integer constant valid for BccI instructions

L
Unsigned constant valid for BccUI instructions


text:
IRIS Demo <?if ($_GET[version]=="snapshot") echo "(Snapshot)";?>

Enter a datalog program in the textarea below, choose an evaluation
method and press "Submit Query" to test IRIS. For help on the IRIS datalog syntax,
 see here. Please note that we placed a 30 seconds timeout per
 query to avoid overloading our server.

Note:
<?
if ($_GET[version]!="snapshot")
	echo " This Demo uses the latest stable IRIS release.
		You also can run your queries
		against the latest nightly build (not guaranteed to work!).";
else
	echo " This Demo uses the daily nightly build.
		To return to stable version click here.";
?>

<form method="post" target="resultframe" action="/demoapp/?<?echo $_SERVER[QUERY_STRING]?>">
	<textarea style="border:solid black 1px; background-color:#eee; width:100%; height:200px" name="program">man('homer').
woman('marge').
hasSon('homer','bart').
isMale(?x) :- man(?x).
isFemale(?x) :- woman(?x).
isMale(?y) :- hasSon(?x,?y).

?-isMale(?x).</textarea>

evaluation method:
	<select name="method">
	 	<option value="1">standard</option>
		<option value="2">well-founded</option>
	</select>
	<input type="submit" value="Submit Query">

</form>


text:
        规则

            <select class="form-control" id="rule-judge-type">
                <option value="0">单一条件匹配</option>
                <option value="1">and匹配</option>
                <option value="2">or匹配</option>
                <option value="3">复杂匹配</option>
            </select>

             <input type="text" class="form-control" id="rule-judge-expression" placeholder="规则表达式,示例: (v[1] or v[2]) and v[3]">

            <select class="form-control" name="rule-judge-condition-type">
                <option value="Random">Random</option>
                <option value="URI">URI</option>
                <option value="Header">Header</option>
                <option value="Query">Query</option>
                <option value="Cookie">Cookie</option>
                <option value="PostParams">PostParams</option>
                <option value="IP">IP</option>
                <option value="UserAgent">UserAgent</option>

                <option value="Host">Host</option>
                <option value="Referer">Referer</option>
                <option value="Method">HttpMethod</option>
            </select>

            <input type="text" class="form-control" name="rule-judge-condition-name" placeholder="name">

            <select class="form-control"  name="rule-judge-condition-operator">
                <option value="match">Match</option>
                <option value="not_match">Not Match</option>
                <option value="=">=</option>
                <option value="!=">!=</option>
                <option value=">">></option>
                <option value=">=">≥</option>
                <option value="<"><</option>
                <option value="<=">≤</option>
                <option value="%">%</option>
            </select>

            <input type="text" class="form-control" name="rule-judge-condition-value" placeholder="value">


text:
using System;
using System.Collections.Generic;
using System.Linq;
using System.Text;
using System.Threading.Tasks;

namespace Steam.Models.SteamStore
{
    public class StoreScreenshotModel
    {
        public uint Id { get; set; }

        public string PathThumbnail { get; set; }

        public string PathFull { get; set; }
    }
}


text:
package com.arkcraft.module.blocks.common.general;

import net.minecraft.block.Block;
import net.minecraft.block.material.Material;

/**
 * @author Vastatio
 */
/* This is the core class for all generic blocks */
public class BlockARKBase extends Block
{

    public BlockARKBase(Material m, float hardness)
    {
        super(m);
        this.setHardness(hardness);
    }
}


text:
import pytest
from assertpy import assert_that

from klimalogger.calc import TemperatureCalc

class TestCalcTemperature:

    @pytest.fixture
    def uut(self):
        return TemperatureCalc()

    @pytest.mark.parametrize("temperature,relative_humidity,expected", [
        (25, 10, -8.74),
        (50, 90, 47.27)
    ])
    def test_dew_point(self, uut, temperature, relative_humidity, expected):
        result = uut.dew_point(temperature, relative_humidity)

        assert_that(result).is_close_to(expected, 0.01)


text:
package main

import (
	"errors"
	"math"
)

var DivisionByZeroError = errors.New("Divisão por zero!")
var UnknownOperator = errors.New("Operador desconhecido!")
var EmptySetError = errors.New("Conjunto vazio!")

func Negue(v bool) bool {
	return v
}

func DigaOla(v string) string {
	return ""
}

func ListaNumerosPares(v int) []int {
	return []int{1}
}

func ListaMultiplos(v1 int, v2 int) []int {
	return []int{1, 2, 3, 4, 5}
}

func Soma(v []int) int {
	return math.MaxInt8
}

func Subtracao(v []int) int {
	return math.MaxInt8
}

func Multiplicacao(v []int) int {
	return math.MaxInt8
}

func Divisao(v []int) (int, error) {
	return math.MaxInt8, nil
}

func Operacao(o rune, v []int) (int, error) {
	return math.MaxInt8, nil
}

func Maior(v []int) (int, error) {
	return math.MaxInt8, nil
}

func Intersecao(s1 []int, s2 []int) []int {
	return []int{0, 0, 0, 0}
}


text:
require 'fileutils'
require 'zlib'

class GitDB::Commands::ReceivePack

  def execute(args)
    repository = args.first
    raise ArgumentError, "repository required" unless repository

    database = GitDB.database(repository)

    needs_capabilities = true
    database.get_refs.each do |ref, sha|
      GitDB.log("ISAERF #{ref} #{sha}")
      write_ref(ref, sha, needs_capabilities)
      needs_capabilities = false
    end
    write_ref("capabilities^{}", GitDB.null_sha1) if needs_capabilities
    io.write_eof

    refs = []
    new_shas = []

    while (data = io.read_command)
      old_sha, new_sha, ref = data.split(' ')
      ref, report = ref.split(0.chr)

      refs << ref
      new_shas << new_sha

      if new_sha == GitDB.null_sha1
        database.delete_ref(ref)
      else
        database.write_ref(ref, new_sha)
      end
    end

    unless new_shas.reject { |sha| sha == GitDB.null_sha1 }.length.zero?
      while (entries = io.read_pack)

        # bulk in 50 at a time
        while (page = entries.shift(50)).length > 0
          database.write_objects(page)
        end
      end
    end

    io.write_command("unpack ok\n")
    refs.each do |ref|
      io.write_command("ok #{ref}\n")
    end
    io.write_eof
  end

private

  def capabilities
    " report-status delete-refs ofs-delta "
  end

  def io
    @io ||= GitDB::Protocol.new
  end

  def write_ref(ref, sha, needs_capabilities=true)
    if needs_capabilities
      header = "%s %s\000%s\n" % [ sha, ref, capabilities ]
      io.write_command(header)
    else
      header = "%s %s\n" % [ sha, ref ]
      io.write_command(header)
    end
  end

end

GitDB::Commands.register 'receive-pack', GitDB::Commands::ReceivePack


text:
package com.google.common.collect;

import com.google.common.annotations.GwtIncompatible;
import com.google.common.annotations.VisibleForTesting;
import java.util.Arrays;
import org.checkerframework.checker.nullness.compatqual.MonotonicNonNullDecl;

/**
 * CompactLinkedHashMap is an implementation of a Map with insertion or LRU iteration order,
 * maintained with a doubly linked list through the entries. All optional operations (put and
 * remove) are supported. Null keys and values are supported.
 *
 *
{@code containsKey(k)}, {@code put(k, v)} and {@code remove(k)} are all (expected and
 * amortized) constant time operations. Expected in the hashtable sense (depends on the hash
 * function doing a good job of distributing the elements to the buckets to a distribution not far
 * from uniform), and amortized since some operations can trigger a hash table resize.
 *
 *
As compared with {@link java.util.LinkedHashMap}, this structure places significantly reduced
 * load on the garbage collector by only using a constant number of internal objects.
 *
 *
This class should not be assumed to be universally superior to {@code
 * java.util.LinkedHashMap}. Generally speaking, this class reduces object allocation and memory
 * consumption at the price of moderately increased constant factors of CPU. Only use this class
 * when there is a specific reason to prioritize memory over CPU.
 *
 * @author Louis Wasserman
 */
@GwtIncompatible // not worth using in GWT for now
class CompactLinkedHashMap<K, V> extends CompactHashMap<K, V> {
  // TODO(lowasser): implement removeEldestEntry so this can be used as a drop-in replacement

  /** Creates an empty {@code CompactLinkedHashMap} instance. */
  public static <K, V> CompactLinkedHashMap<K, V> create() {
    return new CompactLinkedHashMap<>();
  }

  /**
   * Creates a {@code CompactLinkedHashMap} instance, with a high enough "initial capacity" that it
   * should hold {@code expectedSize} elements without growth.
   *
   * @param expectedSize the number of elements you expect to add to the returned set
   * @return a new, empty {@code CompactLinkedHashMap} with enough capacity to hold {@code
   *     expectedSize} elements without resizing
   * @throws IllegalArgumentException if {@code expectedSize} is negative
   */
  public static <K, V> CompactLinkedHashMap<K, V> createWithExpectedSize(int expectedSize) {
    return new CompactLinkedHashMap<>(expectedSize);
  }

  private static final int ENDPOINT = -2;

  /**
   * Contains the link pointers corresponding with the entries, in the range of [0, size()). The
   * high 32 bits of each long is the "prev" pointer, whereas the low 32 bits is the "succ" pointer
   * (pointing to the next entry in the linked list). The pointers in [size(), entries.length) are
   * all "null" (UNSET).
   *
   *
A node with "prev" pointer equal to {@code ENDPOINT} is the first node in the linked list,
   * and a node with "next" pointer equal to {@code ENDPOINT} is the last node.
   */
  @VisibleForTesting @MonotonicNonNullDecl transient long[] links;

  /** Pointer to the first node in the linked list, or {@code ENDPOINT} if there are no entries. */
  private transient int firstEntry;

  /** Pointer to the last node in the linked list, or {@code ENDPOINT} if there are no entries. */
  private transient int lastEntry;

  private final boolean accessOrder;

  CompactLinkedHashMap() {
    this(DEFAULT_SIZE);
  }

  CompactLinkedHashMap(int expectedSize) {
    this(expectedSize, DEFAULT_LOAD_FACTOR, false);
  }

  CompactLinkedHashMap(int expectedSize, float loadFactor, boolean accessOrder) {
    super(expectedSize, loadFactor);
    this.accessOrder = accessOrder;
  }

  @Override
  void init(int expectedSize, float loadFactor) {
    super.init(expectedSize, loadFactor);
    firstEntry = ENDPOINT;
    lastEntry = ENDPOINT;
  }

  @Override
  void allocArrays() {
    super.allocArrays();
    int expectedSize = keys.length; // allocated size may be different than initial capacity
    links = new long[expectedSize];
    Arrays.fill(links, UNSET);
  }

  private int getPredecessor(int entry) {
    return (int) (links[entry] >>> 32);
  }

  @Override
  int getSuccessor(int entry) {
    return (int) links[entry];
  }

  private void setSuccessor(int entry, int succ) {
    long succMask = (~0L) >>> 32;
    links[entry] = (links[entry] & ~succMask) | (succ & succMask);
  }

  private void setPredecessor(int entry, int pred) {
    long predMask = ~0L << 32;
    links[entry] = (links[entry] & ~predMask) | ((long) pred << 32);
  }

  private void setSucceeds(int pred, int succ) {
    if (pred == ENDPOINT) {
      firstEntry = succ;
    } else {
      setSuccessor(pred, succ);
    }
    if (succ == ENDPOINT) {
      lastEntry = pred;
    } else {
      setPredecessor(succ, pred);
    }
  }

  @Override
  void insertEntry(int entryIndex, K key, V value, int hash) {
    super.insertEntry(entryIndex, key, value, hash);
    setSucceeds(lastEntry, entryIndex);
    setSucceeds(entryIndex, ENDPOINT);
  }

  @Override
  void accessEntry(int index) {
    if (accessOrder) {
      // delete from previous position...
      setSucceeds(getPredecessor(index), getSuccessor(index));
      // ...and insert at the end.
      setSucceeds(lastEntry, index);
      setSucceeds(index, ENDPOINT);
      modCount++;
    }
  }

  @Override
  void moveLastEntry(int dstIndex) {
    int srcIndex = size() - 1;
    setSucceeds(getPredecessor(dstIndex), getSuccessor(dstIndex));
    if (dstIndex < srcIndex) {
      setSucceeds(getPredecessor(srcIndex), dstIndex);
      setSucceeds(dstIndex, getSuccessor(srcIndex));
    }
    links[srcIndex] = UNSET;
    super.moveLastEntry(dstIndex);
  }

  @Override
  void resizeEntries(int newCapacity) {
    super.resizeEntries(newCapacity);
    int oldCapacity = links.length;
    links = Arrays.copyOf(links, newCapacity);
    if (oldCapacity < newCapacity) {
      Arrays.fill(links, oldCapacity, newCapacity, UNSET);
    }
  }

  @Override
  int firstEntryIndex() {
    return firstEntry;
  }

  @Override
  int adjustAfterRemove(int indexBeforeRemove, int indexRemoved) {
    return (indexBeforeRemove >= size()) ? indexRemoved : indexBeforeRemove;
  }

  @Override
  public void clear() {
    if (needsAllocArrays()) {
      return;
    }
    this.firstEntry = ENDPOINT;
    this.lastEntry = ENDPOINT;
    Arrays.fill(links, 0, size(), UNSET);
    super.clear();
  }
}


text:
Meteor.publish('singleDashboard', function(id) {
  check(id, String);

  if (!this.userId) {
    self.ready();
    return null;
  }
  return Dashboard.find({
    _id: id,
    userId: this.userId
  });

});

Meteor.publish("tweets", function(dashboardId) {
  check(dashboardId, String);
  if (!this.userId) {
    self.ready();
    return nul;
  }
  return Tweets.find({
    dashboardId: dashboardId
  }, {
    limit: 200,
    sort: {
      createdAt: -1
    }
  });

});