He is also a research member in the CAIRN INRIA team of the IRISA Lab at Rennes 1 University. He received a Ph.D. degree in Computer Science from the University of Montpellier II. His research interests include Dynamically Reconfigurable architectures, SoC (System on Chips) design methodology and NoC (Network on Chip) based circuits. He focuses his research on designing flexible and efficient architectures managed in real-time.