Prior to joining Google, he obtained his PhD degree from the department of Electrical and Computer Engineering at Purdue University. He did research on the management of low level shared resources in multicore processors like lower-level caches and DRAM bandwidth. He has published papers in conferences (Parallel Architecture and Compilation Techniques, PACT, International Symposium on Computer Architecture) and journal (Transactions on VLSI). He has also reviewed papers for PACT and HiPC.