He received his Ph.D. Degree in Computer Science Engineering from University of Catania, Italy. Dr. Palesi is an Associate Editor of STM Journal Engineering Science Letters, Recent Trends in Parallel Computing, Hindawi Advances in Electrical Engineering, Elsevier Computers and Electrical Engineering Journal, Conference Papers in Engineering, Computer Engineering section, Hindawi VLSI Design Journal, and Computer Science Journals. He has served as Guest Editor for Elsevier Microprocessors and Microsystems: Embedded Hardware Design, IET Computers & Digital Techniques, ACM Transactions on Embedded Computing Systems, Journal of Parallel Computing, and International Journal of High Performance Systems Architecture. Dr. Palesi is member of the European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC).