coupling of the other bit lines bl 2 bl 2 bl 0 bl 0 with each of bit line pair bl 1 bl 1 amounts to c 1 c 2 c 3 since bl 1 and bl 1 are affected by noise due to the same coupling these coupling noises are all canceled when the voltage difference between bl 1 and bl 1 is read by a sense amplifier therefore the remaining noise comes from only the coupling capacity 4c 2 between bl 1 and bl 1 thereby reducing noise remarkably for twists in conventional bit lines because the capacity c 1 between bit line pair bl a and bl a is equal to the capacity c 2 between the other bit lines c 1 c 2 twisting bit lines only reduces coupling noise and consequently noise is just halved with the present invention however large capacitances c 3 and c 2 including the capacitance between contact supports for memory cells are all canceled only leaving small capacitance c 1 this capacitance can be made smaller by making larger the distance between the first and the second bit lines thereby reducing noise remarkably fig1 and 11 show a first and a second modification of the first embodiment respectively in fig1 and 11 the same parts as those in fig2 are indicated by the same reference symbols and their detailed explanation will be omitted the first and second modifications differ from what is shown in fig2 in the connections of the sense amplifiers 13 even when the connections of the sense amplifiers 13 are.