block 20 could detect empty packets whatever their characteristics happen to be and assign the lowest priority to those packets implementation of the various other blocks of fig1 may follow conventional design for example block 10 and 50 may be implemented with data selectors e g ttl logic 74150 ics data distributors e g 74154 ics and shift registers in a straight forward manner sorting network 30 may be implemented as taught by k e batcher in 34 sorting networks and their applications 34 spring joint computer conference proceedings 1968 pages 307 et seq the structure of sorting network 30 is matrix like with rows and columns and with a number of elements in each row n being equal to the number of input terminals of the network and a number of rows that is monotonically increasing with n hence the number of switching elements in network 30 is n times the number of rows the required number of switching elements can be reduced substantially when it is realized that the packets entering sorting network 30 from delay network 40 are already sorted capitalizing on this reduced entropy sorting network 30 of fig1 can be replaced with a much smaller sorting network that is followed by a simpler merge network as shown in fig2 sorting network 30 is replaced with a sorting network 70 that sorts only the m 1 n 1 lines of block 20 where m 1 n 1 lt lt n and a merge network 60 that merges the.