etching process is carried out to form a third polysilicon layer on the second polysilicon layer dopants of the third polysilicon layer are blocked from diffusing to the substrate by the single sided spacer application_number US 70726103 A description please refer to fig6 to fig1 fig6 to fig1 are schematic cross sectional diagrams showing the manufacture steps of making a deep trench capacitor in accordance with the first preferred embodiment of the present invention in which like reference numerals designate similar or corresponding elements regions and portions as shown in fig6 a semiconductor substrate 10 such as a silicon substrate is provided a pad oxide layer 26 and a pad nitride layer 28 are formed on a main surface of the semiconductor substrate 10 a dry etching process is carried out to form a deep trench in the semiconductor substrate 10 a buried plate 13 adjacent to the deep trench and a node dielectric layer 14 are formed a first polysilicon deposition and recess process is carried out to form a first poly layer poly 1 at the bottom of the deep trench a collar oxide layer 15 is formed on sidewall of the deep trench above poly 1 a second polysilicon deposition and recess process is then carried out to form a second poly layer poly 2 atoppoly 1 the method of forming the buried plate 13 comprises the steps of depositing a thin layer of arsenic silicate glass asg at a lower portion of the deep trench followed by thermal drive in it is understood that other doping methods such as gas phase doping gpd or the like may be employed the node dielectric layer 14 may be oxide nitride on or oxide nitride oxide ono but not limited thereto the collar.