applied particularly in the proximity of the lower electrode 12 the positive ions of the reactive gaseous mixture are accelerated and perpendicularly brought into the surface of a wafer mounted on the lower electrode 12 as a result the phosphorus doped polysilicon layer gate material formed on the wafer is anisotropically etched further according to the reactive ion etching method of this invention the high frequency power is gradually decreased to about 50 watts immediately before the impression of the high frequency voltage is stopped after the completion of etching this enables the total voltage stored in a capacitor surrounding the gate insulation layer to drop to a lower level than the breakdown voltage of the gate insulation layer when the gate insulation layer has a thickness of 400 u00e5 its breakdown voltage ranges between 30 and 40 volts if thereafter the impression of the high frequency voltage is stopped it is possible to prevent transitory excessively high voltage from being impressed on the gate insulation layer thereby substantially eliminating the damage of said gate insulation layer the cathode drop voltage v dc arising when the high frequency power is reduced to 50 watts as described above substantially stands at 25 volts as seen from fig4 fig8 shows the experimental data on the frequency of the damage to the insulation layer which arises from stopping the impression of high frequency power a comparison between said experimental data and the data of fig3 a obtained from the conventional reactive ion etching method clearly proves that the reactive ion etching method of this invention ensures a noticeable decrease in the frequency of damage to the insulation layer occurring in a small breakdown electrical.