and is typically at least 2000 u00e5 thick as shown in fig3 c a p doped poly silicon 371 is deposited onto the surface of the oxide layer 354 on substrate 31 the p doped poly silicon layer 371 may be applied by standard low pressure cvd typically conducted around 800 u00b0 c the thickness of p doped poly silicon layer 371 depends on the size of the emitter and by way of example may be on the order of 1500 u00e5 for a device having 0 3 u03bcm emitter opening depicted in fig3 d is the formation of a window 381 which is patterned and etched to expose the n doped region 34 of substrate 31 to this end a portion of p doped poly silicon layer 371 and oxide layer 354 is removed by lithographic technology and by etching technology to form an opening or window 381 the lithographic technique commonly uses a photo resist mask not shown which is removed after the etching is performed the etching technique is typically an ion etching or reactive ion etching using a plasma the removal of layers 371 and 354 typically require different chemistries so etching is a two step process for the sequential removal of each layer and these two processes may be performed in the same or in different machines following formation of the window 381 deposition of an epitaxial.