a part of the specification and in which is shown by way of illustration various embodiments whereby the invention may be practiced these embodiments are described in sufficient detail to enable those skilled in the art to make and use the invention it is to be understood that other embodiments may be utilized and that structural logical and electrical changes as well as changes in the materials used may be made without departing from the spirit and scope of the present invention additionally certain processing steps are described and a particular order of processing steps is disclosed however the sequence of steps is not limited to that set forth herein and may be changed as is known in the art with the exception of steps or acts necessarily occurring in a certain order the terms u201c wafer u201d and u201c substrate u201d are to be understood as interchangeable and as including silicon silicon on insulator soi or silicon on sapphire sos doped and undoped semiconductors epitaxial layers of silicon supported by a base semiconductor foundation and other semiconductor structures furthermore when reference is made to a u201c wafer u201d or u201c substrate u201d in the following description previous process steps may have been utilized to form regions junctions or material layers in or on the base semiconductor structure or foundation in addition the semiconductor need not be silicon based.