422 424 to generate a first current signal i gain1 and a second current signal i gain2 the first and second current signals may also be characterized as a differential current signal the first current signal is passed through fet 408 and is mirrored to fets 406 404 the second current signal is passed through fet 410 and is mirrored to fets 412 402 the first current signal now flowing through fet 404 is applied to matching fet 420 operational amplifier 430 receives as one input the voltage at node v 1 323 from one side of fet 322 of fig3 the other input is the drain node of fet 420 and through the bias in the transistor q 1 432 the drain of fet 420 is maintained at voltage v 1 the gate voltage vgn of matching fet 420 appearing at the gate node 418 is then used to control the gate of degeneration fet 322 similarly the second current signal now flowing through fets 412 436 is mirrored to fet 438 and is applied to matching fet 426 operational amplifier 416 receives as one input the voltage at node v 2 310 from one side of fet 312 of fig3 the other input is the source node of fet 426 and through the action of fet transistor 414 the source of matching fet 426 is maintained at voltage v 2 the gate voltage vgp of matching fet 426 appearing at the gate node 428 is then used to control the gate of load fet 312 thus as described above the gain control.