to state u201c 1 u201d to indicate a need for a definitive column repair this switching to state u201c 1 u201d turns on transistor 44 which fuses fuse 40 thus transistor 44 turns on which causes the fusing of fuse 40 as indicated hereabove this fusing introduces a permanent u201c 0 u201d on the output of inverter 37 which prevents any return to normal operation of the corresponding column when fuse 40 has fused a permanent state u201c 0 u201d is forced on the first input of gate 33 by inverter 37 thus selector 30 of the corresponding unit directs address ac via conduction means 32 and via a link 50 u2032 to the next unit this state u201c 0 u201d at the output of inverter 37 also inhibits the operation of transistors 34 and 36 under the action of a possible signal rs further this permanently forces the turning on of transistor 39 and accordingly a state u201c 1 u201d on the second input of gate 35 and thus a state u201c 0 u201d on its output thus transistor 36 is permanently off which eliminates any power consumption in the defective memory column the output of gate 33 is forced to state u201c 1 u201d which blocks renders non conducting transistors 45 and 47 of the next unit preventing the breakdown of another fuse if a single redundancy column is used per network of memory cells a definitive repair forbids the use of a reversible repair conversely if each network is associated with several redundancy columns there can remain available redundancy columns to perform a reversible repair in addition to the definitive repair performed during the manufacturing of the memory circuit the modifications to be brought to units 29 are within the abilities of those skilled in the.