39 s system the specific implementation of the dsp core 2 and an exemplary function unit 7 for the exemplary dsp 1 is shown in fig2 the dsp core 2 has a data arithmetic unit dau 10 part of which is shown here which has an arithmetic logic unit alu 11 and a set of accumulators or registers 12 to interface the function unit 7 with the dsp core 2 a multiplexer 13 is added between the output of the alu 11 and the accumulators 12 when data is to be loaded into the accumulators 12 from the function unit 7 the multiplexer is configured to take data from the function unit 7 via bus 14 for dsp core 2 operations not involving the function unit 7 the multiplexer 13 is configured to take data from the alu 11 data to the function unit 7 comes from the output of the accumulators 12 via bus 15 in this way the function unit 7 is substituted for the alu 11 when function unit 7 operations are desired note that there is no substantial impact on the performance of the dsp core 2 by the function unit 7 except for a small propagation delay for data through the multiplexer 13 the exemplary function unit 7 shown here efficiently performs barrel shifts and bit field extraction insertion in logic 20 for telephone signaling applications operation of the logic 20 is beyond what is necessary for the understanding of the claimed invention and will not be described further the actual function and operation.