whereby the sampling circuit 701 returns to the initial state fig2 is a diagram showing a unity gain sampling circuit 702 as an embodiment of the sampling circuit of the present invention an operation of the unity gain sampling circuit 702 will be briefly described initially switch circuit devices 63 and 65 are turned on and a switch circuit device 64 is turned off thereby a capacitor 66 is charged with an input signal next the switch circuit devices 63 and 65 are turned off and the switch circuit device 64 is turned on thereby the voltage of the charged capacitor 66 is held fig2 is a diagram showing a charge sampling filter circuit 703 as an embodiment of the sampling circuit of the present invention an operation of the charge sampling filter circuit 703 will be briefly described initially switch circuit devices 67 68 69 and 70 are turned on off in sequence with a delay of u00bc of the cycle between each device so as to sample an input voltage in this case clock signals are produced by for example sequentially shifting an lo signal by u00bc of its cycle after sampled charges are loaded into capacitors 75 and 76 by the switch circuit devices 67 and 68 switch circuit devices 71 and 72 are simultaneously turned on off so that combined charges of the capacitors 75 and 76.