enable register 122 indicating that no enabled interrupt is active after a detected update of either the interrupt status register 120 or the interrupt enable register 122 further the msi generator 126 may issue another msi message in response to the interrupt status register 120 and the interrupt enable register 122 indicating that at least one enabled interrupt is active after a detected update of either the interrupt status register 120 or the interrupt enable register 122 for example the core logic 116 activate one or more interrupts to request interrupt service for a core function in particular the core logic 116 may set one or more bits of the interrupt status register 120 that are associated with interrupts enabled by the interrupt enable register 122 in response to the update of the interrupt status register 120 the msi generator 126 may issue an msi message by writing the message data 130 to the message address 128 in further example the interrupt status register 120 may comprise one or more enabled interrupts that are active the core logic 116 may activate one or more interrupts to request interrupt service for a core function in particular the core logic 116 may set one or more bits of the interrupt status register 120 that are associated with interrupts enabled by the interrupt enable register 122 in response to the update of the interrupt.