reference 405 as also illustrated in fig4 the dsp 110 may comprise a network timing reference unit 200 a filter 300 and a frequency synthesizer 400 the network timing reference unit 200 may be configured to receive both the network timing reference 50 and a locally generated timing reference feedback signal 215 as may be supplied by the frequency synthesizer 400 having received the network timing reference 50 and the local timing reference feedback signal 215 the network timing reference unit 200 can perform a comparison of these two reference signals and output a phase error correction signal 275 as illustrated in fig4 the phase error correction signal 275 may be forwarded to an input of the filter 300 which may be configured to modify the phase error correction signal 275 such that an appropriate input signal 305 to control the frequency synthesizer 400 is generated the filtered phase error correction signal 305 supplied by the filter 300 may be either negative or positive depending on whether the local timing reference 405 supplied by the frequency synthesizer 400 is higher or lower in frequency and phase than the network timing reference 50 the effect of the filtered phase error correction signal 305 is to modify the frequency synthesizer 400 such that the corrected local timing reference 405 matches the network timing reference 50 in frequency and phase reference is now directed to fig5 which illustrates an exemplary implementation of a network timing reference unit that may serve as a phase detector in the improved clock synchronization.