photoresist layers 44 and 45 and the sio 2 layer 43 are identical is performed to level the upper surfaces of said epitaxial layer 32 and said sio 2 layer 43 accordingly the grooves 37 38 39 40 and the indentation region 41 remain occupied with said sio 2 layer 43 and thus the insulating isolation region 46 between the semiconductor elements and the insulating layer 48 for the field are simultaneously formed fig1 f subsequently n type collector regions 50 and 51 the base region 52 the emitter region 53 the p type polysilicon base electrode 54 the sio 2 layer 55 and the aluminum electrodes 56 57 58 and 59 are then formed in the aforementioned steps the regions at which the etching speed is higher than at other places because of the narrow deep groove having a width of 0 8 to 1 2 microns exist in the sio 2 layer 46 which occupies the grooves 37 38 and 39 in this case since the first and the second deep grooves are contiguous with the shallow groove the groove width y of the isolation region is 3 to 5 microns which is so wide that no regions at which the etching speed is high are defined thereover therefore even in the process producing the.