fig4 and 5 in fig7 distortion compensator 9 includes a control block 30 and control block 30 includes a cpu 32 and a nonvolatile memory 33 which are connected to a bus 31 further a distortion compensation coefficient generator 16 works similarly to the circuit shown in fig5 in the exemplary embodiment shown in fig7 an update switch 21 is provided between distortion compensation coefficient generator 16 and a distortion compensation coefficient look up table 15 e storing distortion compensation coefficients as will be described later this update switch 21 leads the distortion compensation coefficient generated in distortion compensation coefficient generator 16 to distortion compensation coefficient look up table 15 e during a timing period controlled by cpu 32 with this the content of an address location specified by a write address aw is updated at the time of initial startup of distortion compensator 9 cpu 32 reads out an initial table value of the distortion compensation coefficient stored in nonvolatile memory 33 so as to store into look up table 15 e as an internal value here the initial table value of the distortion compensation coefficient is for example a data having a predetermined value when the operation is started as.