present invention first polysilicon layer 14 and the photoresist mask 20 employed for defining the first polysilicon layer 14 protect the active areas and n well regions at the channel stopper implantation stage thus eliminating the need for an additional mask and so reducing the total number of masking stages for producing the circuit the advantages of the process according to the present invention will be clear to those skilled in the art from the foregoing description in particular besides eliminating one masking stage as described above and so reducing production time and cost the process according to the present invention also provides for improved electric performance by enabling implantation of the channel stoppers at a slightly greater distance from the active areas as compared with the prior art locos technique wherein the stoppers are self aligned moreover the doping ions implanted subsequent to field oxidation are not involved in the field oxidation necessary to form the gate oxide layer 13 and by virtue of not being subjected to the relative heat processes diffuse to a lesser degree this result further reduces the doping ion concentration close to the active areas and consequently increases the breakdown voltage and reduces the parasitic capacitance with no reduction in the turn on threshold of the parasitic transistors to those skilled in the art it will be clear that changes may be made to the process as described and illustrated herein without however departing from the scope of the present invention in.