the current in nmos transistor m 1 equals the sum of the currents in ntmos transistors m 2 a m 2 b and m 2 c in general the bgref level comparator c 2 may compare the resistor divided vdd to some mathematical function of vtn vtp and vd depending on the relative values of nmos transistors m 2 a m 2 b and m 2 c the mathematical function may be a type of average for example it is possible to make the mathematical function a weighted average by adjusting the ratios of nmos transistors m 2 a m 2 b and m 2 c reference is now made to fig6 which illustrates a simulation of the bgref level comparator c 2 and the bgref circuit 12 fig6 shows the bgref and bgref_ok signals when the bgref_ok signal rises it enables the bgref circuit 12 the bgref signal is capable of reaching its full value at this point this will be true in all process corners and conditions it will be appreciated by person skilled in the art that variations of the embodiment described above are possible within the scope of the invention for example it is possible to design the bgref level comparator c 2 using a degenerate leg with just two transistors instead of all three transistors m 2 a m 2 b and m 2 c and use only two of the process parameters vd vtn and vtp such a bgref level comparator would be useful for other bgref architectures using only those two parameters it is further possible to design the bgref level comparator c 2 using a degenerate leg with more than three transistors it is also possible to increase the degeneracy of the leg and add process parameters it will be appreciated by.