aload 2 0 pf n acomparator 0 5 pf 0 5 pfdriver load n a 2 0 pftotal 7 0 pf 2 5 pf______________________________________ as shown in the above table a capacitance reduction of 65 is achieved in accordance with the teachings of this invention furthermore the teachings of this invention provide higher bandwidth of the pin electronics interfacing to the device under test this is due to the lower capacitance as stated above the bandwidth of the pin electronics receiver in the prior art has been dominated by the pin electronics capacitance rather than the bandwidth of the receiver itself using the above example the maximum possible bandwidth of prior art pin electronic can be calculated as ______________________________________bandwidth 1 2 u00d7 pi u00d7 r u00d7 cbandwidth prior art 1 2 u00d7 3 14 u00d7 50 u00d7 7 pf 454 mhzbandwidth present invention 1 2 u00d7 3 14 u00d7 50 u00d7 2 5 pf 1270 mhz______________________________________ in addition to the above embodiments combining the driver and load functions and eliminating the tristate function of the driver buffer as taught in the present invention has significantly reduced the complexity of the design reduced complexity lowers the cost of the design over the prior art since it requires fewer components furthermore in accordance with the teachings of this invention power dissipation of the driver load circuitry is reduced as compared to the prior art because common functions of the driver and load are shared the power required in accordance with the.