image s are then supplied to the display driver device 24 that renders an output image on the display apparatus like lcd panel the display control device 22 has a codec device 220 that automatically compresses raw image s or other reference image s into the buffer apparatus 26 also the codec device 220 provides decompressed data to be used by one or more manipulating device s of the display control device 22 fig3 b illustrates a more detailed diagram of the display control device 22 that has a control unit 22 a de interlacer 224 a scaler 226 a memory interface 227 a codec device 220 and an on chip buffer 228 the de interlacer 224 and the scaler 226 are two manipulating devices for adapting the raw image s to be suitable as being displayed on the display apparatus 28 functions of the control unit 222 includes controlling the timings of outputting images to the display driver chip 24 generating control signals for operating the display control chip the memory interface 227 is used for writing data into the buffer apparatus 26 and reading data from the buffer apparatus 26 it is to be noted that fig3 b is used for illustration not to limit the actual design of the display control device 22 for example the scaler 226 de interlacer 224 the control unit 224 and the codec device 220 can be implemented as hardware logic or firmware architecture which processing logic is written as codes to be processed by a processing unit fig4 illustrates an example of a display processing apparatus for the first exemplary implementation the display.