and etching micromachining etc in an implementation not shown the substrate 100 may be processed to form the opening 106 therethrough rather than the cavity 102 in this case a layer covering the lower surface of the package 120 may be subsequently formed using e g resin solder resist etc such an approach may be simpler than forming the cavity 102 the cavity 102 may be sized to receive the semiconductor package 120 lateral dimensions of the cavity 102 may be large enough to accommodate the semiconductor package 120 while the height of the cavity 102 may be greater than lesser than or equal to the height of the semiconductor package 120 referring to fig1 b the semiconductor package 120 may be disposed in the cavity 102 in the substrate 100 in an implementation the semiconductor package 120 may be tested before being combined with the substrate 100 e g using speed tests etc such that reliable performance of the semiconductor package 120 can be verified prior to assembly with the substrate 100 the semiconductor package may be disposed such that the conductive pads 121 are oriented upwards i e facing away from the cavity 102 in an implementation the semiconductor package 120 may be bonded to the bottom surface of the cavity 102 e g using an adhesive.