which use one half of a fixed point multiplier array the shaded values indicate the location of products which are formed by multiplying multiplicand symbols directed from the top of the array with multiplier symbols directed from the right side of the array each of the indicated products connected with a dotted line are added together yielding sums of products as the result each of the unshaded locations in the array are configured to generate zero values into the multipliers product accumulation array for the fixed point convolve instruction the size of the result symbols are twice the size of the multiplier and multiplicand symbols for a floating point convolve instruction the size of the result symbols are the same as the size of the multiplier and multiplicand symbols as each of the subtypes use one half of the array it is apparent that halving the symbol size quadruples the number of multiplies 0050 fig8 illustrates a second embodiment of a group fixed point convolve instruction of the present invention in accordance with the second embodiment a 128 bit group of symbols ra is multiplied with a 64 bit group of symbols rb in the pattern shown and the resulting products shown as small black circles are added together in the pattern shown by the connecting lines producing a 128 bit group of result symbols rc of twice the size as the operand symbols as the fixed point products are twice the size of the multiplier and multiplicand symbols the instruction illustrated in fig8 is an 8 bit version a 16 bit version is illustrated in fig9 as the 16 bit version takes 16 bit operand symbols ra and rb and produces 32 bit result symbols rc as in fig7 the products in.