terminal 10a and a ground terminal 10b the input terminal 10a is connected to a noninverting input terminal of an operational amplifier 11 a capacitor 12 value c for integration is connected between inverting input and output terminals of the operational amplifier 11 the inverting input terminal being connected to the ground terminal 10b through a resistor 13 value ra the output terminal thereof is connected to a non inverting input terminal of a comparator 14 this comparator 14 is provided for comparing an output voltage v1 of the operational amplifier 11 with ground level an inverting input terminal thereof being connected to the ground terminal 10b while an output terminal thereof is connected to an input terminal 15a of a phase shifter 15 this phase shifter 15 is so constructed that the output voltage v3 derived from an output terminal 15b is delayed with respect to the input voltage v2 by a period of time u03c6 an output terminal thereof being connected to an input terminal of a buffer amplifier 16 the buffer amplifier 16 is supplied with power voltages e and e at its positive and negative power input terminals respectively and an output terminal thereof is connected to an output terminal 17a of this pulse width modulation circuit and also to the inverting input terminal of the operational amplifier 11 through a feedback resistor 18 value rb in this case the phase shifter 15 cooperates with the buffer amplifier 16 to form a pulse amplification circuit 19 a terminal 17b serves as a ground terminal firstly conditions of self oscillation of.