that overwrites the icc is received whereupon it will be designated as u201c free u201d and its pointer is written into the fprl 20 in particular the instruction fetching unit 9 fetches the fourth instruction 70 stored in the memory array 8 that cause the instruction scheduling unit 10 to map the icc register and a second destination register r 3 to a fourth physical register p 9 in a fourth action 73 in addition the unit 10 fetches a fifth instruction 76 stored in the memory array 8 that causes the instruction scheduling unit 10 to map the second destination register r 3 to a fifth physical register p 10 in a fifth action 75 while both instructions 70 and 76 consume a single physical register for use as a destination register they also produce a physical destination register pointer to be written into fprl 20 with particular reference to the fifth instruction 76 a pointer to the physical register p 7 which is the register being stored in the hold register is written into the fprl 20 the execution unit 6 executes the first third fourth and fifth instruction 52 56 70 and 76 thereby producing a first instruction result a third instruction result a fourth instruction result and a fifth instruction result respectively the buffer 7 stores the first third fourth and fifth instruction results since it involves a naught register the second instruction 54 does not cause the algebraic result to be stored the retirement unit 12 retires the first third fourth and fifth instruction after the reorder buffer 7 stores the.