transistors 1040 and 1050 has its bulk pwell connected to its source to reduce voltage stress between the bulk and drain source referring to fig1 voltage supply circuit 1100 is depicted voltage supply circuit 1100 comprises a first negative voltage level shifter circuit 1105 and a second negative voltage level shifter circuit 1110 each of which can comprise one of negative high voltage level shifters 800 900 and 1000 in this embodiment first negative voltage level shifter circuit 1105 and second negative voltage level shifter circuit 1110 together comprise negative high voltage level shifter 1000 and receives an input in and generates a medium intermediate negative voltage vhvnegm which ranges between 2v and u2212 3v in this example and a high negative voltage vhvneg which ranges between 0v and u2212 8v in this example first negative voltage level shifter circuit 1105 and second negative voltage level shifter circuit 1110 are coupled to nmos transistor 1115 cascoding transistor and nmos transistor 1120 as shown dnwb receives values of vdd or 0v and vpnext_pin 1101 receives a voltage of 2v or u2212 8v when the circuit 1100 is enabled the output of the circuit 1105 and 1110 are for example equal to 2 v which enable the nmos transistors 1115 and 1120 to pass the vpnext_pin 1101 level into the vhvneg 1106 when the circuit 1100 is disabled the output of the circuit 1105 and 1110 are for example equal to u2212 3v and u2212 8 v respectively which disable the nmos transistors.