but has two new bits x 1 and x 2 which are associated with prefixes bits 0 4 and bits 5 9 the interpretation circuit 1002 is designed to recognize these fields as prefix values in addition since bit 12 is u2018 x u2019 for the entire group the interpretation circuit is configured to treat bit 12 as x don 39 t care the specification memory can have arbitrary values in bit 12 the interpretation circuit recreates the original entry from the coded form and the recreated entry is compared against the inputs by the compare circuit 1003 with respect to the interpretation techniques of the present invention there are a number of options available as potential embodiments of the present invention the interpretation options are complementary to the coding options in the specification memory in addition to the options already mentioned above it is possible to include run time error checking and error correction in this circuit this is a function that is very hard to provide in the typical ternary cam it is also possible to vary the interpretation of the entries from entry to entry in the same group if additional code bits are provided in the specification memory to indicate how the entry is to be interpreted this may be useful where the u201c meaning u201d of certain bits in the input changes with the value of certain other bits various compare options or other operations are available for the implementation of comparisons by circuit 309 including but not limited to bit for bit compare range compare and various u201c soft u201d comparisons bit for bit compare is the standard cam approach range compare is possible to implement cheaply since.