along the feedback path the delay circuit 340 has the effect of increasing the stability of the pll 300 so that the gain can be increased to reduce lock time without making the pll 300 unstable the delay circuit 340 may be any type of delay circuit in one embodiment the amount of delay applied to the feedback clock signal 314 depends on the value of the loop gain for example as the loop gain increases the amount of delay added to the feedback clock signal 314 also increases the amount of delay may be defined relative to the external clock signal 312 for example the delay circuit 340 may delay the period of the feedback clock signal 314 along the feedback path 330 between about 20 and about 70 of the external clock signal 312 such as between about 30 and about 60 of the external clock signal 312 in other embodiments the amount of delay applied to the feedback clock signal 314 may remain constant for example the delay may remain along the feedback path 330 even after the pll 300 locks if the amount of delay changes over time the delay may change before or after the pll 300 locks examples of the delay changing over time include the delay being added and or removed from the feedback path 330 in addition the delay amount may be increased and or decreased the change to the delay may be gradual or immediate in one embodiment the delay may be removed or reduced after the pll 300 has locked to reduce jitter typically when the pll 300 is locked the two phases are very closely aligned but not identical therefore as the variation of the static phase offset goes to zero the jitter is reduced thus the.