the same time said analyzer 160 may inform the computer system 110 about failure condition via bus 1101 or via buses 1332 and 120 as an example of bus 1101 implementation can be signal that can initiate the global u201c reset u201d for restart said computer system 110 the information that the computer system 110 finished repairing restoration itself may be send via bus 1101 to the analyzer 160 or buses 120 and 1332 the analyzer 160 then informs said control block 132 and said communication block 134 via buses 1601 and 1603 correspondently about this condition in this case the control block 132 and the communication block 134 both switch from u201c busy u201d state to the normal operation state fig2 represents the control block 132 as an example said control block 132 includes a data processing block 1321 a system interface block 1322 and a microprocessor 1323 said control block 132 controls all functionality of the peripheral block 130 the transmit receive information to from front end interface block 131 via bus 1312 moves through the control block 132 and via said data processing block 1321 from to computer system 110 the control block 132 keeps active telecommunication lines 141 via front end block 131 physically connected during normal communication the control block 132 via bus 1601 informs said analyzer 160 about the status of the peripheral block 130 if it 39 s necessarily during failure condition of the computer system the control block 132 getting an information from the analyzer 160 via bus 1601 the control block keeps lines 141 in the physical connection state stops requesting to move information to from computer system 110 via 1342 and 120 buses and starting.