video signal from this synchronous signal counting is performed by a predetermined pulse counter to output a start pulse with a predetermined timing a pll phase locked loop circuit or the like is used for the synchronization with the synchronous signal as shown in portion b fig2 when the transfer transistor 105 2 is turned on by a switching signal 2 and the transistor 105 1 is kept in the off state the shift register starts output from the output terminal 109 3 and the terminals 109 1 and 2 do not output in this case the gate signal wiring or the shift pulse switch 1408 of fig1 operates from the third stage onward and in correspondence therewith an image display is given from the third stage onward in this way a means for switching the start pulse applying position is provided so that a switch pulse is applied to an arbitrarily selected position whereby it is possible to arbitrarily switch the display area in a single display device fig3 is a schematic circuit diagram of the shift register section of an image display device according to the second embodiment of the present invention in the drawing numeral 201 indicates a pull down resistor which is connected to the gate of the transfer transistor 105 due to the provision of the pull down resistor it is possible to apply from the outside a switching signal exclusively to a terminal to which a start pulse is to be applied further though this makes a bidirectional switching impossible it is possible to connect a resistor or a fuse element to the gate of the transfer transistor 105 and arbitrarily.