circuits as well since it is self synchronized with the analog to digital converter successive approximation register a status indicating circuit 43 supplies information to the latches 42 regarding the range of the logging measurement returning now the phase acquisition circuits following circuit 33 a phase to pulse width converter circuit 44 comprising an exclusive or gate 45 and a phase to pulse width converter circuit functions to convert the phase difference between the signal provided by the zero crossing detector 37 and a 10 khz reference into a variable duty cycle representing the phase difference on rising and falling edges and to give a prescaler to allow cmos counting race to this end the exclusive or gate 45 one input terminal of which receives the 10 khz reference signal serves to offset the phase measurement by u03c0 the phase to pulse width converter circuit is constructed around a rising edge detector 46 and a falling edge detector 47 because of the techniques employed the circuit is clocked on falling edges and can be viewed as two cross coupled dividers by two the output duty cycle of detectors 46 and 47 is equal to the phase difference between the zero crossing detector signal and the 10 khz reference when the phase shift between the outputs of detectors 46 and 47 is less than u03c0.