pf bits is 4 in this case the cpu 21 transmits a line transfer request to the scu 24 through the request line 201 the address line 202 and the pf bit line 203 the scu 24 reads data of total 512 b for four lines from the main memory 25 and transfers this data to the cpu 21 through the data line 204 the cpu 21 stores the received operation data 512 b in the secondary cache 23 in this case the cpu 21 does not store the data in the primary cache 22 by the above described operation it is possible to prefetch all the data of 512 b for four lines which is four times the quantity of data to be transferred by a normal instruction for accessing a cache from the main memory 25 to the secondary cache 23 by one software prefetch instruction without affecting the primary cache the quantity of data need not be four times but any integer times is sufficient in the above described case where the value of the pf bits is 4 the cpu 21 can also store the data of 512 b in the secondary cache 23 by issuing.