if this condition is not met than switches s d1 and s d2 operate with partial zvs this mode of operation typically occurs in ac dc applications around the zero crossings of the line voltage since input line current is also low around the zero crossings of the line voltage due to the zvs of the boost switch one suitable implementation of the circuit in fig5 is with the boost switch consisting of a mosfet metal oxide semiconductor field effect transistor device or a parallel combination of mosfets similarly due to the zcs of the auxiliary switch the circuit in fig5 is suitable for an igbt insulated gate bipolar transistor auxiliary switch however the circuit can also be implemented with a mosfet auxiliary switch without a performance penalty an implementation with an igbt boost switch is possible with a turn off snubber capacitor connected across the igbt to reduce the turn off loss due to igbt 39 s current tail effect in this case it is necessary to design the circuit so the boost switch turns on with zvs so that the snubber capacitor does not contribute to the turn on switching loss finally with the implementation with the igbt for the boost switch.