which are used to connect a capacitor of a capacitor array to either first or second reference voltages vref and vref u2212 within a successive approximation converter for simplicity the same capacitor and switching transistors are considered in fig3 as were illustrated in fig2 the sequence of transistor switching performed as part of the successive approximation conversion process is controlled by a state machine 50 which selects which capacitors are to be trialled and hence which transistors are to be selected for potential switching within any given bit trial each transistor has an associated transistor control circuit of which circuit 52 is arranged to control transistor 22 and the circuit 54 is arranged to control transistor 24 the circuits 52 and 54 may receive their control signals solely from the state machine 50 or as shown in fig4 they may incorporate some of the memory functionality required to select a bit during the successive approximation conversion bit trials and to maintain that bit as being set if the result of the comparison decides that a bit is to be kept however it can be seen that the circuits 52 and 54 are separate and hence each has the ability to switch its associated transistor off irrespective of whether the other control circuit has placed its transistor in a conducting or non conducting state thus the control signals to the transistors are no longer inverted versions of one.