control signal c and through the inverter 26 a 90 u00b0 to 90 u00b0 phase control signal d the return signal b at the output side 13 of the hybrid 10 in fig1 is first coupled via t2 to a gt 30 dbmo level detector 30 this detector provides an input sensitivity of 10 mv into 400 ohms which rejects reflected 4 khz signals below 30 dbmo since further line balancing is superfluous for signals below this level signals which pass through the level detector 30 are then used to generate pulse control signals e by a 0 crossing detector 31 the short 500 u03b7sec output signals e are used to reset the noise rejection window generator 22 which produces a window pulse f that is a maximum of 2 u00d7 250 64 7 81 u03bcsec long and centered 250 u03bcsec after the reset signal e this ensures that e is a genuine signal and not a noise spike by rejecting adjacent pulses of e that are not spared by 250 u03bcsec u00b1 tx where 2tx is the small window f tx 250 u00f7 64 3 91 u03bcsec concurrent appearance of pulses e and f produces an output from an and gate 32 which in conjunction with control signals.