can be function blocks in a system on chip soc such function blocks may be analog circuit blocks digital circuit blocks or memory cell blocks in the soc chip the power ring structure has one high supply voltage vdd ring 110 and a complementary low supply voltage vss ring 120 at the edges of the ic chip 100 metal lines extend from the vdd ring 110 and vss ring 120 to the center of the ic chip 100 the metal lines are then coupled to transistors one drawback of this kind of power routing scheme is that the voltage drop at the center of the ic chip 100 is due to the resistance of metal lines another draw back is that running a power ring around the chip 100 may increase area overhead fig1 b illustrates a conventional power mesh routing scheme for another exemplary ic chip 150 with the two modular cells 130 and 135 multiple parallel power lines 160 s and 170 s are routed from one side of the ic chip to the other if the power lines 160 s represent vdd then the power lines 170 s represent vss the power lines 160 s and 170 s extend across a cell partition area 140 of the modular cells 130 and 135 and blocks any vertical line in the same metal layer a disadvantage with this kind of power routing scheme is that the power lines 160 s and 170 s are routable only in one direction horizontal shown in fig1 b signal lines in the same metal layer as the power lines 160 s and 170 s are also routable in only one direction for signal lines that need.