no effect on the system performance if an accumulator negative overflow au error occurs the output is set to the two 39 s compliment of the positive value the output of the error handler is transferred to the result register resultreg see fig1 as a parallel transfer with the two error flags both reset and appended to the result this data frame is then shifted out through the serial output mout it will be understood that controlling the numerical overflow inherent in fixed point numerical architectures is done by closely emulating the behavior of analogue circuits where signal clipping is well understood the multiplier cell provides this error correction facility for both errors resulting from calculations in the multiplier cell itself and or as a result of calculations performed in accumulator cell earlier in the signal path errors occurring in accumulator cells are not corrected there but are indicated to be present by the setting of two flags at the end of the data frame these two flags are the negative overflow flag and the positive overflow flag as signal data is being loaded by the multiplier processing element these two flags are passed to the error flag register er 1 a schematic outline of an accumulator cell is shown in fig1 data is selectively fed to the cell by input multiplexers ia 1 ia 8 from the programmable interconnect and direct local connect networks under the control of the configuration store cs 2 and processed data is output from the cell via output multiplexers oa 1 oa 2 which feed the data buses and control buses respectively the accumulator cell a has an adder unit acc 1 where selected data.