establish a flow of electric charges hot electrons from the channel to the floating gate 24 through the gate oxide 22 the floating gate 24 once charged will alter the conduction threshold of the mos transistor of the cell that is the minimum source drain voltage which admits an appreciable current flow through the channel there are two possible threshold levels of the transistor corresponding to a state of absence or presence of charges on the floating gate which define the 0 or 1 logic levels of the cell the cell state is detected i e the memory cell read by applying a low voltage 4 to 5 v to the drain and control electrodes relative to the source and measuring the current that flows through the channel since the gate 24 is fully isolated electrically its charge state will not change during normal read operations that is the cell will behave as a read only memory rom cell where necessary this cell type can be erased as is known by exposure to ultraviolet uv radiation for this purpose a transparent window to this radiation would have to be provided in the structure containing the integrated circuit with the eprom cell the number of eprom cells formed will obviously depend on individual circuit requirements for storage the cells may be arrayed across a single n region constituting the control electrode common to all the cells or be arranged otherwise across the various side by side n regions to form a matrix of cells it is a recognized fact that the programming speed of an eprom cell is substantially affected by the concentration of impurities in the channel when the channel is formed from a region with a low impurity concentration a special.