131 135 the package described above can also be placed in a socket such as in land grid array or pin grid array packages in the embodiment of fig1 where the die 130 is comprised of silicon and the core 106 of fiber reinforced glass the cte mismatch can lead to cracking and failure in the c4 joints 133 particularly during the temperature swings accompanying die attach and assembly in the sem image of fig4 cracking of a c4 joint resulting from cte mismatch is illustrated note the dark regions near the top of the joint returning to fig1 the build up layers 120 comprise alternating insulating and conducting layers as is well known in the art specifically layers 108 and 114 are conducting layers containing traces 107 and 113 respectively layers 110 and 116 are insulating layers containing vias 109 and 115 respectively an intermediate insulating layer 112 comprising an embedded material 150 is disposed between insulating layer 110 and conducting layer 114 the embedded material 150 may be chosen with a cte between the cte of the core 106 and the cte of the die 130 preferably the cte of the embedded material 150 is more equal to the cte of the die 130 where the die 130 is comprised of silicon with a cte of about 3 ppm k u00b0 the cte of the embedded material 150 is preferably between about 3 6 ppm k u00b0 for one embodiment that is approximately matching the cte of the die the relatively low cte of the embedded material 150 reduces the undesirable local cte mismatch between the die 130 and.