control signals the control signal is inputted during the reset period from the external of the microprocessor 101 and indicates a certain kind of re initialization by its logical state then the generating circuit 1 generates and output an address setting signal for setting an execution starting address for the warm start corresponding to the logical state of the inputted control signal after the reset cancellation the microprocessor 101 is also provided with a command fetching program counter 2 an address latch 3 and an address bus line 4 the program counter 2 is a circuit for command fetching and connected to the output of the generating circuit 1 the program counter 2 receives the address setting signal from the generating circuit 1 then the address data corresponding to the received address setting signal is set in the program counter 2 as the initial value for the following program execution in the microprocessor 101 then the program counter 2 transmits the set address data to a rom 20 in a memory 19 through an address latch 3 and an address bus line 4 the rom 20 is written with various kinds of programs including the initialization program the memory 19 may include a ram random access memory to which various kinds of programs to be performed by the microprocessor 101 are loaded from a peripheral devices such as a floppy disk device the memory 19 is disposed outside of the microprocessor 101 in this embodiment but this may be disposed within the microprocessor 101 alternatively only the.