of the flip flops ff 27 16 to 27 1 shown in fig2 when a clock used to shift 64 bits of data is fed to the arithmetic operation section 20 in fig2 fig4 shows operational expressions to obtain each of output data c 15 to c 00 from each of the flip flops ff 27 16 to ff 27 1 which are output when a clock used to shift 64 bits of data whose number of bits are equal to the input data of 64 bits is fed to the arithmetic operation section 38 as shown in fig1 the high order 16 bits out of the output data d 3 from the data combining section 57 are the output data d 13 output from the latch 54 that is the arithmetic operation result crc 16 2 in the arithmetic operation section 60 and middle order 16 bits are the output data d 12 from the latch 53 that is the arithmetic operation result crc 16 1 from the arithmetic operation section 58 therefore each of the operational expressions c 15 to c 00 shown in fig1 is substituted into each of the operational expressions d 63 to d 48 shown in fig4 each of the operational expressions c 15 to c 00 shown in fig2 is substituted into each of the operational.