corresponding first pins of the dram the socket device is disposed over the separate pcb and is configured to install the first flash memory chip the first flash memory chip is connected to the interface pcb through corresponding second pins application_number US 201514620532 A description the following description is of the best contemplated mode of carrying out the invention this description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense the scope of the invention is best determined by reference to the appended claims fig1 is a schematic diagram of a testing apparatus in accordance with an embodiment of the invention as shown in fig1 the testing apparatus comprises an interface pcb 110 a separate pcb 120 and a socket device 130 in an embodiment the interface pcb 110 provides nand flash pins and emmc pins for signal testing for example the interface pcb 110 can be made of a high temperature resistant fiberglass board which supports the fbga 153 and fbga 162 specifications but the invention is not limited thereto that is the interface pcb 110 may support the fbga specifications having 153 pins and 162 pins similarly the separate pcb 120 and the socket device 130 also support the fbga 153 and fbga 162 specifications in an embodiment the emmc chip 180 under test can be placed in the socket device 130 as shown in fig1 in another embodiment the emmc chip 180 under test can be placed in the socket device 130 and another emmc emcp cimcp chip 190 under test can be placed between the interface pcb 110 and the separate pcb 120 and the details will be described later fig2 a is a schematic diagram of.