desired clock frequency for microprocessors and data acquisition systems may be substantially higher than the clock frequency required for the timer 302 used for scheduling for example the controller and or data recorder may use a 24 mhz oscillator and the timer 302 may use a 32 khz oscillator in one embodiment the controller and or data recorder may be configured to allow real time streaming of quality audio to be formatted and stored on the storage media of the data recorder using a 24 mhz oscillator which is a substantially lower frequency oscillator than what might be used in conventional systems which use for example 200 mhz or higher oscillators higher frequency oscillators generally consume more power than low frequency oscillators therefore configuring the controller and or data recorder to operate using a relatively low frequency oscillator may provide significant power savings in addition in one presently preferred embodiment the system may employ different oscillators to provide clock signals to timer 302 and to the controller 304 and or data recorder 305 or the integrated controller and data recorder 401 as discussed above even though the controller and or data recorder may be configured to use a lower frequency oscillator than conventional systems the timer 302 may run on an even lower frequency oscillator thus by using different oscillators for different parts of the system the higher frequency oscillators used for the controller and or data recorder may be powered down during idle periods of the system while a lower frequency oscillator used for the timer 302 continues to run in this manner additional power savings may be achieved during the idle periods as only a very low.