finfet structure except that high k and metal films need to be deposited in a conformal manner to obtain desired device characteristics on the 3 d fin structure this requirement limits the deposition for the high k dielectric 110 the gate metal layer 120 and the work function metal 140 to conformal methods such as atomic layer deposition ald we will now discuss the process steps for gate last high k gate fabrication with respect to the flowcharts of fig3 and 4 optional steps are depicted in dotted boxes it will be apparent to those with knowledge in the art that the fabrication of a gate stack on a semiconductor device involves more steps than are shown in fig3 and 4 for example we skip over the source drain junction formation and show the process after the dummy gate has been removed for clarity we concentrate our explanation on those steps that deviate from the conventional fabrication of the high k gate referring now to fig3 we show a flowchart 300 of the process for fabricating a gate last high k metal gate 100 according to the embodiment of fig1 a through 1d in step 310 we grow an interfacial layer and deposit a high k.