having high reliability even under thermal stress wherein a sealing resin is interposed to bond the electrodes and bumps between a wiring board formed with a plurality of electrodes and an ic chip formed with a plurality of bumps the bumps being formed under the condition that the following formula is satisfied 100 lt h lt 125 where u03c6a represents the top diameter of a bump bonded with an electrode h the height of a bump projecting from the ic chip and bonded with an electrode and f the linear thermal expansion coefficient of the sealing resin application_number US 94964004 A description below a preferred embodiment according to the present invention will be described with reference to the accompanying drawings fig1 is a sectional view of the outer appearance of a semiconductor device according to an embodiment of the present invention the semiconductor device 1 illustrated in fig1 comprises a wiring board 12 and a silicon ic chip 14 as examples of a wiring board and a semiconductor integrated circuit chip of the present invention on the surface of the wiring board 12 that faces the ic chip 14 a number of electrodes 122 are formed when the wiring board 12 and the ic chip 14 are placed together face to face the electrodes 122 and bumps 142 at corresponding positions contact each other and the wiring board 12 and ic chip 14 are.