drain implants may be performed in portions 703 705 to form source drain extensions appropriate n type or p type dopants may be used as part of this step the region 203 under conductive region 401 may serve as a channel region referring now to fig8 a spacer 801 may be formed on the sidewalls of conductive region 401 lined by liner 601 spacer 801 may be made of multiple layers of dielectric materials spacer 801 may protect certain portions of portions 703 705 during subsequent processing next exposed portions of portions 703 705 may be etched away next as shown in fig9 a second spacer 901 may be formed to protect sidewalls of portions 703 705 furthermore portions 707 709 implanted with amorphization implants may be etched away referring now to fig1 an oxide layer 1001 may be deposited on wafer 201 next as shown in fig1 selected portions of oxide layer 1001 may be etched away etching of selected portions of oxide layer 1001 may result in partial etching of liner 601 as well fig1 shows a partial cross sectional side view of wafer 201 after structures 1201 and 1203 are epitaxially grown on the exposed sidewalls of channel region including portion 203 referring to fig1 now an amorphous silicon layer 1301 1303 may be deposited amorphous silicon layer 1301 1303 may be subjected to chemical mechanical polishing and etched back next as shown in fig1 a photoresist layer 1401 may be formed on.