outputs from respective ones of the plurality of peripheral functions 116 through respective ones of a plurality of multiplexers 214 a 214 p each of the plurality of multiplexers 212 and 214 may have n inputs e g matching the number of the plurality of peripheral functions 116 data and control outputs 128 and 126 respectively the control signals 130 a 130 p to the plurality of multiplexers 212 a 212 p and 214 a 214 p may be sent on binary parallel or serial buses and have a sufficient number of bits for control of the n inputs it is contemplated and with the scope of this disclosure that instead of using the plurality of multiplexers 212 a 212 p and 214 a 214 p for coupling each of the plurality of drivers 206 a 206 p to respective outputs of the plurality of peripheral functions 116 that a switching matrix circuit not shown may be used to couple the inputs of the plurality of drivers 206 a 206 p to respective outputs of the plurality of peripheral functions 116 for example one or more drivers 206 may be coupled to an output of a peripheral function 116 however not more than one output of a peripheral function 116 may be couple to any one or more drivers 206 this prevents multiple output functions from becoming active at the same time but allows multiple drivers 206 to have the same data information available for a plurality of external circuits.