the third layer metallic interconnect 4 through the via holes 3 in the via group the first layer metallic interconnect 1 provided in a layer underlying the second layer metallic interconnect 2 and the third layer metallic interconnect 4 is provided so as to elongate in a direction perpendicular to an extending direction of the second and the third layer metallic interconnects 2 and 4 a protruding portion 30 is formed in the first layer metallic interconnect 1 so as to overlap with all vias included in the via group each of the metallic interconnect is for the use in for example a power supply interconnect for example a power supply potential is supplied to the first layer metallic interconnect 1 and a ground potential is supplied to the second layer metallic interconnect 2 and the third layer metallic interconnect 4 more specifically in the semiconductor device of the present embodiment the first layer metallic interconnect 1 elongates in a first direction so as to overlap with the via group 8 and the second layer metallic interconnect 2 and the third layer metallic interconnect 4 elongate in a second direction that is perpendicular to the first direction and further the protruding portion 30 protruded in the second direction from the first layer metallic interconnect 1 is provided so as to overlap with the via group 9 which couples the second layer metallic interconnect 2 to the third layer metallic interconnect 4 in the present embodiment.