terminals connected to one another and receiving a single command signal source terminals connected respectively to the pads 22 a 24 a 26 a and 28 a drain terminals connected respectively to the pads 22 b 24 b 26 b and 28 b and bulk terminals connected to the respective source terminals fig4 shows a schematic transverse cross section of a semiconductor material body in which a cmos power transistor of the above described type is formed in which 40 indicates the substrate of type p 42 indicates the well of type n which is obtained by epitaxial growth on the substrate 40 which defines the bulk region or body of the power transistor 12 and which is delimited laterally by two insulating wells 44 of type p 46 and 48 indicate the diffuse source and drain regions of type p 50 indicates the low resistivity regions of type n for biasing of the bulk region 42 reference number 52 indicates the gate oxide and s d and g indicate the source drain and gate terminals respectively of the power terminal 12 which are connected to the source and drain regions and to the gate oxide respectively as can be seen the power transistor 12 has a distributed structure formed by a succession of.