programmable counter timer 52 the factor by which the system clock signal is divided is entered as a digital number into the variable divider 56 from the peripheral interface adapter 58 in this manner a slowdown or deceleration of the stepping motor 21 may be effected by reducing the rate of the drive pulses applied to the motor translator 27 in addition output 17 of the peripheral interface adapter 58 is applied via the adapter 54 to the motor translator 27 to effect whether the dc stepping motor 21 is driven in a counterclockwise direction thus directing the platen 4 downward or in a clockwise direction to drive the platen 4 upward in an illustrative embodiment of this invention the motor translator 27 takes the form of that translator manufactured by the superior electric company under their designation tbm105 9322 to be used with the dc stepping motor taking the form of a motor manufactured by the same company having a designation m093 fd301 the microcomputer 26 has an internal memory that is programmed with a set of instructions to effect the above described operations as will now be explained in greater detail in an illustrative embodiment of this invention the program is written in a proprietary language known as 34 microforth 34 a trademark of forth inc an illustrative example of the particular program in the noted language is set out below as a series of screens 53 through 61 spc1 a high order of summary of the above program is given in screen 5f wherein at line a the daccel is called to effect an acceleration of the motor drive instruction to direct the platen 4 in a downward direction and thereafter the program calls drun to continue to drive the.