126 128 130 152 and 184 are all cleared through a not shown circuit when one of the stitch patterns for example a straight stitching 58 is selected as desired by operating one of the pattern selection push buttons 68 a signal ps1 corresponding to the straight stitching is supplied to the pattern indication controlling circuit 90 a start address signal sa1 an end address signal sb1 and a port select signal sp3 for vocally indicating the straight stitching from the pattern indication controlling circuit 90 are thereby output these start address signal sa1 and end address signal sb1 are supplied via the multiplexor 100 to the start address latch 144 and the end address latch 146 on the other hand a load signal sl is output from the timing logic circuit 104 after a certain time span from the generation of the port select signal sp3 causing the start address signal sa1 and the end address signal sb1 to be loaded in the start address latch 144 and the end address latch 146 and then to be supplied to the address counter 148 and the comparator 150 when a certain predetermined time has lapsed after the generation of the load signal sl a latch completion signal sc1 is output from the timing logic circuit 104 the flip flop circuit 200 is thereby set and the start address signal sa1 is loaded in the address counter 148 and in the pattern indication controlling circuit 90 the flip flop circuit 102 is cleared for restraining the output of the port select signal sp3 when the flip flop circuit 200 is set the clock pulse cp is supplied via the.