a nand gate 16 pre driving inverters 17 and 18 and driving inverters 19 and 20 three output signals f 1 f 2 f 3 of the divider 2 are applied to the nand gate 16 in the case that the gate for the buzzer 8 is electronically controlled gate control signal c g is used to control the gate provided in the means 9 and in the case where the gate is mechanically controlled a mechanical switch or gate means 15 is provided between the buzzer 8 and output terminals 21 or 22 as shown in fig3 output signal of the nand gate 16 is applied to the inverters 18 and 19 through the inverter 17 and the output signal of the inverter 18 is applied to the inverter 20 thus output signals from the output terminals 21 and 22 are opposite in phase which are applied to the buzzer 8 for actuation thereof each of the inverters 17 and 18 are geometrically designed to have a moderate power and each of the inverters 19 and 20 is designed to have a great power thus the voltage difference between the output signals from the terminals 21 and 22 is varied from peak to peak and the value is twice the source voltage further since the output impedance is low the buzzer may be driven by.