with 3 micron bumps these features will be roughly 7 microns because these features are the negative of the features imprinted in the nonconductive layer fig4 b shows such an exemplary patterned imprinting wafer after etching trenches 404 in it these trenches can be formed by placing the wafer in a plasma etching system such as a reactive ion etching rie system or inductively coupled plasma icp etching system where a mixture of o 2 and sf 6 etch away the exposed si sidewall angle is controlled by the ratio of the two gasses and is controlled to etch sidewalls roughly 70 degrees with respect to the surface of the imprinting wafer etching proceeds until the etch depth is equal to the thickness of the nonconductive layer after etching the photoresist layer is removed with acetone or photoresist stripper after completing the fabrication of the imprinting wafer the imprinting step follows shown in fig4 c the incomplete template wafer 405 consisting of a conductive layer 406 an undefined topside nonconductive layer 407 and a nonconductive backside layer 408 is placed on the vacuum chuck 409 of a hybrid bump bonder capable of micron resolution alignment one such piece of equipment is the suss microtec fc 150 the imprinting wafer 410 is placed on the other vacuum chuck 411 the two wafers are roughly aligned and heated past the glass transition temperature of the nonconductive layer if this layer was formed using the first embodiment using teflon af 1601s this temperature is 160 u00b0 c if this layer was formed using the second embodiment this temperature will depend on the specific ptfe used after heating the two wafers are pressed together held for several.