is connected to each reference multivibrator r 1 r n of reference shift register 16 clock 20 can be inhibited via its inhibit input to prevent shifting the reference data in reference shift register 16 in order to maintain a particular reference pattern as shown the output of each signal multivibrator s 1 s n drives one input of corresponding adders a 1 a n of a plurality of modulo 2 adders 22 exclusive or gates likewise the output of each reference multivibrator r 1 r n of reference shift register 16 drives the other input of the corresponding adders a 1 a n the plurality of modulo 2 adders 22 are operatively connected to a plurality of 1 bit d a converters 24 each adder a 1 a n is connected to one input of corresponding converters c 1 c n of the plurality of 1 bit d a converters 24 aforementioned the other input inhibit of converters c 1 c n of the plurality of 1 bit d a converters 24 can be used to shorten the length of digital m of n correlation device 10 i e length agility still referring to fig1 in the embodiment of the invention shown therein the output of each of the plurality of 1 bit d a converters 24 is connected to an analog summing line 26 the n individual analog outputs are summed across a single analog summing resistor r sum connected at one end to a voltage supply v bias and at its other end to both.