4 butterfly module as a result a number of nontrivial complex multipliers is reduced to perform the fft in a high speed in a small area application_number US 97069501 A description a fast fourier transform fft processor using a high speed area efficient algorithm in accordance with a preferred embodiment of the present invention will now be described in detail with reference to the accompanying drawings a high speed area efficient algorithm in of the present invention is hereinafter referred to as radix 4 2 algorithm for convenience of explanation the process for forming the radix 4 2 algorithm will now be explained firstly a radix 4 butterfly and a radix 2 butterfly are selected in order and decomposed by a three dimensional index map through an index decomposition method a general method for introducing fft algorithm thereby obtaining following formula 2 k n 4 ue89e k 1 n 8 ue89e k 2 k 3 0 u2264 k 1 lt 3 0 u2264 k 2 lt 1 0 u2264 k 3 lt n 8 1 n n 1 4 ue89e n 2 n 3 0 u2264 n 1 lt 3 0 u2264 n 2 lt 1 0 u2264 n 3 lt n 8 1 when the decomposed index is introduced to formula 1 formula 1 is equal to following formula 3 x ue8a0 k x ue8a0 k 1 4 ue89e k 2 8 ue89e k 3 u2211 n 3 0 n 8 1 ue89e ue89e u2211 n 2 0 1.