an electrical schematic diagram of a typical switched capacitor integrator 300 suitable for the first stage of delta sigma modulator 200 generally the first integrator stage of a delta sigma modulator is the most critical to setting the distortion performance and therefore will be the focus of the following discussion it should be noted however that the concepts discussed below are useful in a number of switched capacitor applications including various delayed and undelayed switched capacitor integrators switched capacitor integrator 300 operates in two non overlapping phases u03c6 1 and u03c6 2 per sample this timing is shown in fig4 as will be discussed further in the preferred embodiment each phase is composed of rough and fine subphases u03c6 1r u03c6 if u03c6 2r u03c6 2f in the general case during phase 1 u03c6 1 switches 301 a d and 304 a b close and the differential input voltage v in is sampled onto input sampling capacitors c in 303 a b switches 302 a d and 305 a b are open during u03c6 1 also during u03c6 1 the differential reference signal v ref on to reference sampling capacitors c ref 306 a b by switches 307 a d and 308 a b switches 309 a d and 310 a b are open during phase 1 switches 311 a d under the control of the complementary bits d and d from the 1 bit data output from the quantizer couple or cross couple reference sampling capacitors c ref 306 a b to the inverting and non inverting summing inputs to op amp.