driver transistors are biased in class b such that negative transitions of the svm signal cause conduction in the pnp transistor and positive signal transitions turn on the npn transistor thus bidirectional deflection current is driven through the svm coil from the collectors to circuit point q with an insignificantly small current component circulating outside the respective collector to emitter circuits to provide control of power dissipation particularly in the driver stage feed back is provided from an emitter current sample this attenuated and filtered signal svm ctl is coupled to an svm signal processing circuit which forms no part of this application the nominally 1 5 volt peak to peak svm signal is input at terminal a with the svm processor signal ground coupled to terminal b to reduce spurious and unwanted transient ground current crosstalk or noise the signal at terminal a is coupled via a resistor r1 to the base of an npn transistor q1 which is configured as a common emitter amplifier with a gain of approximately 5 the emitter of transistor q1 is connected to a series combination of resistor r3 and resistor r4 which are connected to ground with the junction terminal b connected to the svm processor ground the collector of transistor q1 is connected via a resistor r2 to a power supply for example 26 volts which is decoupled by series resistor r7 and decoupling capacitor c1 the collector of transistor q1 is also coupled to the base terminal of an npn transistor q2 configured as an emitter follower amplifier the collector of transistor q2 is connected to the decoupled 26 volt power supply and.