the signal terminal of the device to be tested is controlled according to the voltage level on the control terminal fig3 a is the circuit diagram schematically illustrating a measuring circuit for measuring the current voltage characteristics for a transistor according to the preferred embodiment of the invention fig3 b is a drawing schematically illustrating the timing diagram for two the clock signals with different duty cycles applied to the gate of transistor 301 in fig3 a vg is the voltage level of the clock signal at the high voltage level that is the gate voltage of the transistor 301 in fig3 a w 1 and w 2 respectively represent the enabling time for the two clock signals and t represents the clock period for the two clock signals fig4 is a drawing schematically illustrating a flow process diagram of measuring circuit for the current voltage characteristics of transistor according to the embodiment of the present invention referring to fig3 a 3b and 4 in step s 410 the voltage generator 310 provides a voltage applied to the drain of the transistor 301 that is the signal terminal the clock generator 320 provides a first clock signal vin of which the duty cycle is w 1.