formatter if may be positioned immediately before the vliw processor and hence after the cache i or even in the decoding stage of the vliw processor this latter case is the same as the one described previously with reference to fig1 for k 2 n 30 in the compiling step then the compiler generates all the additional stop bundle information for all the output widths envisaged in the instruction appendix ia the above will then be used by the formatter if according to the configuration thereof the operation performed by the formatter if consists only in entering a bit and eliminating the appendix ia these are operations which can be implemented in an elementary way at the hardware level as will be evident to persons skilled in the sector the instructions that make up the task of fig8 are present in the system memory mem and are addressed by means of the program counter provided in each vliw processor envisaged see fig6 the above instructions are loaded by the fetch unit of fig3 and appropriately adapted to the parallelism of the processor according to the solution implemented by the unit iiu described previously with particular reference to fig9 the solution according to the invention offers the important advantage provided by.