signal s 3 is u201c high u201d the power supply voltage vdd is supplied to sources of the floating body type transistors q 30 and q 31 therefore when the signals s 1 and s 2 change from u201c low u201d to u201c high u201d or when the signals s 1 and s 2 change from u201c high u201d to u201c low u201d the transistors q 30 and q 31 transit in the region where the c v characteristics of fig4 is low region of vgs lt 0 accordingly gate capacitances of the transistors q 30 and q 31 as viewed from lines of the signals s 1 and s 2 maintain a value near 0 and therefore it is possible to achieve high speed operation waveforms and a reduction in consumption current fig8 shows a circuit configuration example of a logic circuit 30 a that is a modification of the logic circuit 30 of fig7 a most parts in the logic circuit 30 a of fig8 are common to those in the logic circuit 30 of fig7 however a difference exists in that a p channel type transistor q 34 is provided in addition to the above transistors q 30 to q 33 the transistor q 34 is connected between the power supply voltage vdd and the node ni and the output signal outi is applied to its gate thereby when the output signal outi changes to u201c low u201d the transistor q 34 turns on so as to supply the power supply voltage vdd to the node ni and therefore it is possible to prevent the node ni from being in a floating state in the following device structures of the floating.