another a clock signal line transmitting a clock signal clk and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits upon turning on the shift register at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line during an initialization period immediately after power has been turned on the frequency of the clock signal clk is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period application_number US 6371805 A description fig1 shows a shift register circuit 1 according to an embodiment of the invention the shift register circuit 1 is made up of a plurality of latch circuits lata latb having the arrangement shown in fig2 and 27 a plurality of logical or circuits or and a plurality of switches asw the foremost latch circuit of the shift register circuit 1 shown in fig1 may be either a latch circuit lata or a latch circuit latb and this is determined depending on an input clock signal it is controlled by the logical or circuits or and the switches asw whether or not clock signals clk clk are input to the latch circuits lata latb for example a logical or circuit or belonging to one unit 2 receives a signal output from a latch circuit of a preceding stage to a.