code generators it should be understood that the present invention can be used to produce a gray code counter with any number of bits counter 10 is preferably formed as a single integrated circuit with a clock input 12 a clear input 14 and an output enable input 16 the present invention advantageously requires only a single clock input 12 a single clock input reduces the amount of noise from the clock signal and also improves the reliability of the gray code counter 10 of the present invention because the need to interconnect the clock signal to several devices is eliminated counter 10 also produces a plurality of outputs 20 29 including a toggle bit a 20 and nine bits of a gray code count from the least significant bit q0 21 to the most significant bit q8 29 table i shows a comparison of the decimal code the five least significant bits of binary code the five least significant bits of gray code and the toggle bit the present invention produces gray code in which only one output transitions between each count the counter 10 also outputs the toggle bit a with the states as shown in table i table i______________________________________decimal binary code gray code toggle bitcode b4 b3 b2 b1 b0 q4 q3 q2 q1 q0 a______________________________________0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0 1 0.