a u201c 0 u201d flip flop ff 1 starts at 0 and the feedback from ff 1 to or gate 66 allows the signal of or gate 65 to pass to the input of ff 1 therefore as long as gate 65 is at u201c 0 u201d ff 1 remains at u201c 0 u201d on the occurrence of the first mismatch between a bit applied by bit extractor 52 and a bit applied by register 56 the u201c 1 u201d output of exclusive or gate 65 passes through or gate 66 sets ff 1 and ff 1 is locked in the set u201c 1 u201d by operation of the feedback loop through or gate 66 thus a u201c 1 u201d output of ff 1 at the end of a test designates an inequality and its complemented output the q output of the flip flop can be used to indicate a firing assertion it may be noted that the reference bit string may also be generated from another bit extractor or another bit extractor output which allows the comparison to be done between two functional registers of core 20 or of different cores whose contents may change dynamically during operation using the nomenclature employed above and adding the designator b t for a bit delivered by register 56 at time t the relationships in fig5 are as follows fig6 presents a circuit that not only checks an assertion of equality but also provides an indication as to whether a tested number that exits bit extractor 52 in a most significant bit first order is greater than or less than a reference number that is stored in register 56 likewise in a most significant bit first order this circuit is.