2 5v is provided for a positive supply voltage of 3 3v which reduces the pin diode 107 capacitance referring to fig2 an elevated front end tia eftia 200 in accordance with an embodiment of the invention is shown the eftia 200 is preferably formed in an integrated semiconductor substrate using a bicmos process furthermore the eftia 200 is preferably intended to operate for receiving photocurrent from a photodiode 220 for receiving optical signal having data rates that are in the order of 10 gbit s electrical power is provided to the eftia using a first supply voltage input port 200 a for receiving a first voltage supply and a second supply voltage input port 200 b coupled to a second voltage supply preferably the second voltage supply is at a ground potential and the first voltage supply is at a positive potential for the eftia an input stage 201 is provided that includes an input transistor q 1 202 having its base terminal coupled to an eftia input port 201 a the photodiode 220 preferably has its anode coupled to the eftia input port 201 a a base terminal of the input transistor 202 and its cathode coupled to the first supply voltage input port 200 a the input transistor q 1 202 and a second transistor q 2 203 form a long.