gate of the eanvm cell each programming cycle increases the voltage threshold and as a result decreases the conductance of the memory cell 102 after each internal program cycle is complete as indicated by signal line 210 going u201c high u201d the program voltages are removed via the program voltage switch 220 and a verify cycle begins the voltage threshold of memory cell 102 is then determined by using the comparator 202 to compare the bit line voltage at terminal 168 with the selected verify reference voltage from the verify reference voltage select circuit 222 when the bit line voltage exceeds that supplied by the verify reference voltage select circuit 222 the output signal 204 from the comparator 202 will then disable the program voltage switch 220 ending the programming cycle for this embodiment of the invention during a write operation comparison of the current memory cell analog contents with the analog information to be programmed on the memory cell 102 is performed by the analog comparator 202 the verify reference voltage select circuit 222 analog output voltage x is determined by decoding the output of the n bit input latch buffer 224 n 2in the illustrative form the y input signal to the analog.