release controller then generates a controlling signal for forcing the release of vacuum in the suction head subsequently this controlling signal together with the conventional first control signal s c control the opening and the closing of the vacuum solenoid valve 250 hence the sequence of actions for releasing or holding a vacuum in the suction head is prescribed fig6 is a circuit diagram of a vacuum release controller 500 the vacuum release controller 500 includes a first signal delaying circuit 510 a second signal delaying circuit 520 a timing control circuit 530 and an opto isolated electronic switching circuit 540 the first signal delaying circuit 510 delays the rising edge of the first sensor signal s start from the first sensor 200 for a first prescribed period which is the arithmetic difference between time t3 and t2 as shown in fig4 therefore properly delayed signal can be output to match the varying speeds of different fetch arms and thus ensuring the release of vacuum before the wafer enters the cassette holder the second signal delaying circuit 520 delays the falling edge of the second sensor signal s stop from the second sensor 210 for a second prescribed period which is the arithmatic difference between time t5 and t4 as shown in fig4 therefore a vacuum release stage will not cease before the fetch arm has stopped at time t4 the timing control circuit 530 is preferably a d type flip flop u2b the d type flip flop uses the output signal s start sbsb delay as shown in.