is very difficult to list all conditions that violate rll codes by using a table therefore to design an nrzi error correction circuit the invention applies the viterbi algorithm in prml systems to full response read channels with reference to fig4 the invention adds an error correction circuit with rll codes 5 between a sampler 4 and an efm plus demodulator 7 to correct errors in the nrzi signals in one embodiment of the invention the error correction circuit corrects random errors in the nrzi signals according to the rll constraint d 2 thus if the input signals in the full response read channels are completely unstructured there are 8 possible channel states namely s000 s0001 s0010 s011 s100 s101 s110 and s111 two states s010 and s101 are not allowed in the full response read channels with rll constraint d 2 thus there are only six possible channel states in the full response read channels as shown in fig5 when the reference amplitude is zero 0 under the rll codes with constraint d 2 state s000 is kept invariant state s100 transits to state s000 state s110 transits to state s100 and state s111 transits to state s110 on the other hand when the reference amplitude is one 1 state s111 is kept invariant state s0111 transits to state s111 state s0001 transits to state s011 and state s000 transits to state s001 0031 fig6 is a tellis diagram of fig5 the state at time t is transited to the next state at time t 1 according to a reference amplitude 0 or 1 the following paragraphs further explain.