p on connection 236 and receives the correction voltage vcorr on connection 242 the output of the nor gate 801 on connection 802 is provided to a current source 803 the battery voltage vbatt is also provided to the current source 803 on connection 128 the ramp detect signal ramp_det is provided over connection 234 to a one shot element 804 the one shot element 804 is responsive to the first rising edge of the ramp_det signal on connection 234 and will not respond to any additional transitions of the ramp_det signal until it is reset the output of the one shot element 804 is provided over connection 806 as a first input to a logic gate 814 the logic gate 814 can be implemented using a nor gate the negative timer signal timer n is provided over connection 238 to a one shot element 808 the one shot element 808 is responsive to the first rising edge of the timer n signal on connection 238 and will not respond to any additional transitions of the timer n signal until it is reset the output of the one shot element 808 on connection 812 is provided as the other input to the nor gate 814 the output of the nor gate 814 on connection 816 is provided to the gate terminal of a transistor 818 the source.