dq is in a normal write mode the number of bits corresponding to the number of dq 39 s are written at the same time on a x16 device a device having 16 subarrays for example the chip logic begins writing one bit of data onto each of the 16 dq 39 s at the falling edge of cas or we whichever is later as long as ras is low during a normal write the status of we is a 34 don 39 t care 34 when ras initially goes low the address signals ras and cas then toggle to select the proper address to be written to and the desired data is input through the data in din signals during a write per bit also called a 34 masked write 34 any combination or even all of the 16 bits can be written to without writing to any of the other locations to set up a write per bit signal we goes low next the data for the 34 mask 34 is set on the dq 39 s with a logic 1 corresponding to 34 write 34 and a logic 0 corresponding to a 34 don 39 t write 34 the mask data simply indicates which of the locations are to be written and which are to be left unaltered after the data for the mask is set ras drops and the mask information on the data lines is changed to the desired data to be written to the selected locations finally when cas is pulled low.