memory modules 120 a 120 c in the discussions that follow elements designated by a number followed by a letter may be referred to collectively using the number alone for example memory modules 120 a 120 c may be referred to collectively as memory modules 120 in the illustrated embodiment host 110 may be a processor that includes a memory controller 115 in an alternative embodiment a processor and a memory controller may be separate elements of host 110 in one embodiment each of memory modules 120 may be a fully buffered dual inline memory module fb dimm that includes a respective buffer 130 a 130 c each of buffers 130 may provide an interface between an array of memory chips and other fb dimms or host 110 within system 100 for example memory module 120 a may include memory chips 161 a 164 a etc in one embodiment memory chips 161 a 164 a etc may be dram devices the jedec solid state technology association has published a draft specification for fb dimms the jedec fb dimm specification includes descriptions of the operation of a compliant memory module including the characteristics of buffers the memory devices that populate memory modules and the interconnection architecture of fb dimms in a memory system for example buffers 130 may comply with an advanced memory buffer amb specification that is included in the fb dimm specification another aspect of the current fb dimm specification requires that an fb dimm compliant memory module may be populated with double data rate 2 synchronous dynamic random access memory ddrii sdram devices alternatively.