includes a number of isolation strips is that contact the channel strips cs array 300 also includes a number of gate strips g that contact the isolation strips is a p body contact region b that contacts semiconductor material sm and a number of contacts cn that are connected to the source strips s the drain strips d and the body contact region b in the present example all of the contacts cn connected to all of the drain strips d are electrically connected to an output pad in accordance with the present invention transistor array 300 also includes a localized region 310 that contacts a first channel strip cs 1 and a second channel strip cs 2 as shown in fig3 localized region 310 includes a first isolation region 312 and a second isolation region 314 first isolation region 312 contacts semiconductor material sm and extends from first channel strip cs 1 to second channel strip cs 2 second isolation region 314 also contacts semiconductor material sm and extends from first channel strip cs 1 to second channel strip cs 2 as further shown in fig3 localized region 310 includes an esd region 316 that contacts semiconductor material sm a portion of first channel strip cs 1 and a portion of second channel strip cs 2 esd region 316 lies between and contacts the first and second isolation regions.