pattern 25 1 a hard mask nitride film pattern 27 1 and a buffer layer pattern 29 1 the selective etching process comprises a plasma etching process using a chlorine gas as a source such as ccl 4 or cl 2 to have a high selectivity to a gate oxide film a oxide film spacer 30 is formed via lp cvd low pressure chemical vapor deposition method using teos tetraethoxysilicate glass film or silane sih 4 base oxide film as shown in fig2 c an interlayer insulating film 33 is formed on the whole surface of the resulting structure including the gate line 28 and the oxide film spacer 30 which are formed in fig2 b the interlayer insulating film is selected from a group consisting of doped oxide films having excellent filling characteristics such as a bpsg boron phosphosilicate glass film a psg phosphosilicate glass film a fsg fluorosilicate glass film a pe teos plasma enhanced tetraethoxysilicate glass film or a pe sih 4 plasma enhanced silane film an apl advanced planarization layer oxide film or a ald atomic layer deposition oxide film which are formed by a lp cvd method using h 2 o 2 and siren reaction source to have fluidity high density plasma oxide films such as hdp usg high density plasma undoped silicate glass oxide film hdp psg high density plasma phosphosilicate glass oxide film and mixtures thereof preferably the hdp oxide film is formed from a source selected from a group consisting of teos sih 4 sih n ch 3 m 0 u2266 n u2266 4 0 u2266 m u2266 4 n 2 n.