nmos regions 404 and 406 at step 324 an n implants is performed at step 326 a deep and heavy n type implant yields heavily doped n type source section 126 and heavily doped n type drain section 130 within core nmos region 404 as well as heavily doped n type source section 180 and heavily doped n type drain section 184 within output nmos region 406 as indicated in fig4 h the photoresist 412 is then removed and a new photoresist 414 is applied to pattern substrate 102 with pmos transistor regions 408 and 410 exposed at step 328 a deep and heavy p type implant yields heavily doped p type drain section 152 and heavily doped p type source section 156 within core pmos region 408 as well as heavily doped p type drain section 200 and heavily doped p type source section 204 within output pmos region 410 as shown in fig4 i through polysilicon definition interconnect 220 is electrically connected to gates 172 and 192 of output transistors 112 and 114 as a result the final structure fabricated through method 300 is formed as shown in fig1 while the steps of method 300 were described in a particular order those skilled in the art would recognize that some steps can be reordered or modified to yield the same or similar structure for example the order of p type implants and n type implants in method 300 is reversible some of these variations were indicated in the description above while the above description emphasizes output transistors it should be pointed out that other input output transistors including input transistors and input output transistors are preferably formed without punch through implants the present invention requires that the core transistors have punch through implants.