until when the count reaches the down threshold value nd and the output signal det is then de asserted becomes low in this embodiment for example at the time labeled as 64 it is observed that in this embodiment the count is optionally reset to the down limit value ndt as shown in 509 fig5 the reset described above can be achieved by a set reset circuit 36 of the present apparatus fig3 fig7 shows a schematic diagram of an apparatus for recovering an information signal corrupted by noise wherein the same numerals are used as in the corresponding diagram of fig3 the counter 30 includes a conventionally three stage up down counter it is appreciated that number of the stage is not limited to that in the present specific embodiment at the beginning the level of the output signal det of the determining circuit 32 remains at low i e det 0 before the presence of the incoming signal idet is detected the counter 30 counts from q 1 3 u2018 000 u2019 which is also used as the down limit value when the active signal idet is present i e idet 1 the counter 30 continuously counts up toward the up threshold value otherwise the counter 30 counts down toward the down limit value the limit controller 34 decides whether the count of the counter 30 reaches the down limit value by using for example a decoder 340 thereby preventing the counter.