memory 2001 is associated with the packet to be transmitted to the network via output circuit 2005 output circuit 2005 accesses and transmits data from memory 2001 at an 8 mbs rate upon the start of the transmission of a packet by output circuit 2005 to switching node 1000 15 output circuit 2005 froms network packets similar to those shown in fig9 in order to assemble network packets output circuit 2005 must extract the contents of network address field from the address field of the original packet such as shown in fig7 and calculate the nework packet length field in addition output circuit 2005 must calculate a new crc field and a start bit output circuit 2005 does this in a serial manner and does not buffer an entire packet before transmitting it via conductor 133 to switching node 1000 15 input circuit 2006 receives packets from switching node 1002 15 via conductor 132 input circuit 2006 forms this data into bytes and requests that each byte be written by transmitting the data and write request signal via data bus 2013 and control bus 2014 respectively to address control 2004 address control 2004 writes this information into memory 2001 utilizing memory address bus 2017 memory data bus 2015 and memory control bus 2016 packets are written into the transmit buffer if they are to be retransmitted on trunk 118 or into the switch test buffer if they are to be retransmitted to network 116 input circuit 2006 uses the network packet length field to determine when an entire packet has been stored in memory 2001 when an entire packet has been stored in memory 2001 input circuit 2006 transmits via control bus.