only in the lower layer portion in the area positioned within the n well region nw and p well region pw of the composition of the polysilicon wiring layers pl 110 and pl 120 the forming method of the gate insulating film is same as explained in the second embodiment and its explanation is omitted herein in fig1 the insulating film of high permittivity material is formed in the portion of region e 5 as explained herein according to the semiconductor memory device of the sixth embodiment also in the 2 port sram memory cell composed by using load transistors having the gate connected to the memory nodes na and nb of the sram memory cell in all of the load transistors and drive transistors by using the high permittivity material as the gate insulating film the same effects as in the second embodiment are obtained according to the invention as explained above by using a material of a high dielectric constant in the gate insulating film of load transistors contributing to capacity of memory nodes the capacity of the memory nodes can be increased and the critical charge amount is increased so that the resistance to soft errors can be enhanced furthermore by using a material of a high dielectric constant in the gate insulating film of drive transistors contributing to capacity of memory nodes in addition to the gate insulating film of load transistors contributing to capacity of memory nodes the capacity of the memory nodes can be increased and the critical charge amount is further increased so that the resistance to soft errors can be enhanced moreover in the layout of electrically connecting the gates of the load transistors and the gates of the drive transistors through a common electrode wiring layer the same effects as above.