450 u00b0 c next process gas comprised of co 2 and silane with preferable carrier gas ar or he mixed in a preferred ratio of 0 05 u02dc 0 2 process gas carrier gas is introduced into the chamber flowrate of the process gas is preferably controlled at 200 sccm u02dc 1 slm at this time working pressure is preferably in the range of 2 5 u02dc 10 torr then chemical vapor deposition such as plasma enhanced chemical vapor deposition pecvd electron cyclotron resonance chemical vapor deposition ecrcvd and inductor coupling plasma chemical vapor deposition icpcvd is adopted to deposit a layer of amino free low k material 110 process gas at this stage is decomposed and deposited on the semiconductor substrate 100 to form the low k material layer 110 a via 112 is then formed by lithography as shown in fig2 a next in fig2 b a photoresist layer 114 is formed on the intermetal dielectric layer 110 which fills the via 112 the photoresist layer 114 is then patterned to form an opening 116 wherein partial surface of the intermetal dielectric layer 110 and the top surface of the via are exposed as shown in fig2 c next in fig2 d the exposed intermetal dielectric layer is etched away to form a trench 118 on top of the via 112 which is filled by the photoresist layer 114 the remaining photoresist layer 114 is then removed as shown in fig2 e wherein the trench 118 and via 112 are formed copper is then used to fill the trench 118 and via 112 to form a dual damascene 120 as shown in fig2 f according to the method provided in the present invention amino free.