this random nature of charging and discharging the filter capacitor noise results in the reference input voltage signal r pi which is shown as the signal labeled 1 in the graph of fig2 this low frequency noise on the filtered reference degrades the snr performance of the adc the sigma delta adc having an improved reference multiplexer as shown in fig6 and 7 in accordance with the present invention which eliminates noise fig6 illustrates the first sub circuit portion of the reference multiplexer in accordance with the present invention clock signal input u03c6 1 is fed into inverter 102 to control when both lines of the multiplexer output r mo and r po are both connected to the minus voltage reference r mi input signal in p connects to inverter 104 the output of inverters 102 and 104 couple into nand gate 110 the output of inverter 104 feeds into inverter 108 to provide input for nand gate 112 along with the output of inverter 102 nand gate 110 supplies output to a first cross coupled nand gate pair 116 and 118 nand gate 112 supplies output to a second cross coupled nand gate pair 132 and 134 these two pairs are to provide the three modes of operation which will be discussed the first cross coupled pair 116 and 118 include inverters 120 122 124 126 and 128 coupled to form nodes b d and sbit the second cross coupled pair 132 and.