signal forces the content of the 16 bit latch 50 to when decoded cause another jump to a memory location in the main memory 12 wherein is stored the coding for a reset routine in addition to the 16 bit instruction from the latch 50 the instruction decode circuit 52 also receives an i 0 signal from the i register as will be seen the i register at times will operate an index register to keep track of the number of iterations performed in response to certain instructions the i 0 signal notifies the instruction decode circuit 52 when the appropriate number of iterations has been reached so that the next instruction can be accessed from the main memory 12 the carry out co t 0 signals are developed by the alu the co signal is indicative of overflow conditions or a negative result while the t 0 signal is useful to test for the completion of certain arithmetic operations as will be discussed below turning now to fig4 there is illustrated in greater detail the address multiplexer a and program counter p shown in combined form to illustrate their interrelation as shown the address multiplexer a comprises a multiplex circuit.