13 identifies a 90 u00b0 phase shifter reference numeral 14 denotes a baseband processing circuit employing a well known costas circuit see e g gardner phaselock techniques john wiley amp sons pp 217 225 2d ed 1979 reference numeral 70 denotes a loop filter reference numeral 60 denotes an adder reference numerals 15 and 16 identify decision circuits reference numeral 300 denotes an error correction circuit as an example of the signal processing circuit reference numeral 40 denotes an asynchronous condition decision circuit and reference numeral 50 denotes a sweep signal generator the recovered carrier provided by the voltage controlled oscillator 20 is applied to the phase detectors 11 and 12 with a phase difference of 90 u00b0 due to the phase shifter 13 as a result the phases of the received signal are detected for demodulation the demodulated signal is then applied to the baseband processing circuit 14 which provides a phase error signal to the loop filter 70 the frequency and phase error signal thus functions as the control voltage of voltage controlled oscillator 20 applied through the adder 60 the phase of the recovered carrier is therefore controlled following frequency variation of the input signal the decision circuits 15 and 16 decide and set levels of the demodulated signal based upon recovery timing of bits in the demodulated signal i e.