output binary 0 repair machine 26 comprises repair logic 32 and a repair register 34 the repair register holds a value indicating which column of cells if any in array 22 is to be selected for replacement using the redundant column at start up of memory unit 20 repair register 34 is set to some initial value so that one column of array 22 is unused if bist circuit 24 outputs a u201c pass u201d result the repair register value is unchanged if a bist failure occurs however repair logic 32 sets a new value in repair register 34 and then prompts the bist circuit to repeat the self test details of this process are described below with reference to fig4 it continues until the repair logic has set a value in the repair register that causes bist circuit 24 to return a u201c pass u201d result or until all possible values of the repair register have been tested once the bist circuit has given a u201c pass u201d output normal operation of memory unit 20 can proceed using the current setting in the repair register 0038 fig2 is a block diagram that schematically shows details of memory array 22 in accordance with a preferred embodiment of the present invention array 22 is built around a matrix 35 of memory cells 36 matrix 35 is.