inv6 resulting in a signal prb which is input to gates of the n channel transistors m16 m17 and m18 parasitic capacitances between the gates of the n channel transistors m16 and m17 and the read bus lines rbt1 and rbb1 are depicted by c15 and c16 respectively a parasitic capacitance between the gate of the n channel transistor m18 and the read bus line rbt1 is depicted by c17 and a parasitic capacitance between the gate of the n channel transistor m18 and the read bus line rbb1 is depicted by c18 the parasitic capacitances of the n channel transistors m16 m17 and m18 are determined such that the following equation 1 is satisfied where c13 and c14 are parasitic capacitances between the gates of the n channel transistors m14 and m15 and the read bus lines rbt1 and rbb1 respectively the simplest way for controlling a parasitic capacitance of a transistor is to control the channel length l or the channel width w thereof since it is preferable in view of the fabrication of transistor to make the channel length constant the parasitic capacitances of the transistors are preferably controlled by changing the value of w thereof in this embodiment the equation 1 can be.