pass filter lpf 22 at which the same is transformed to a sinusoidal subcarrier signal of 38 khz the output signal of the low pass filter 22 is applied to a limiter 23 to form a pulse signal to be applied to the divider 17 for producing the signal of 19 khz applied to the phase comparator 16 the sinusoidal subcarrier signal being synchronized with the stereo pilot signal is thus accurately produced referring to fig8 the second embodiment of the present invention will be described the second embodiment features means for adding a constant dc component voltage v to inputs of the multiplication circuits 2 and 3 and the adder 9 and 10 add only the output signals of multiplication circuits 2 and 5 3 and 6 respectively the operation of the second embodiment is mathematically described as hereinunder the output signal a 39 t of the multiplication circuit 2 is expressed as follows equ7 similarly the output signal b 39 t of the multiplication circuit 5 is expressed as follows equ8 therefore the output signal of the adder 9 is as follows equ9 similar to the previous embodiment the term 2 u03b1s t sin 2 u03c9 s t can be rewritten as follows equ10 thus the constant component of the subcarrier is cancelled and the output signal r 34 t of the low pass filter 14 is as follows in which if the magnitude of the dc voltage v is 1 as shown by the equation 8 the right signal is reproduced at the output of the low pass filter 14 turning to fig9 the third embodiment according to the present invention will be described hereinunder the third embodiment features that a positive dc voltage v is applied to inputs of the multiplication circuits 2 and.