bit circuit these bit circuits 17 are coupled for reception with the operation results via signal line 18 a clock signal via signal line 21 and a control signal for setting a signature value via signal line 22 these bit circuits output a first operation input bus output signal via signal line 19 and a second operation input bus output signal via signal line 20 fig3 shows a detailed arrangement of each bit circuit in the signature register 17 in fig2 in fig3 like reference symbols are used for like or equivalent portions in fig2 in the figure reference numeral 25 designates a latch circuit for latching a signature value signature latch circuit a signature calculation input signal is input to the d terminal of latch circuit 25 via two exclusive or circuits or21 and or22 exclusive or circuit or21 is coupled at the first input terminal with the signature calculation input signal via signal line 23 and at the second input terminal with a signature value set control signal via signal line 22 the output signal of exclusive or circuit or21 is input to the first input terminal of exclusive or circuit or22 the operation result input signal is input to the second.