reading c varies between 0 u2062 u2062 u2026 u2062 u2062 n ts 2 1 with the aid of an addressing function f s u c and in a manner dependent thereon the upper state s u of the butterfly pair respectively corresponding to the instantaneous counter reading c is determined with the aid of an addressing function f addr s u i and in a manner dependent on the determined upper state s u and the respective present iteration number i the suitable memory address is determined in the case where the path metrics of a plurality of processor elements are to be combined the counter reading of the counter must vary between 0 u2062 u2062 u2026 u2062 u2062 n ts 2 ic u2062 n pe 1 where n pe corresponds to the number of processor elements and ld x corresponds to the expression log 2 x the function f s u c is nonlinear it can be shown that this function can be realized in the form of a simple bit mapping as is shown in fig2 where msb designates the most significant bit and lsb designates the least significant bit the addressing function f addr s u i can be described on the basis of the properties of a feedforward trellis coder by the following relationship addr 2 l u00b7 s u mod m t u2212.