alternatives next the method performs a planarization process step 270 in a preferred embodiment the method performs a chemical mechanical planarization process on the polysilicon material the method continues the chemical mechanical planarization process to remove the interlayer dielectric material and the polysilicon film material until the cap nitride layer on each of the word line device structures has been exposed preferably the polysilicon fill material and the interlayer dielectric material are simultaneously removed the method uses the cap nitride layer overlying each of the device structures as a polish stop layer of course there can be other variations modifications and alternatives fig9 is a simplified cross sectional view diagram of device structure 900 illustrating a method for making an integrated circuit device including lpc structures according to an embodiment of the present invention this diagram is merely an example which should not unduly limit the scope of the claims herein as shown after the cmp process nitride cap layer 920 and insulator layer 950 have been planarized landing polysilicon contact structures 930 and 940 have been formed in a specific embodiment self aligned lpcs 930 and 940 are separated by nitride capped word lines in an alternative embodiments the landing polysilicon contact structures can be separated by nitride capped dummy patterns of course one of ordinary skill in the art would recognize other variations modifications.