and the ninth and tenth transistors q19 q20 are turned off because the seventh and eighth transistors q17 q18 are turned on the currents ia ib of the constant current sources io12 io13 flow in the resistors r15 r17 respectively there is a consequent voltage drop at these resistors r15 r17 and the base voltage of the first and second transistors q11 q12 of the first differential amplifier circuit da1 drops the first and second transistors q11 q12 are therefore turned off so the first differential amplifier circuit da1 is turned off on the other hand because the ninth and tenth transistors q19 q20 are turned off the base voltage of the third and fourth transistors q13 q14 of the second differential amplifier circuit da2 does not drop and accordingly the third and fourth transistors q13 q14 i e the second differential amplifier circuit da2 is turned on in this manner the seventh to tenth transistors q17 q20 perform a switching operation in response to the voltage level of the carrier signal sb so that the two differential amplifier circuits da1 and da2 are selectively turned on and off as was stated earlier the node of the collectors of the first and fourth transistors q11 q14 which output the first and fourth differentially amplified signals is connected to the output terminal o11 accordingly when the first differential amplifier circuit is on the output terminal o11 outputs the first differentially amplified signal sa1 sa2 and when the second differential amplifier circuit is on a fourth differentially amplified signal sa2 sa1 is output so opposing phase differentially amplified signals are alternately output from the output terminal o11 in response to the level of the carrier signal sb i e a multiplied signal of signals sb and sa.