thus the instruction movz wr10 r2 would encode as 0a52h it should be understood that the specifics of the instructions set forth in this description and fig2 and 3 including how they cause the microcontroller they are running on to operate are not important to an understanding of the invention and the specific information provided herein is for the purpose of showing how in one particular embodiment of the invention the same opcode can function as two instructions depending on a user selectable option as previously noted the signal used to switch between the two modes of operation referred to herein as source mode and binary mode is initialized based upon a user input for example in the architecture shown in fig1 a signal placed on i o ports 37 can be used to indicate whether the microcontroller is to be configured in source mode or binary mode at system start up the bus interface unit receives this signal from the memory data bus and stores the signal value i e 0 or 1 in a memory such as an eprom the value stored in the eprom is passed to the instruction sequencer over the instruction bus during system initialization as the cfg_src signal referring now to fig4 upon receiving the cfg_src signal previously stored in a memory such as eprom 45 from the bus interface unit 29 the signal is latched in latch 47 forming a bit src_md within instruction sequencer 13 which is set or reset and as instructions are decoded by instruction sequencer 13 into micro instructions which control the operation of cpu 11 the state of the src_md bit is used to.