of the serial interface a data recovery circuit is used to decode the data transmitted by the transmitter circuit in one embodiment voltages across termination resistors 406 a b in transmitter circuit 400 are monitored to detect state transitions for example signals similar to signals a gt b 308 b gt c 310 and c gt a 312 of fig3 are generated whereby at any time exactly one of these signals is high indicating the current encoding state fig6 illustrates an example data recovery circuit 600 which can be used to decode data transmitted according to a three phase modulation data encoding scheme other data recovery circuit implementation can also be used as would be understood by a person skilled in the art based on the teachings herein data recovery circuit 600 includes first second and third layers 610 624 and 638 of d flip flops and a multiplexer circuit 646 data recovery circuit 600 receives input signals a to b 602 b to c 604 and c to a 606 at any time exactly one of signals 602 604 and 606 is high indicating the current encoding state being transmitted signals 602 604 and 606 are input respectively into first layer d flip flops 612 614 and 616 first layer d flip flops 612 614 and 616 capture the most recent state transition as indicated by signals 602 604 and 606 note that each of d flip flops 612 614 and 616 has its d data input coupled to a logic 1.