alternatively connected to their respective bit lines bl 1 and bl 2 also when data 1 1 1 1 are coded in four adjacent bit cells selected by the second word line wl 2 the sources of the second and fourth cell transistor n 62 and n 64 are all floated or alternatively connected to their respective bit lines bl 1 and bl 2 the floated sources of the first through fourth cell transistors n 62 through n 64 may function as an antenna thus causing noise thus as described above alternatively the sources of the first and second cell transistors n 61 and n 62 can be connected to the first bit line bl 1 and the sources of the third and fourth cell transistors n 63 and n 64 can be connected to the second bit lines bl 2 the operations of the two column memory cells of a metal programmable rom shown in fig6 through 8 are based on the same principle as that of the one column memory cell in fig3 therefore a detailed explanation thereof will be omitted here however as will be appreciated by one of skill in the art in light of the present disclosure the selective connection of the transistors of the bit cells may be made to provide any desired combination of bits coded into the bit cells in the above described memory cell structures of a metal programmable rom according to the present invention one cell transistor is shared both by two adjacent bit cells selected by the same word line and thus may have the same level of memory integration as in a diffusion programmable rom further a loaded capacitance of a bit line may be reduced over conventional metal programmable roms thereby enhancing reading speed and reducing.