holes 361 and 362 here a capacitor upper electrode 326 is formed which extends from any one electrode for example the source electrode 315 of the source drain electrodes 315 and 316 and at the same time a data line 304 and a power line 306 of fig3 a are also formed thereafter a passivation layer 370 is formed on the interlayer insulating layer 360 the passivation layer 370 is etched to expose a portion of the other electrode for example the drain electrode 316 of the source drain electrodes 315 and 316 thus forming a contact hole 371 for a pixel electrode then a transparent conductive layer is deposited on the passivation layer 370 in an emission region 330 and is patterned to form a lower electrode 331 contacting with the drain electrode 316 through the contact hole 371 for the pixel electrode now steps for forming the lower electrode 331 of fig3 a are illustrated through fig3 c to 3e fig3 c is a perspective view showing a whole shape of the lower electrode 331 fig3 d is a plan view of the lower electrode 331 and fig3 e is a cross sectional view taken along the line v v of fig3 d as shown in fig3 c to 3e it can be understood that the upper surface 331 a of the lower electrode 331 has a rectangular.