extractor for recovering clock signals and data from the received ds3 channel and for detecting out of frame conditions it also includes control circuitry for dropping data to and inserting data from the low speed port the add drop multiplexing circuitry in each node permits time slot reuse as depicted in fig6 in which the add drop multiplexing circuitry of node 2 is shown passing through eighteen ds1 channels of a possible twenty eight ds1 channels in a ds3 link while dropping ten ds1 channels and adding six ds1 channels in the easterly direction through the low speed port 22 and dropping six ds1 channels and adding ten ds1 channels in the westerly direction in the easterly direction six of the ten dropped channels are reused and in the westerly direction all six of the dropped channels are reused with reference to fig1 for example if communication between a local terminal at node 2 and a local terminal at node 3 takes place over a given channel the same channel may be reused for communication between another terminal at node 3 and a terminal at node 5 each of the nodes also has east and west protection interfaces the east protection interface for node 2 being indicated at 26 and the west protection interface for node 2 being indicated at 28 these east and west protection interfaces are high speed interface modules similar to the working interface modules the west protection interface 28 is connected through a standby transmission link 30 typically a pair of optical fibers to the east protection interface 32 of node 3 the west protection interface of each node is similarly connected by a standby transmission link to the east protection interface of the node immediately.