present invention disclosing an inverted thin film resistor package 1 can be understood substrate dielectric layer 10 is of conventional materials and conventionally formed the material and thickness selected to be suitable for the final intended device package depending on the particular application other device components may exist below dielectric layer 10 advantageously the method of the present invention may be utilized independent of topography underlying dielectric layer 10 after forming dielectric layer 10 e g by deposition upper surface 15 is completely planarized due to the absence of components at upper surface 15 the planarization may be accomplished without the use of complex equipment and without the requirement for precise depth control of individual regions trenching dielectric layer 10 through planarized upper surface 15 defines a resistor contact path not shown in profile fig3 the trenching depth and range are selected so that resistor contact trench regions 20 of a desired depth and width result and offer a location for metal interconnect to reside interconnect metal is deposited into trench regions 20 interconnect metal such as tungsten copper titanium tungsten alloy and aluminum are suitable interconnect metal deposited into trench regions 20 serve as resistor leads and contact regions 25 resistor leads and contact regions 25 are made coplanar with dielectric layer 10 by metal etchback or cmp process planarization in an alternative embodiment of the invention resistor leads and contact regions 25 may be etched back to a level below upper surface 15 overlaying resistor material on contact regions 25 forms an enhanced current junction between the final resistor body and the lead and contact 25 resistor material overlaying dielectric layer 10 forms a resistive body 30 selectively shaping the resistive body forms.