a programmable number of memory pages may be simultaneously maintained in the open state the number of pages so maintained may be a function of the total number of banks in the memory a user specified value the type of processing performed by the computer system or it may dynamically and automatically change during the course of system operations memory access operations in accordance with the invention may provide improved memory system performance for those entities software and hardware issuing localized memory requests by keeping one or more pages to which the localized memory requests are directed in an open state memory access techniques in accordance with the invention may also close those pages that are not experiencing localized access requests 0016 fig2 shows computer system 200 having a banked memory architecture in accordance with one embodiment of the invention as shown computer system 200 includes host processor 202 coupled to processor bus 204 which in turn is coupled to primary bus 206 through bridge circuit 208 host processor 202 may be any type of general or special purpose processor including multiple processors processor bus 204 may be any type of communication channel suitable for coupling host processor 202 to other.