2 2 n 1 ue89e y 3 n 1 ue89e c 3 2 n 2 ue89e y 3 n 2 ue89e c 3 u2026 2 ue89e y 3 1 ue89e c 3 y 3 0 ue89e c 3 ue89e ue89e y 0 0 ue89e c 0 y 1 0 ue89e c 1 y 2 0 ue89e c 2 y 3 0 ue89e c 3 2 ue89e y 0 1 ue89e c 0 y 1 1 ue89e c 1 y 2 1 ue89e c 2 y 3 1 ue89e c 3 ue89e ue89e u2026 2 n 2 ue89e y 0 n 2 ue89e c 0 y 1 n 2 ue89e c 1 y 2 n 2 ue89e c 2 y 3 n 2 ue89e c 3 2 n 1 ue89e y 0 n 1 ue89e c 0 y 1 n 1 ue89e c 1 y 2 n 1 ue89e c 2 y 3 n 1 ue89e c 3 eq ue89e 8 u2211 i 0 3 ue89e ue89e y i k ue89e c i are calculated for all the possible case of y y i k and stored in the rom the value of 2 k ue89e u2211 i 0 3 ue89e ue89e y i k ue89e c i can be obtained easily a desired value can be obtained finally by performing the repeatedly by a predetermined number a circuit for obtaining the value of eq 8 in shown in fig5 and will be described in detail hereinafter referring back to fig2 a discrete cosine transform dct apparatus in accordance with the present invention includes a multiplexer mux 201 for selecting one of the external input and the input from a transposition memory 232 a serial to parallel converter 202 for converting serial.