channel embodiment to the drain of transistor 94 with both nodes 80 and 84 of first and second inverters 74 76 upon activation of an n sense control signal 50 transistor 94 completes the circuit between level shifting pull up circuit 86 differential cross coupled inverter circuit 72 and pull down circuit 92 such a completion of the circuit enables first and second differential data inputs 42 and 44 which occur at a first voltage level namely the range as defined by regulated power 34 to be sensed by sense amplifier 32 and to be output by first and second differential data outputs 52 and 54 at a second voltage range namely the voltage range as defined by a level of external power 36 by way of review the discussion thus far with regard to sense amplifier 32 has described first and second differential data inputs 42 and 44 as being received from a memory cell 26 or other similar data storage device and being received at sense amplifier 32 at signal levels corresponding to regulated power typically at a lower voltage range the regulated power level inputs are synchronously clocked or passed into the sensing portion of sense amplifier 32 by way of pass gates 56 and 58 as controlled by pass gate control signal 46 the passing of the input signal into corresponding nodes 60 and 62 within differential cross coupled inverter circuit 72 enables the charging of those nodes with respect to the differential polarity of the input signals in order to decouple or otherwise isolate the load associated with other supporting circuitry pass gate control signal 46 is deactivated thereby opening transistors 56 and 58 and further releasing the support circuitry such as memory cell 26 fig2 from.