operates to latch the signals transferred from the preamplifier 410 and then outputs the latched signals from the above disclosure it can be seen that the total biasing current inputted into the preamplifier 410 is the sum of the two biasing currents i 3 i 4 in other words if the currents i 3 and i 4 are the same for example they are both equal to the current i the present invention biasing circuit 430 can provide the current 21 to the preamplifier 410 in this way the current can be double it can have an equivalent effect of increasing the w l ratio of the transistor furthermore because the gate of the transistor m 2 is coupled to the common mode voltage level v cm such that it does not influence the parasitic capacitor of the transistor m 1 this means that the parasitic capacitor of the transistor m 1 does not become larger in other words the load of the previous stage in not increased and the operational frequency of the latch 400 is not limited in other words if the latch 400 needs to work in a high frequency and an additional biasing current is needed the present invention can.