carry interconnect circuitry this increased performance is traded for the flexibility of the programmable interconnects however the dedicated interconnect circuitry shown in fig1 is flexible in that the carry signals can be propagated in either of two directions through the array fig1 shows an interconnect structure which does not use dedicated interconnect circuitry for propagating signals in a choice of directions through an array fig1 shows only a partial set of memory cells and interconnects which would be needed in the interconnect structure for interconnecting logic blocks to form a multi bit adder or other multi bit function that uses carry logic according to fig1 output c 0 of logic block 11 2 can be connected to either logic block 11 1 or logic block 11 3 by turning on a corresponding transistor controlled by memory cell m11 2 which connects the output of logic block 11 2 to interconnect line 11 a if it is desired to connect output c 0 of logic block 11 2 to input c ib of logic block 11 1 memory cell m11 1 is programmed to turn on its corresponding transistor so that the signal on line 11 a will propagate to terminal c ib of block 11 1 if it is desired to connect output c 0 to logic block 11 3 memory cell m11 3 is turned on to connect interconnect line 11 a to input.