the rom cassette 13 mounted in place of the pmc ram board 8 the various parameter values are stored in a nonvolatile section of the common ram 6 by means of a manual data input section of the crt mdi 12 through the medium of the interface 11 and the bac 5 then the initial values of the various parameters set in the common ram 6 are transferred to the ram 9 by the cpu 7 of the pmc 2 this initialization system however is subject to a drawback when a large capacity is used to store the pmc parameters the initialization by manual input requires too much time therefore the present invention is designed so that the initial values of the pmc parameters are written in the rom cassette 13 when the contents of the memory unit of the pmc ram board 8 are written in the rom cassette 13 thus the initialization is performed using the initial values of the pmc parameters stored in the rom cassette 13 when the memory contents of the pmc ram board 8 are written in the rom cassette 13 after the end of the debugging process the cpu 7 of the pmc 2 performs the processing shown in fig3 first the initial.