any suitable method such as etching coining laser forming etc the cavity 22 of the pre encapsulated cavity frame 10 having the semiconductor device 30 located therein is filled with any suitable liquid encapsulant material underfill material etc to retain and environmentally seal the semiconductor device 20 in the cavity 22 forming an essentially planar lower surface 36 opposite the surface 24 of the pre encapsulated cavity interposer 10 at essentially the same level as that of the lower surface 18 of the second portion 16 of traces 12 referring to drawing fig2 b the pre encapsulated cavity frame 10 is illustrated in cross section having a flip chip type semiconductor device 30 attached to connection areas 15 which extend below the lower surface 20 u2032 of the encapsulant material 20 covering the lower surface 18 of the second portion 16 of the traces 12 having two or more grooves or recesses 15 u2032 therein of the first portions 14 of a leads 12 using two or more solder balls 32 or solder bumps solder stud bumps or gold stud bumps located between bond pads of the semiconductor device 30 and the connection areas 15 the two or more grooves or recesses 15 u2032 in the connection areas facilitate the location of the semiconductor device 30 in the cavity 22 in the proper location with respect to connection areas 15 using conventional semiconductor device attachment equipment the two or more grooves or recesses 15 u2032 may be formed having any suitable geometric shape and desired depth in the connections areas 15 by any suitable method such as etching coining laser forming etc the cavity 22 of the pre encapsulated cavity frame 10 having the semiconductor device 30 located therein is filled with any suitable liquid encapsulant.