2 bit data may be programmed at the first programming after the first programming on the 2 bit data is completed 3 bit data may be programmed at the second programming a 3 bit program operation is described using a 3 step programming manner 1 st pgm 2 nd pgm and 3 rd pgm however the inventive concept is not limited thereto for example a program operation of the inventive concept can be performed in a 2 step reprogramming manner a program operation executed in a reprogramming manner may be formed of 3 step programming that is executed such that a width of a threshold voltage distribution corresponding to a data value to be stored becomes narrow or fine fig2 is a block diagram schematically illustrating a memory system conceptually describing a program operation in fig1 referring to fig2 a memory system 10 may include a memory controller 110 and a nonvolatile memory device 120 with a program operation of the inventive concept data input to a buffer ram 112 of the memory system 10 may be first programmed in a single level cell slc buffer area 122 of the nonvolatile memory device 120 and thereafter first programming second programming and third programming may be sequentially performed on a multi level cell mcl user data area hereinafter referred to as a user data area 124 the buffer ram 112 may include a volatile memory device such as dram sram or the like in example embodiments the slc buffer area.