films psi which become the source and drain nsd of the n type tft and the lower capacitor electrode bd via the first metal film m 1 and the gate insulating film gi thereby obtaining the structure shown in fig3 c and 5b as the n type impurities phosphorus ions are accelerated to about 70 kev and implanted at a dose of about 1 u00d7 10 15 cm 2 after the resist is removed phosphorus which becomes the n type impurities is accelerated to about 80 kev and implanted at low concentration of a dose of about 1 u00d7 10 13 cm 2 then the low concentration n type region ldd is formed in the vicinity of each gate end of the n type tft thereby obtaining the structure shown in fig3 d and 5c subsequently the half tone mask hmk is used to form resist patterns having different thickness note that each of the resists used in this embodiment is a positive resist by which an exposed portion is removed the resist in the semitransparent region ht of the half tone mask hmk is half exposed to partially leave the resist thereby forming a thin film resist pattern tfr at the same time a resist pattern rst having a normal thickness is formed in an unexposed region corresponding to the opaque region bl thereby obtaining the structure shown in fig4 a next the resist.