higher levels the processor 310 transfers control over the bit stream decoder 260 to the macroblock decoder 350 and then the macroblock decoder 350 transfers control over bit size information and commands to the bit stream decoder 260 therefore multiplexing video decoding is concurrently executed with four independent tasks sharing one processor 310 and one macroblock decoder 350 for multiplexing video decoding four stacks 372 374 376 and 378 are multiplexed by a 2nd multiplexer 370 and the 2nd multiplexer 370 selects each stack according to an index value generated by the index register 380 the index register 380 includes 2 bits and increments the index value by 1 according to a latch signal generated from the processor 310 which designates cyclically each decoding task of the four channels in the order of 0 1 2 3 0 1 2 a decoding task of each channel has dedicated fifo memories 110 u02dc 140 and register banks 320 to store video parameters and program status of each channel in addition the input fifo memories 110 u02dc 140 and the register banks 320 are also switched when a task is switched contrary to usual stacks which have certain portions of a main memory the four stacks 372 374 376 and 378 are hardware registers and only store values of program counters pc if a task switching function is called from a decoding program of the processor 310 the corresponding task switching function is executed by enabling a write signal for a current pc value.