voltage level at the vssup node 40 vccup node 42 vssdn node 44 and vccdn node 46 are at certain levels relative to another specifically a vnd cell may be designed such that the voltage level of the vccup node 40 is below the voltage level of the vssdn node 42 thus when positive noise is detected vcc u2013 vss the voltage level of the vccup node 42 goes above that of the voltage level at the vssdn node 44 thereby causing the comparator to generate a trigger similarly the vnd cell may be designed so the voltage level of the vssup node 40 is below the voltage level of the vccdn node 46 therefore when negative noise is detected vcc u2013 vss the voltage level at the vccdn node 46 goes below that of the voltage level at vssup node 40 thus causing the comparator to generate a trigger therefore according to the present invention a voltage noise detector cell may detect a maximum overshoot noise and a minimum undershoot noise a voltage noise detector cell according to the present invention may be disabled when noise detection is not desired thus saving power and enabled when noise detection is desired further the voltage noise detection cell is not sensitive to process voltage or temperature variations and does not measure direct current dc voltage differential thus the vccup node 42 and the vssdn node 44 may be used for maximum vcc u2013 vss node noise detection and the vccdn node 46 and the vssup node 40 used for minimum vcc u2013 vss noise detection moreover although eight transistors switching devices are used in this example embodiment the present invention is not limited by this number of devices and any number of devices may be used.