at low level and the terminal in_n is at high level the terminal in_p of the second controlled inverter y 2 is at high level and terminal in_n is at low level as such the first controlled inverter y 1 is turned on and the second controlled inverter y 2 is turned off referring to the above description of the first driver stage it is easy to understand that after being turned on once after the first frame the third inverter y 3 and the first inverter y 1 form a locking loop to keep n 1 at high level the light emission control output terminal out maintains at low level and the output of the fourth inverter y 4 is at high level referring to fig5 and the above description for the first driver stage at this point outputs of the first and second scan output terminals out 1 and out 2 of the second driver stage are at high level similarly referring to fig5 and the above description for the first driver stage in the second and third time intervals t 2 and t 3 the output signal en 2 of the light emission control output terminal of the second driver stage is at high level output signals g 2 n and g 2 of the first and second scan output terminals out 1 and out 2 of the second driver stage are respectively the second scan timing control signal ckv 2 and the first scan timing control signal ckv 1 in the fourth time interval t 4 and after t 4 the output signal en 2 of the light emission control output terminal of the second driver stage maintains at low.