first power is removed from the components other than the bus interface circuit then all outputs from the other components of the peripheral device to the bus interface circuit and all of the outputs from the bus interface circuit to the other components are forced to logic level 0 so that they do not float during suspend mode and then finally the clock is disabled when the device wakes up power is first restored to the components then the clock is turned on and finally the outputs of the various components are released from logic level 0 application_number US 19771902 A description 0017 fig1 is a block diagram illustrating exemplary basic components of a usb compliant computer peripheral device such as a modem in accordance with the present invention the peripheral device is shown at 10 and the usb bus is shown at 12 although shown as a single line it will be understood by those skilled in the art that a usb bus is a differential bus comprising two lines d and d u2212 accordingly the peripheral device couples to the bus via two differentially driven lines 14 a 14 b the peripheral device 10 includes a usb bus interface circuit 16 commonly referred to as the usb client which interfaces to the bus 12 via differential lines 14 a and 14 b the usb client 16 interfaces between the bus and the other functional components of the peripheral device 10 typically any peripheral device will likely include at least a memory 22 and a processing device such as a digital signal processor dsp 20 in order to perform its necessary functions the memory may comprise more than one memory such as a random access memory ram for storing temporary data as well as a read only memory rom.