the image transfer process was interrupted at the beginning of reset as a consequence of a randomly generated pc flash request the process of image transfer out of image sensor 26 starts anew at the beginning of an image field in this fashion the flash illumination is assured of being evenly distributed across a full frame of video image signal either two successive fields of interlace video or a single frame of non interlace video this is best illustrated in the timing diagram of fig2 wherein a pc flash request signal 40 is asserted at an arbitrary time following the occurrence of a vertical blanking pulse 42 generated in timing generator 28 the assertion of pc signal 40 causes one shot circuit 36 to generate a reset signal 44 of a predetermined duration preferably chosen to be at least equal to the maximum duration of the flash illumination by flash apparatus 22 in the system of fig1 a reset duration of 3 ms is chosen as being adequate for most professional studio strobe flash units although other durations might also be preferred when reset signal 44 is asserted i e goes low at falling edge 44a the operation of timing generator 28 is interrupted which in turn interrupts the image transfer process at image sensor 26 by momentarily disabling the clocking signals applied via clock driver 27 the video timing signals applied to.