of the teraohmmeter from time to time during the self calibration the second switch sw 2 is set at the 34 v cal 34 position and the first switch sw 1 at the 34 cal 34 position the testing voltage v t is set equal to v ref and is converted into a 1 v voltage at the second operational amplifier u03b2 the 1 v voltage is then applied to the standard resistor r s 90 m u03c9 and an input current of 11 na is generated the testing voltage v ref reaches the operational amplifier 3 via the second switch sw 2 the second amplifier u03b2 the standard resistor r s and the first switch sw 1 the integrating operation takes place at the output terminal of the operational amplifier 3 and the actual capacitance c of the capacitor c may be calculated according to the integrating time dt of the operational amplifier 3 in the embodiment of this invention the standard resistor r s is a 9 u00d7 10 m u03c9 resistor fig3 is a flow chart of the automatic self calibration method for digital teraohmmeter of this invention table i records the self calibration procedure and the results the following is a description of the procedure according to table i and fig 3 in the illustrated process the standard resistor is a 90 m u03c9 resistor first at 101 the second switch sw 2 is set at the 34 r cal 34 position and the first switch sw 1 at the 34 cal 34 position the 11 na current is provided from v ref to the teraohmmeter 1 v 90 m u03c9 at 102 the gain ratio of the first operational amplifier is set to 1 9 u03b1 1 9 an integrating operation is processed at the.