embodiment shown in fig3 current source 220 is on only when the power supply vddx is at the high voltage e g 3 3 v when transistor 310 is u201c on u201d a current flows through transistor 312 from power supply vddx creating a voltage through transistors 307 and 308 at pbias node 207 transistor 210 is supplemented with transistor 313 transistors 210 and 313 are coupled to up node 209 through transistors 315 and 314 respectively the gates of transistors 315 and 314 are coupled to input signals pua and pub respectively which are set to a u201c high u201d internal voltage level shifter 201 as shown in the embodiment of fig3 includes transistors 316 317 318 319 320 321 322 323 324 and 325 together these transistors can operate as the two inverters shown as level shifter 201 in fig2 with the u201c low u201d of the output inverter coupled to pbias node 207 one skilled in the art will recognize that other structures for level shifter 201 can be implemented for example a source follower level shifter can also be utilized as level shifter 201 further in the embodiment of driver circuit 200 shown in fig3 inverter 227 is formed with transistors 326 327 and 328 and in the.