way of a spoken i e speech based dialogue control the voice interactive service system 1 comprises a plurality of processing cores c1 c2 c3 c4 cn e g hundreds or thousands of processing cores the processing cores c1 c2 c3 c4 cn are hardware based processing units often also referred to as central processing units cpu as illustrated in fig2 in a preferred embodiment the processing cores c11 c12 c13 c14 cm1 cm2 cm3 cm4 are independent parts cores of a multi core processor mc1 mcn e g a quad core processor commercially available from companies such as intel corp or advanced micro devices inc amd typically the cores c11 c12 c13 c14 cm1 cm2 cm3 cm4 are integrated into a single integrated circuit die i e a chip multiprocessor cmp or they are integrated onto multiple dies in a single chip package moreover each core c11 c12 c13 c14 cm1 cm2 cm3 cm4 has its own local cache memory so called level one l1 cache and on die shared cache memory so called level two l2 cache as illustrated schematically in fig1 different configurations of service processing resources are assigned to the processing cores c1 c2 c3 c4 cn specifically in the example of fig1 speech processing resources r11 r12 r13 are assigned to processing core c1 speech processing resources r21 r22 r23 are assigned to processing core c2 speech processing resources r31 r32 r33 are assigned to processing core c3 speech processing resources r41 r42 r43 are assigned to processing core c4 and speech processing resources rn1 rn2 rn3 are assigned to processing core cn preferably the service processing resources are stored permanently in memory associated.