to avoid the insertion of audio data therein include 1st to 3rd lines 7th to 11th lines 264th to 266th lines and 270th to 274th lines in the case of the composite sdi signal d2 shown in fig4 in the case of the component sdi signal d1 the lines to avoid the insertion of the audio data therein include respective two lines of 10th to 11th lines and 273rd to 274th lines when an eav signal trs signal indicative of a data insertion start point is inputted to the audio data distribution control circuit 64 where the signal to be converted corresponds to the component sdi signal d1 or composite sdi signal d2 the audio data distribution control circuit 64 supplies an insertion timing control signal to the header information generating circuit 38 to incorporate header information therein the addition of the header information is determined according to a packet format to be outputted thus when the signal to be converted indicates the component sdi signal d1 the adf code comprised of three words 000h 3ffh and 3ffh is generated from an internally provided adf code generator 70 a reconstructed did code is produced from a did code generator 72 and continuous new block numbers 1 to 255 are generated from a dbn code generator 74 every audio data packets they are outputted as dbn codes further.