is greater than the maximum limit signal then subtraction and comparison is repeated after shifting the successive words of the digital signal by one bit this process is repeated until when the difference no longer exceeds s synchronization is assumed application_number US 25568988 A description the present invention relates to the processing of a bit stream constituting a sequence of digitized analog signals which may be slew rate limited slew rate limiting restricts the rate at which the analog signal is allowed to change signal level the analog signal may be inherently slew rate limited or may be limited before being digitized according to the technique of the invention a slew rate limited analog signal may be converted to a serial bit stream without including separate indicia for identifying words within the serial bit stream thus the data rate and data capacity of the digital signal may be optimized and the circuitry for processing the digital signal may be minimized referring to fig1 there is shown a diagram of an analog voltage signal plotted against time as depicted the solid line analog signal 10 is limited so that the rate of change of signal level against time is limited for example to less than 1 volt u03b4t the dashed line analog signal 12 has a rate of change of signal which is greater than one volt u03b4t e g 1 7 v u03b4t such a signal should be processed by an aliasing filter or a slew rate limiting circuit to limit the rate of change to less than the slew rate s in referring now to fig2 there will be described a preferred embodiment of apparatus according to the present invention as shown an analog signal source.