further integrate some kind of device because its structure requires a large capacitance the structure shown in fig1 however makes it possible to further integrate such a device this also enables a considerable reduction of cost the semiconductor integrated circuit device shown in fig1 is equivalent to the one shown in fig5 since a storage capacitance of the stacked capacitor 15 itself is considerably increased compared to the conventional and also the contact hole 17a for the interconnection 16 need not be provided the area of the impurity region 5b can be reduced a leakage out of the pn junction at the interface between the impurity region 5b and the semiconductor substrate 7 becomes also decreased which substantially reduces a potential change in the storage node 1 compared to the conventional together with the marked increase in the stored charge the device shown in fig1 is manufactured by the following process referring to fig1 a the isolation region 6 made of a thick oxide film with a thickness of approximately 6000 u00e5 is formed by selectively oxidizing the main surface of the p type semiconductor substrate 7 with an impurity concentration of 1 u00d7 10 15 u02dc 1 u00d7 10 16 cm 3 a gate oxide film 23 of the n channel mos transistors 11 and 12 is formed to a thickness of approximately 200 u00e5 in an active region where the isolation region 6 is not formed polysilicon is deposited to a thickness of approximately 5000 u00e5 by a cvd chemical vapor deposition.