a dotted line in the transistor shown in fig7 the regions 304 each including a margin for a contact are arranged to be a tetragonal lattice when a gate length l and a distance d between the gate electrodes are not considered in that case the area of the active region 302 is approximately 3r u00d7 2r 2l d in a transistor shown in fig3 that is a transistor with a double gate structure according to the invention six contacts 311 and two gate electrodes 313 are arranged on an active region 312 a region 314 including a margin for a contact is assumed to be a circle having a diameter of r which is denoted by a dotted line in the transistor shown in fig3 the regions 314 each including a margin for a contact are arranged to be a triangular lattice when a gate length l and a distance d between gate electrodes are not considered in that case the area of the active region 312 is approximately 3r u00d7 u221a 3 r 2l d compared with the areas of both the transistors each other the area of the transistor according to the invention is smaller regardless of.