of thermal expansion of the integrated semiconductor device and the circuit wiring board in particular because the i o electrodes 10 bump electrodes 5 that are in contact with the circuit wiring board 200 are arranged on the top surface of the insulating material 4 on the periphery of the integrated semiconductor device pseudo soc chip 100 warping stress deformation 300 occurs in the integrated semiconductor device pseudo soc chip 100 this causes breakage of the portion of the insulating material 4 between the lsi chips 2 and the mems chip 3 of the integrated semiconductor device pseudo soc chip 100 next the flip chip assembly of the integrated semiconductor device pseudo soc chip 1 according to the present embodiment onto the circuit wiring board 200 is explained there is a difference between the coefficient of thermal expansion of the integrated semiconductor device pseudo soc chip 1 and the circuit wiring board 200 illustrated in fig6 which causes a displacement difference between the integrated semiconductor device and the circuit wiring board however the i o electrodes 10 bump electrodes 5 connected to the circuit wiring board 200 are provided on the top surface of the portion of the insulating material 4 between the lsi chips 2 and the mems chip 3 of the integrated semiconductor device pseudo soc chip 1 thus the warping stress deformation 300 in the integrated semiconductor device pseudo soc chip 1 is effectively suppressed the problem of the breakage of the insulating material 4 corresponding to the area between the lsi chips 2 and the mems chip 3 of the integrated semiconductor device pseudo soc chip 1 can be thereby solved hence the integrated semiconductor device pseudo soc chip 1 according to the present embodiment improves the reliability of the connection.