to selectively couple line 232 a to either line 232 b or line 232 c during a write operation switch s 3 is set so that line 232 a is coupled to line 232 b so that the computed parity is stored in the parity cell pe during a read operation switch s 3 is set so that line 232 a is coupled to line 232 c so that the computed parity is supplied as an input to the exclusive or xor gate 252 the other input of the xor gate 252 is from line 242 which outputs the content of the parity cell pe the output of the xor gate 252 true is set to a low logical state only when computed parity matches the stored parity thus the xor gate 252 can be used to detect parity errors in the cam entry 200 u2032 as shown in fig3 the word write control line 204 is coupled to each of the cells d 0 d 1 dn v p r u sv vp sr su and the status bit write lines are respectively coupled to the write enable terminal of the corresponding status bit as well as the write enable terminal of the corresponding shadow status bit this arrangement causes any update of a status bit to also cause the identical update to the corresponding shadow status bit i e any 1 bit change in a status bit result in two identical 1 bit changes one to the status.