an address converter 120 receives electromagnetic address signals 104 and converts these signals into corresponding electric address signals that are applied to the address decoder 106 over the address bus 114 a control converter 122 receives electromagnetic control signals 105 and converts these signals into corresponding electric control signals that are applied to the control circuit 108 over the control bus 116 a read write converter 124 operates during write operations of the memory device 99 to receive electromagnetic data signals 107 and convert these signals into corresponding electric data signals that are then applied to the read write circuitry 110 over the data bus 118 the read write converter 124 also operates during read data transfers of the memory device 99 to receive electric data signals on the data bus 118 and convert these signals into corresponding electromagnetic data signals 107 a package address decoder 126 is mounted on the chip package 102 adjacent the address decoder 106 and receives electric address signals 133 and converts these signals into the electromagnetic address signals 104 and a package control converter 128 mounted on the chip package adjacent the control converter 122 operates in the same way to generate the electromagnetic control signals 105 in response to electric control signals 132 applied to the chip package a package read write converter 130 is mounted on the chip package 102 adjacent the converter 124 and operates during write operations to receive electric data signals 131 and generate the corresponding electromagnetic data signals 107 during read operations the package read write converter 130 receives the electromagnetic data signals 107 and generates the corresponding electric data signals 131 the converters 120 124 on.