celsius respectively while teos and silicon dioxide thermally decompose at temperatures over 500 degrees celsius and crosslinked polyarylene thermally decomposes at about 400 degrees celsius therefore selective decomposition either chemical or thermal may be utilized to separate these pairings referring back to fig1 a the first ild layer 102 may be formed adjacent the substrate layer 100 using a variety of conventional techniques such as spin on or spin coating spin casting out of solution evaporative deposition chemical vapor deposition or plasma enhanced chemical vapor deposition depending upon the particular materials selected as porogen and porous matrix as would be apparent to one skilled in the art the first ild layer 102 preferably has a thickness between about 10 nanometers to about 2 000 nanometers in the case of spin coating or other deposition methods solvent may need to be removed using evaporative techniques familiar to those skilled in the art referring to fig1 b two conductive layers 104 107 are shown crossing the first ild layer 102 each of the conductive layers 104 107 comprising materials conventionally used to form conductive layers in integrated circuits and preferably comprising metals such as copper aluminum and alloys thereof is formed using known techniques for example the depicted embodiment is formed using known dual damascene techniques wherein a trench 114 is formed for each conductive layer using conventional lithography etching and cleaning techniques the trench having a via portion 118 and a line portion 116 the line portion 116 having a width preferably between about 10 nanometers and about 2 000 nanometers the trench may then be lined with a barrier layer not shown to isolate conductive material after.