regardless of fluctuation in voltage of the surface gates 14 and 15 within the power source voltage when a certain intermediate voltage for example 1 5 v is applied on the word line 9 the selector transistors 1 and 2 are so set as to be turned off while the surface gate 14 or surface gate 15 is in a high state and to be turned on while the surface gate 14 or surface gate 15 is in a low state for example when the node 16 on the right side is in a high state data is retained as described hereunder in this case the word line 9 is maintained at an intermediate voltage of for example 1 5 v then the selector transistor 1 is turned off because the surface gate 14 is connected to the node 16 in a high state and the selector transistor 2 is turned on because the surface gate 15 is connected to the node 17 in a low state in the same way as the first embodiment described herein above in the second embodiment power is therefore supplied to the node 16 through the bit line 8 and thus data is retained stably dissipation current during stand by is very small due to no through current on the other hand data is read as described hereunder at first the voltage of the word line of a non selector cell is raised to disconnect the bit lines from the cell then the path transistors 11 and 12 are turned off and then.