configurations are sixteen bits eight bits four bits two bits and one bit however other configurations are also possible e g twenty four internal bits configured to twenty four eight four or one external bits configuration bits 107 are provided on control lines for selecting between possible port configurations for example two configuration bits can be used to provide four different port configurations such as for one bit two bit four bit and eight bit wide configurations three configuration bits are sufficient to support eight different configurations etc similarly configuration bits 116 are provided on control lines for port a lower order address bits 104 provide for selection of data bit subsets from buses 108 and 109 similarly lower order address bits 113 provide for selection of data bit subsets from buses 117 and 118 the number of lower address bits is at least equal to log 2 of the internal fixed bus width divided by the minimum external bus width multiplexers 101 102 110 and 111 provide for mapping of the bit lines between the external buses and the respective internal buses to implement the desired configurations decoders 119 and 122 independently select the appropriate mapping from their associated multiplexers based on the respective.