processing crc circuit and the selector 4 selects the output of the 8 b processing crc circuit which is input to register 8 3 next the 5 bytes of data of the third segment are input the selector 4 selects the output directly from the register 8 which is input to the register 8 also a crc value is calculated by the 4 byte processing crc circuit from the interim result in the register 8 and 4 bytes bytes 17 to 20 of the input data the selector 3 selects the output of the 4 byte processing crc circuit which is input to the register 7 the selector 2 selects the output directly from the register 7 which is input to the register 6 also a crc value is calculated by the 1 byte processing crc circuit from the interim result in the register 6 and 1 byte byte 21 of the input data the selector 1 selects the output of the 1 byte processing crc circuit which is input to the register 5 the first example of the crc value calculator of the invention will be described with reference to a calculator for calculating the crc value of a crc 32 also called a fcs frame check sequence used by an ethernet registered trademark frame crc 32 is used for frame error detection of ethernet registered trademark data link layer frames crc 32 is used as an fcs in the data link layer frames of ieee 802 3 a crc.