t 0 no adjustments are required to its buffer various mechanisms for adjusting buffer delays are well known in the art e g changing buffer gain factors and or adjusting threshold values in a further embodiment of the invention once the buffer adjustments are performed the procedure is repeated further adjustments are then performed if warranted iterations are performed in this manner until the multiphase clock generator 39 s phases are trimmed so that they are equally spaced apart additional embodiments of this procedure may terminate the iterative procedure when required tolerances are met e g 5 ps and or the minimum phase step adjustment yields no further improvement as noted above alternative embodiments of the invention permit alternative trimming algorithms once the interpolation codes have been determined an additional example would be one in which a u201c numerical average u201d of interpolation codes is derived and each phase clock is adjusted in an effort to attain that average value this algorithm first sets one of the determined codes as a base or 0 value determines code values for the remaining phases relative to that base value and then computes and uses the average value to perform the trimming adjustments again using the numerical interpolation codes of fig5 as an example letting t 0 be the base value t 1 would then correspond to 7 t 2 would be a u2212 3 and t 3 would be a 0 the numerical average of these values would yield 4 4 or 1 each of the phase clock buffers would be adjusted accordingly that is buffers for t 0.