as 130 an additional on board peripheral is the high speed network interface 10 which in this embodiment is a 10 100 megabit ethernet port the externally accessible connector for this port is designated as 160 as illustrated in fig2 external direct current dc power is supplied through a connector 370 which is accessible through a hole located in the back panel 330 dc power is then converted to additional voltages by switching power supplies not shown and both the input and generated voltages are monitored by a combination of the switching supplies and the watch dog timer reset controller not shown in this embodiment the voltage conversion devices and watch dog timer reset controller are mounted on main circuit board 310 the computer operation is coordinated by a distributed clocking system not shown which in this embodiment is composed of a master clock generator a local memory clock buffer and a dual frequency expansion bus clock buffer in the embodiment shown having the back panel illustrated in fig2 the following external interfaces are present a rs 232 serial port connector 150 which is part of input output interface 140 a local area network connector 160 which is part of 110 in fig3 and an ultra high speed interface port 230 which is part of the ultra high speed interface 220 it is to be understood that in certain applications the ultra high speed interface may not be used and can therefore be considered to be an optional component additional subsystems can be added to facilitate particular applications these subsystems can be used in multiple combinations and are not limited to the particular versions or combinations chosen for the particular embodiment described which comprises a rs 232.