applied to external logic circuitry that requires a signal to indicate that counter a contents are equal to counter b contents additionally the signal sig_a b is applied to an enable input on the flip flop circuit 11 to enable the flip flop circuit 11 to generate another status signal s e g signal sig_a gt b or signal sig_a lt b definining a relationship between the output signal sig_a and the output signal sig_b the signals inc_a and inc_b are additionally applied to inputs of the and gate 18 thereby creating an output signal sig_d from the and gate 18 that is applied to a data input d on the flip flop circuit 11 the signal sig_a b is additionally applied to each of the and gates 15 and 22 the signals inc_a and inc_b applied to the inputs of the and gate 18 and the signal sig_a b applied to the enable input e on the flip flop circuit 11 are used to control the flip flop circuit 11 to generate the signal sig_a gt b and signal sig_a lt b on outputs of and gates 15 and 22 respectively the signals inc_a and inc_b applied to the inputs of the and gate 18 determine the output signal sig_d and in turn the output signal sig_d updates the flip flop circuit 11 based on the a logic state of the signals inc_a and inc_b the signal sig_a b applied to the enable input e on the flip flop circuit 11 enables or disables the flip flop circuit 11 dependent upon a logic state of the signal sig_a b the signals sig_a gt b and sig_a lt b are generated when one counter content crosses the other i e counter a.