controls the first and second gain controllers 201 and 202 so that the gain g 1 of the variable gain circuit 101 is decreased by u03b1 db and the gain g 2 of the variable gain circuit 106 is increased by 3 u03b1 db step s402 on the other hand if the power difference u03b1 is not positive no in step s401 the processor 203 calculates a power difference u03b1 db between them and controls the first and second gain controllers 201 and 202 so that the gain g 1 of the variable gain circuit 101 is increased by u03b1 db and the gain g 2 of the variable gain circuit 106 is decreased by u03b1 db step s403 after the step s402 or s403 control goes back to the step s300 in the cases where n e is not greater than n th no in step s302 the first an second gain controllers 201 and 202 perform a feedback control as shown in fig4 step s307 as described above in the cases where the number n e of errors is greater than the predetermined value n th yes in step s302 and the estimated received signal power strength p in is greater than the predetermined value p th yes in step s304 it is determined that cross modulation would.