output 334 the differential amplifier 336 receives the clock bar signal 222 and the data signal 224 and provides an output 338 the differential amplifier 340 receives the clock signal 220 and the data signal 224 and provides an output 342 the outputs 330 and 334 are then combined and provided as input 335 to a multiplexer 344 the multiplexer 344 also receives the clock 220 and clock bar 222 signals and provides an output 345 similarly the outputs 338 and 342 are combined to provide an input 343 to a multiplexer 346 the multiplexer 346 also receives the clock 220 and the clock bar 222 signals and provides an output 347 the outputs 345 and 347 are then combined to provide an output 226 for the receiver circuit 300 moreover it is envision that in one embodiment a single multiplexer may be utilized instead of the multiplexers 344 and 346 generally in implementations utilizing complementary metal oxide semiconductor cmos technology combining two signals to provide a single signal still provides a full swing output whereas combining too many outputs may not provide a viable output signal as such in an embodiment the combination of signals 330 and 334 338 and 342 and 345 and 347 are envisioned to provide a full swing output signal 0023 fig4 illustrates an exemplarily circuit diagram of a receiver circuit 400 in accordance with an embodiment of the present invention in an embodiment the receiver circuit 400 illustrates an exemplarily transistor level diagram of the receiver circuit 300 of fig3 the receiver circuit 400 includes four differential.