pins are labeled as conventionally utilized in accordance with the above mentioned standards each of pins 1 8 of port1 are connected to the respective pin of port2 via a conductor having inserted therein a respective dc blocking capacitor 155 the 8 conductors representing 4 pairs of conductors and in total representing data pass through connection 140 a first winding 170 is connected between pins 1 and 2 of port1 electrically adjacent port1 i e a first end of first winding 170 exhibits a dc path to pin 1 of port1 and a second end of first winding 170 exhibits a dc path to pin 2 of port1 the conductors connecting respective pins 1 and 2 of port1 to port2 thus represent a first pair of conductors a second winding 170 is connected between pins 3 and 6 of port1 electrically adjacent port1 i e a first end of second winding 170 exhibits a dc path to pin 3 of port1 and a second end of second winding 170 exhibits a dc path to pin 6 of port1 the conductors connecting respective pins 3 and 6 of port1 to port2 thus represent a second pair of conductors a third winding 170 is connected between pins 4 and 5 of port2 electrically adjacent port2 i e a first end of third winding 170 exhibits a dc path to pin 4 of port2 and a second end of third winding 170 exhibits a dc path to pin 5 of port2 the conductors connecting respective pins 4 and 5 of port1 to port2 thus represent a third pair of conductors a fourth winding 170 is connected between pins 7 and 8 of port2 electrically adjacent port2 i e a first end of fourth winding 170 exhibits a.