the multiple functions of the device or combination there of by 1 control command signals 2 programmable registers 3 mode registers 4 command register etc u2014 they can reside in part or in whole in controller memory special control command interface chip or even cpu it should be made clear that the u201c pages u201d and u201c buffers u201d mentioned in these pages titled u201c nvms u201d do not necessarily have to be 1 static latches 6 transistor latches or 2 traditional sram 39 s they can be dram 39 s as is known widely in the industry they can be mram feram ferroelectric or other similar concepts molecular ram etc the implementation of a nonvolatile memory system may contain these configurable nvms chips as described here one or more configurable nvms can be combined with commodity nor nand one nand flash chips controllers psram 39 s dram 39 s or other similar functions to offer a total u201c system in package u201d sip or u201c system on chip u201d soc in order to conserve operating power the unselected yet available pages can be in a u201c stand by u201d mode u2014 namely reduced vcc power supply voltage until the access to that page is required such a u2018 cycle look ahead u2019 can be built into the memory chip or provided by controller on chip or off chip a battery back up for the sram part of the device can be a very attractive option for a very large density total nonvolatile static random access memory nvsram that can go into a broad range of applications in computer consumer communications etc maxim supplies nvsram 39 s u2014 no flash ic in nvsram a u201c power triggered switch off on u201d similar to what simtek 39 s.