to the ram 106 by either address decoder 107 or dma engine 105 referring to fig2 an illustrative example of an embodiment of an application of the invention follows as shown in block 200 a selected range of addresses including for example address x u2032 ffff6000 may be mapped to space in the ram 106 address x u2032 ffff6000 is typically well above top of memory due to a system power on or reset main memory is unconfigured and the mch has no information about the main memory the cpu executes its first instruction cycle in which it attempts an access to memory since the mch has no information about main memory it transfers the attempted memory access to the ich the ich searches for attached memory and finds the eprom erasable programmable read only memory 109 storing the bios program accordingly the cpu begins to fetch the instructions of the bios program as shown in block 201 then an operational mode for accessing the ram 106 to use space therein as a stack may be entered as shown in block 202 in an embodiment the operational mode may be controlled by an enable bit the enable bit may be automatically turned on at system power up or reset or may be set by an instruction in the bios program the enable bit may control the mux 108 to select the input from the address decoder 107 rather than the dma engine 105 once the bios has substantially completed its work the enable bit will be reset to indicate that the ram 106 is to be.