that which is trapped in the charge traps is removed from the photodetector 114 at the end of the reset period 156 the transistor switch 106 opens and the accumulate period 158 begins during the accumulate period 158 the photodetector 114 generates charge in response to the light to which it is exposed at the end of the accumulate period 158 the row select transistor 122 closes to begin the read period 160 during the read period 160 charge accumulated by the photodetector 114 buffered by the transistor 116 is read out via the connection 118 onto the column line not shown of the pixel 100 row select transistor 122 opens at the end of the read period fig7 is a schematic diagram illustrating a second embodiment 200 of a pixel constructed in accordance with the invention a possible drawback of the pixel 100 of fig5 when implemented using cmos technology is that it uses two voltage sources having opposite polarities to forward bias and to reset the photodetector 114 in fig7 a single voltage source 204 charges a capacitor 216 with charge that is later used to forward bias the photodetector 114 and charge the charge traps in the photodetector 114 the single voltage source 204 is also used to reset the photodetector 114 the pixel 200 includes transistor switches 206 208 212 214 and 218 the cathode of the photodetector 114 is connected to the drain of transistor switch 214 to the source of transistor switch 218 and to the gate of transistor 116 the anode of the photodetector 114 is connected to ground the drain of transistor switch 218 is connected to the voltage source 204 the drain of transistor switch 206.