that contains the circuit netlist and performance target 500 we apply a set of software tools 501 to create a polygonal layout for fabrication these tools comprise layout editors placement and routing tools layout compaction tools and standard cell generators etc the tool collection 501 uses anisotropic design rules 502 to restrict the relative positioning of polygon edges based on the orientation of the edge in a preferred embodiment fig6 shows a flow diagram for generating layout for an anisotropic image system the steps performed in fig6 uses a subset of the tool collection 501 during floor planning 602 and placement 603 a preferred orientation of the image system is used to optimize the shape position and orientation of the circuit building blocks more circuit element can be accommodated in the direction with higher resolution while the direction with lower resolution has lower line to line parasitic capacitance and lower resistance in routing modules 604 and 605 wiring direction dependent design rules from the memory are used for identifying obstacles setting wire width and spacing and estimating resistance and capacitance fig7 a shows a basic operation during wire routing a wire is constructed by the routing algorithm to connect two points a and b in a preferred embodiment starting from point a while the wire is running horizontally 700 the application fetches the minimal width of the horizontal wire from the memory and applies it to limit the current wire segment after turning 90 degrees 701 the wire now is running along the vertical direction the application fetches the minimal width of the vertical wire from a different memory location and applies.