30 36 that propagate the signal from the output 51 of the flip flop 50 in other embodiments the buffers 30 36 may be replaced with other types of circuit elements e g inverters the speed measurement circuit 14 includes a set of observation flip flops 40 46 that respectively correspond to the buffers 30 36 each observation flip flop 40 46 samples a corresponding buffer output 70 76 of the buffers 30 36 in response to the test signal 60 applied to its clock input the observation flip flops 40 46 taken together provide the speed register 16 for capturing a value that indicates how far the signal generated at the output 51 of the flip flop 50 propagates down the series of buffers 30 36 between edges of the test signal 60 for example a u201c 1 u201d at an output 80 of the observation flip flop 40 indicates that the signal from the output 51 propagated past the buffer 30 between edges of the test signal 60 and a u201c 1 u201d at an output 82 of the observation flip flop 42 indicates that the signal from the output 51 propagated past the buffers 30 and 32 between edges of the test signal 60 likewise a u201c 1 u201d at an output 84 of the observation flip flop 44 indicates that the signal from the output 51 propagated past the buffers 30 and 32 and 34 between edges of the test signal 60 etc the data held in the flip flops.