
{"publication_number": "US-5408425-A", "abstract": "a special purpose processor and method of computation for performing an n - length real - number discrete cosine transform . the algorithm is called the split - radix discrete cosine transform because an nth order dct consists of an th order dct and two th order inverse dct , where n is an integer power of 2 and larger than 4 . in the embodiments of the invention , signal flow - graphs for both the forward and inverse scaled dct have been implemented based on fused multiply and add operations in pipeline architectures . in the two - dimensional cases , over 20 % arithmetic operations are saved compared to other known fast two - dimensional dct algorithms . in addition , the split - radix dct method offers flexibility of processing different input sizes under software control .", "application_number": "US-6750393-A", "description": "in the following we provide a rigorous derivation of the algorithm to be implemented in the reduced instruction set computer ( risc ) architecture , in which the multiplication and addition pair can be performed in one instruction cycle . therefore , the goal of the following derivations is to obtain as few multiplications and additions as possible , to be operated in pairs . the derivations of the algorithm start with the regular dct in radix - 2 form . we then obtain the split - radix dct algorithm which constitutes the theoretical foundation of this invention . finally , both the forward and inverse split - radix scaled dct algorithms are derived for physical implementations in risc architecture . the signal flow - graphs accompanied by the formulations further illustrate the electrical connections between the fused multiply and add processing units . according to the definition of dct , for a given data sequence { x n ; n = 0 , 1 , 2 , . . . , n - 1 