read address port 146 and read data bus 48 is connected at a read data port 148 dual port memory 10 has similar connections to facilitate communication by first communication bus 18 and second communication bus 19 referring now to fig2 an example of gwm operation is depicted by a chart depicting operation mode v time in the present example the write display memory has a frame rate of 50 hz as shown in write display memory bar graph 100 and the read display memory has a frame rate of 90 hz as shown in read display bar graph 102 each block in write bar graph 100 represents a write cycle and each block in read bar graph 102 represents a read cycle as shown in fig2 in the time it takes the write display memory device to write to frame 0 the read display memory device can read from frame 1 1 75 times as can also be seen in the figure the write display memory device writes to each frame consecutively the read display memory device operates differently when the read display memory device finishes reading a frame it must determine if it should move to the next frame and read it or read from the same frame again this decision is based on the current status of the write display memory device the writing rate of the write display memory device and the reading rate of the read display memory device in summary the read display memory device ensures that it will not 34 catch 34 the write display memory device causing the display of incomplete and inconsistent data this process is described in further detail later in the present description for.