control circuit 230 comprises a two speed phase to dc converter circuit 400 for converting the phase control input control signal v pc in to a dc target voltage v trgt that is representative of the duty cycle dc pc of the phase control voltage v pc and thus the target intensity l trgt of the lamp tube 122 the dc target voltage v trgt is amplified by a non inverting amplifier circuit 420 to generate an amplified target voltage v a trgt such that the magnitude of the amplified target voltage v a trgt is within a correct range to be received by an error amplifier circuit 430 for example the dc target voltage v trgt may be in the range of approximately 1 4 volts while the amplified target voltage v a trgt is in the range of approximately 0 5 6 5 volts a non linear amplifier circuit 440 receives the lamp current control signal v ilamp from the lamp current sense circuit 270 and generates an amplified lamp current signal v a ilamp the error amplifier circuit 430 receives the amplified target voltage v a trgt and the amplified lamp current signal v t ilamp and generates the drive control signal v dr to adjust the operating frequency f op of the inverter circuit 210 so as to minimize the error between the amplified target voltage v a trgt and the amplified lamp current signal v t ilamp the phase to dc converter circuit 400 comprises a voltage divider having two resistors r 401 r 402 for scaling down the phase control input control signal v pc in for example the resistors r.