the effective width of both p channel transistors 220 and 222 remains equal and unchanged furthermore due to parallelogram shape of the channel regions the direction of each current path 506 and 502 is unchanged and approximately parallel to the 100 crystal orientation direction 520 angles 504 and 500 remain equal so there is no imbalance between p channel transistors 220 and 222 due to crystal orientation as a result memory cell parameter measurements such as static noise margin trip voltage disturb read and write and other parameters as will advantageously have a much smaller standard deviation than memory cells of the prior art still further while numerous examples have thus been provided one skilled in the art should recognize that various modifications substitutions or alterations may be made to the described embodiments while still falling with the inventive scope as defined by the following claims for example n channel transistor performance may also be affected by crystal orientation and stress furthermore referring to fig6 there is a diagram of a semiconductor wafer 600 of the prior art having a different crystal orientation than the semiconductor wafer of fig1 the wafer has a uniform lattice structure of face centered cubic crystals as indicated by circles 604.