step 304 the reference voltage source 230 fig1 and the regulator circuit 210 are started for generating voltage levels bgout and vregin respectively at step 306 the load 220 fig1 is started at step 308 the sink current i sink is started in increasing steps such that it reaches a final value approximately equal to the load current i load after a stipulated time in a preferred embodiment first vregin is applied to node 222 step 310 a and at the same time the sink current i sink is stopped step 310 b then in the next step step 312 voltage level bgout is applied to input node 212 of the regulator circuit 210 the stipulated time can be for example the time for the voltage level bgout to attain a stable value in all process voltage and temperature conditions in an alternate embodiment voltage level bgout is applied to input node 212 of the regulator circuit 210 simultaneously with the voltage level vregin being applied to node 222 of the load 220 and the stopping of the sink current i sink at step 314 the setting attained at this point is maintained until a reset is provided to the system in the example embodiment control signals for example one to draw the sink current i sink in increasing steps another to apply the voltage level bgout to the regulator input node 212 and another to apply the voltage level vregin.