sec is the speed of light and is measured in timing block 6 fig4 a shows a partial diagram of location device with a rf stage receiver and if stage receiver located in bs for communication link with a single ms unit upon the arrival of ms signal to bs antenna a at high frequency rf stage receiver the signal is transformed to intermediate frequency if the circuit contains rf baseband filters 1 amplifiers 2 mixers 3 synchronized with the frequency of carrier signal in heterodyne 4 in the pll frequency synthesizer 5 controlled by operator 39 s dedicated logical choice code synchronized signal conversion is de modulated in demodulator of if stage receiver demodulator contains mixers 6 shiffers 7 amplifiers 8 filters of low frequency filters 9 analog to digital converters 10 frequency divider 4 a in second heterodyne of receiver in digital circuits of bs receiver signals go from adc 10 and enter the decoder of digital m sequences pn sequencer 23 of pn descrambler 11 which provides selection of sequences with code attributes of ms window frames in cdma continuing from pn descrambler 11 digital sequences r j i and r j q from ms signals are passed to correlators 12 and 13 respectively via threshold device 14 and 15 to correlators 12 13 and on to comparator 16 the signal is then returned from lower frequency filter 17 amplifier 18 in phase controlled channel to the pll synthesizer 5 digital clock synchronizes base m sequences for given ms r j0 enters the additional correlator 20 through the decoder pn sequence output signals from correlators 12.