fig6 the schematic illustration shows the heat sink cap 20 sealed to the substrate 12 at the peripheral edge by reflowing the solder preform 26 the chips 14 are connected to the heat sink cap 20 at the heat sink column 20 locations using the solder preforms 26 as shown in fig6 the chip 14 on the left side was spaced at a greater vertical distance from the cap 18 then was the chip 14 on the right side thus showing two different cross sectional configurations for the reflowed solder in either case the construction of the cap according to the present invention and the use of the thin film accommodates the mismatch in spacing and permits solder bonding without loss of strength or thermal connectivity between the chip and the heat sink cap 18 the cap placed over the chips is aligned and heated in a furnace above the melting point of the solder to cause solder reflow and to have an adequate reaction rate with the films and join the chips and substrate to the cap a typical solder thickness between chip and cap and peripheral seal is 15 mils plus or minus 4 mils the simultaneous reflow.