may occur upon external request or activation or may be configured to be internally activated on one or more occurrences in one application the various embodiments of the present invention find application to one or more design standards that may include calibration commands including but not limited to self or internal calibration of output drivers fig1 is a block diagram of a memory device including an output driver calibration circuit in accordance with an embodiment of the present invention a memory device 10 may be part of a dimm dual in line memory module or a pcb printed circuit board containing many such memory devices not shown in fig1 the memory device 10 may include a plurality of physical connection terminals or pins 12 located outside of memory device 10 for electrically connecting the memory device 10 into more integrated configurations such as memory modules or electronic systems various ones of pins 12 may couple to memory address bus 14 data dq pins or data bus 16 and control pins or control bus 18 it is evident that each of the reference numerals 14 16 18 designates more than one pin in the corresponding bus further it is understood that the diagram in fig1 is for illustration only that is the pin arrangement or configuration in a typical memory device may not be in the form shown in fig1 in operation a processor or memory controller not shown may communicate with the memory device 10 and perform memory read write.