including the n mosfet 10 and p mosfet 20 each having the above described structure is formed according to a normal process herein a film thickness and impurity concentration of each portion in this cmos structure are arbitrarily set in response to demand characteristics of the cmos structure by way of example the gate electrodes 13 and 23 are each formed to a gate length of about 30 to 40 nm and a gate height of about 100 nm the sidewalls 14 and 24 are each formed to a width of about 50 nm fig2 is a schematic cross sectional view of an essential part of a tensile stress film deposition step after formation of the n mosfet 10 and the p mosfet 20 a tensile stress film 3 made of sin and having a film thickness of about 70 nm is deposited over the whole surface of the substrate the tensile stress film 3 is deposited for example using a chemical vapor deposition cvd method in the method silane gas sih 2 cl 2 sih 4 si 2 h 4 si 2 h 6 is used as an si material and ammonia nh 3 gas is used as an n material during the deposition a flow rate of the silane gas is set in the range of 5 to 50 sccm and a flow rate of the nh 3 gas is set in the range of 500 to 10000 sccm further nitrogen gas n 2 or argon ar gas is used as a carrier gas and a flow rate thereof is set in the range of 500 to 10000 sccm a chamber for introducing each gas is controlled to have an inner pressure of.