to the contacts b the peak value held by the peak holder circuit 4 is stored in the register 15 both the outputs from the two registers 14 and 15 are synthesized in the synthesizer circuit 5 an output from the synthesizer circuit 5 is supplied to a driver 7 which in turn drives a display 8 in response to the indicator signal issued from the synthesizer circuit 5 as a result an instantaneous level and a peak level of the digital signal are indicated on the indicator means 8 the decoder 2 comprising a rom logic gates etc incorporates a set of decoders having different resolutions e g 1db and 3db the desired decoding pattern is selected by operating the selector 3 depending on the choice of resolution the decoder 2 changes its output when the input applied thereto is subjected to a variation larger than 1db or 3db consequently the digital level is indicated on the display 8 with steps of 1db or 3db in correspondence to the selected operation the peak holding circuit 4 is connected upstream of the decoder 2 and holds a peak value of the absolute value signal irrespective of the selection made on the selector means 3 accordingly even with the possible choices of the selector means 3 switched from one to another during the display mode it will not happen that the value held immediately prior to the switching operation remains and continues to be displayed it is to be noted that a reset switch 6 associated with the peak holder circuit 4 can be dispensed with fig5 is a block diagram of a digital level indicating device according to a third embodiment of the present invention in which the parts.