while outputs d0 d3 are provided an inputs to or gates 58 60 or gates 58 60 form the control logic for operation of the analog multiplexer 56 specifically analog multiplexer 56 which is preferably a cd4066 device manufactured by rca responds to the inputs a d corresponding to output d0 of counter divider 62 and the respective three outputs or or gates 58 60 to perform the following operations 1 during a first time interval defined by output d0 multiplexer 56 connects each of resistors r8 r11 to ground 2 during a second time interval defined by output d1 multiplexer 56 disconnects resistor r8 from ground leaving resistors r9 r11 connected to ground 3 during a third time interval defined by output d2 multiplexer 56 disconnects resistor r9 from ground leaving resistors r10 and r11 connected to ground 4 during a fourth time interval defined by output d3 multiplexer 56 disconnects resistor r10 from ground leaving resistor r11 connected to ground and 5 during a fifth time interval indicated by outputs d0 d3 being inactive multiplexer 56 disconnects resistor r11 from ground leaving no resistors connected to ground except for resistor r7 which is externally connected to the multiplexer 56 as a result of this operation multiplexer 56 provides successively increasing voltage inputs to the non inverting input of voltage comparator 44 thus voltage comparator 44 performs sequential comparisons of the conductivity related output of op amp 42 to successively increasing conductivity reference values or stated in other words comparator 44 performs sequential comparisons of the resistivity indicated by the amplitude of the output of op amp 42 to successively decreasing resistivity reference values when a resistivity reference value less than the resistivity indicated by op amp 42 is first detected voltage comparator 44 issues.