p 39 0 2 8 v previously mentioned the effects of the input signal falling transition will be considered in light of fig4 when the transition occurs nfet devices n1 and n5 are first turned off meanwhile pfet p5 slowing turns on thus rising the potential of node c when the voltage of node c is sufficiently high the voltage of node e falls through nfet n4 since pfet p4 is not strong enough to maintain it at a high level when the voltage of node e reaches a certain low point it turns pfet p3 on which in turn pulls node f up towards v h this cuts pfet p4 off thereby speeding the fall of the voltage of node e the increase in potential of node f also turns nfet n2 on which in turn helps node c to rise through pfet p1 after a small negative undershoot caused by nfet n2 which is on the potential of node d is held high by pfet p1 the voltage of node g becomes equal to that of node c through pfet p5 at the end of the falling transition the potential of nodes c d and f remains at.