the entire surface the etching back of the silicon oxide layer is performed as a result as shown in fig6 j the side wall 40 is formed to cover the control gates cg 1 and cg 2 after that the ion implantation is further performed and the source drain diffusion layers 3 are formed on the surface of the semiconductor substrate 1 as shown in fig6 k next as shown in fig6 l an upper surface of the word gate wg is treated with the silicidation treatment and the silicide layer 50 is formed for example a cobalt film is formed on the entire surface by the sputtering and then a heat treatment is performed a cobalt silicide layer is formed by a silicide reaction of the cobalt with the polysilicon of the word gate wg meanwhile since the upper surface of the word gate wg is an open space the silicide reaction easily proceeds in addition other structures do not exist on the upper surface of the word gate wg the silicide layer 50 is formed to cover the whole of the upper surface of the word gate wg accordingly a resistance of the word gate wg is efficiently reduced after that as shown in fig6 m the interlayer insulating layer 60 is formed on the entire surface thus the structure shown in fig2 is obtained as described above according to the present embodiment the word.