goes to step 410 and the transmit power level is reduced power control circuit 318 can be implemented in hardware or software preferably however the power control circuit 318 comprises a processor e g processor 320 to executing software firmware instructions in such a manner as to perform the steps described in the above paragraphs this allows flexibility to reprogram power control circuit 318 which can be useful in the face of varying sar or acpr requirements for example a push pull pa design can be used for pa 312 to further reduce acpr and enhance power conservation within transceiver 300 fig5 illustrates an example push pull pa 500 that can be used in transceiver 300 pa 500 comprises an in phase path and an out of phase path which originate at splitter 502 splitter 502 receives a transmit signal and sends an in phase signal to amplifier 504 which is supplied by bias 506 splitter 502 also sends an out of phase signal to amplifier 508 supplied by bias 510 the out of phase signal is 180 u00b0 out of phase with the in phase signal after amplification in amplifiers 504 and 508 respectively the two signals are then balanced and combined in combiner 512 the transmitter linearity performance can be controlled by varying the amplifier biases bias 506 and bias 510 respectively the total transmit power level is the combination of the power levels of the signals in both the in phase and out of phase signal paths thus one advantage of pa 500 is that one or the other of amplifiers 504 and 508 can be completely shut off when the total transmit power requirement is low this can be accomplished for example by simply removing the appropriate bias signal.