mux 1 which receive at the input the output signals of each delay elemental unit 110 of the delay block vcdl for supplying a first output signal out 0 and a second output signal out 1 respectively selected by the input signals the method comprises the steps of generating a first select signal mux_sel_ch_ 0 for driving the first multiplexer mux 0 which selects a corresponding elemental unit and brings back to the output terminal as first output signal out 0 the output signal of the elemental unit selected and generating a second select signal mux_sel_ch_ 1 for driving the second multiplexer mux 1 and bringing back to the output terminal the second output signal out 1 the method further comprises the steps of detecting the phase difference between the first output signal out 0 and the second output signal out 1 for generating a corresponding phase shift signal phc and digitizing the phase shift signal phc detected by employing a time digital converter 121 realized with a plurality of logic elements 127 for generating a digital phase shift signal phcd and processing the digital phase shift signal phcd obtained for generating a signal cnt indicative of the control executed in particular the detection of the phase difference between the first output signal out 0 and the second output signal out 1 occurs by employing detection module 120 that with a.