of the transistor q 9 is different from the reference voltage v 0 by u03b4v a current of u03b4v r 4 flows through the transistors q 17 and q 18 of the gate circuit when they are conductive consequently the charges discharged from or charged in the capacitors c 4 and c 5 become zero during the conduction of the gate circuit at a time when a mean output current during the conduction of the gate circuit that is during the operation of the differential amplifier reaches u03b4v r 4 on the other hand during the absence of the pulse 11 the transistors q 8 and q 9 of the differential amplifier do not operate and the base voltages of the transistors q 17 and q 18 of the gate circuit are low enough to reverse bias the base emitter and base collector of the transistors q 17 and q 18 as a result the transistors q 17 and q 18 are cut off and the discharging paths for the charges stored in the capacitors c 4 and c 5 no longer exist therefore the output voltage keeps the constant voltage u03b4v during this period as shown in fig5 d consequently no sag occurs during the period in which the phase comparison does not take place in the prior art circuit shown in fig2 if a pulse duration u03b4t corresponding to the phase comparison period is smaller than a cycle period t of the reference pulse the charge discharged.