time domain are processed to remove the cyclic prefix the processed signal is then converted in a series to parallel converter 19 from a serial sequence to an array of parallel sequences each sequence corresponding to one of the multicarriers in the system the chips in each sequence are then grouped together and despread in a despreader 20 corresponding to the particular user and the despread signal is transformed to a frequency domain signal by the application of a fast fourier transform fft in a fft block 22 the transformed signal is then equalized in an equalizer 24 and deinterleaved in a deinterleaver 26 the deinterleaved signal is then converted back from a parallel to a serial sequence in a parallel to series converter 28 in the transmitter illustrated in fig1 a the transmitted signal during one vsf ofcdm block symbol in the frequency domain before ifft may be written in a matrix form as s u2211 k 1 k u2062 d k u00b7 c k 1 s s 1 s 2 s g u2208 c nc u00d7 g s g s g 1 s g 2 s g nc t g 1 g u2208 c nc c k diag c k1 c k2 c kg u2208 c g u00d7 g d k d k 1 d k 2 d k nc t u2208 c nc c kg is the gth.