is deposited by a lpcvd process and a heating operation at 600 u00b0 c is carried out to anneal the doped impurity ions within the source and drain regions of the polycrystalline silicon layer 102 thereafter contact holes are perforated within the lto layer 105 and the gate silicon oxide layer 103 and a 1 u03bcm thick alsicu layer 106 is deposited then the device of fig1 is sintered at a temperature of 450 u00b0 c for 30 minutes within a h 2 n 2 forming gas finally a hydrogen passivation is carried out for 16 hours in a parallel plate plasma reactor at a substrate temperature of 350 u00b0 c with an h 2 and ar gas mixture at a power density of 0 21 w cm 2 and a frequency of 30 khz as a result dangling bonds of silicon of the polycrystalline silicon layer 102 are completely combined with hydrogen thus the tft is completed in the tft of fig1 hydrogen atoms can diffuse in the 700 nm thick non doped lto layer 105 to reach the active channel region of the polycrystalline silicon layer 102 therefore as shown in fig2 when a gate length l is 50 u03bcm a gate width w is 20 u03bcm and a drain voltage v ds is 5v the drain current i ds to gate voltage v g characteristics.