v ref is less than the logic high threshold voltage which would turn this transistor off it should be noted that the precharge and write signals are produced by a signal control means and are applied to the write circuit means and the first and second precharge means to control the voltages at the input output voltage nodes in particular a logic low signal defines the precharge portion of the precharge signal and the non write portion of the write signal similarly a logic high signal defines the non precharge portion of the precharge signal and the write portion of the write signal the signal control means is not shown in detail since it is well known in the prior art and by itself forms no part of the instant invention in the preferred embodiment of the invention the precharge and write signals are derived from the same signal source in particular the precharge signal is applied to a delay circuit within the signal control means to form the write signal in operation the precharge signal rises and falls approximately 10 15 nsecs before the subsequent rise and fall of the write signal it should be noted that the duty cycle of the signal pulses is not critical as long as the above sequence of the precharge and write signals are used assume now that at time t 2 the logic high non precharge portion of the precharge signal is applied to the precharge.