decoder fig1 shows an example implementation of the bit select circuit the bits in the input 1501 to be selected are indicated by a u2018 1 u2019 value in the selection register sel 1502 when a load is signaled selected bits are loaded into the shift register 1503 in this example there are two bits in each shift register cell f e 1505 indicating whether the shift register bit is full or empty and val 1506 indicating the value if it is full thus when a bit is loaded the corresponding f e bit is set to u2018 full u2019 all other f e bits are set to u2018 empty u2019 when the load is completed the shift register is activated for shifting shifting is accomplished in a series of steps in each step the shift register moves values from a u2018 full u2019 location to the adjacent location on the left if it is u2018 empty u2019 on completing such a move the original location is set to u2018 empty u2019 and the new location is set to u2018 full u2019 shifting continues until no more shifts are possible the shift control circuit 1507 uses the value of the f e bit from the current location and the previous location to make the decision on whether a move is permitted and is responsible for setting and resetting the f e bit at both the current and the previous location.