any of four receiver modes if for example a signal is to be transmitted from pad tx 1 vtx 1 will be high and vtx 2 vrxc vrx 2 vrx 1 vrx 3 and vrx 4 will be low this turns on series transistor topology 104 on and turns all other switching transistors off in this condition the series transistor topology 104 will contribute a relatively low resistance to the insertion loss and the junction capacitance of the other off branches of the circuit contribute little to the sensed impedance if a particular signal say one to appear on rx 3 is to be received control signals vtx 1 vtx 2 vrx 1 vrx 2 and vrx 4 will be low control signals vrx 3 and vrxc will be high turning on transistor topology 108 and transistor 116 the on transistors 108 116 will contribute a relatively low amount of resistance to overal signal insertion loss the relatively high junction capacitances contributed by the off branches are neglected hence the cascaded circuit topology exhibits less signal insertion loss than the conventional noncascaded topology in summary a single die integrated circuit has been shown and described which can be used to switch a plurality of wireless signals to and from an antenna the described ic arranges its switching fets in a cascaded topology in order to reduce insertion loss in.