disposed in the dielectric regions 15 on opposite sides of the other linear portion of pillar 17 in the example of fig1 gate metal bus 51 is shown electrically connected with gate members 18 a amp 18 b via contacts 55 a amp 55 b respectively located near the ends of the gate members fig1 illustrates another example layout of the rounded end portion of a single hvfet segment having a structure as shown in fig1 in this embodiment the gate members are shown moved back from pillar 17 along the rounded end portion of the silicon pillar for example polysilicon gate members 18 a amp 18 b are shown being pulled back distances of d 1 amp d 2 respectively along the opposite sides of pillar 17 at the rounded end portion of the hvfet segment the gate oxide is therefore much thicker e g 1 u03bcm in the rounded or curved portion of the end termination structure it is appreciated that the distances d 1 amp d 2 are typically selected to be sufficiently large in order to eliminate gate oxide weakness in the rounded portion of the layout while maintaining adequate distance of gate members 18 a amp 18 b from the respective field plates not shown disposed in dielectric regions 15 a amp 15 b electrical contact of the rounded fingertip portion of gate members.