signal in units of subunits and operating members of the operating circuits the bits of data received by each register 103 are sequentially shifted and the output data are supplied to the data input terminal di of the interface circuit 250 the data transmitted to the interface cirucit 250 are sequentially sp converted by the sp converter 254 the converted data is stored in a predetermined memory are of the working memory 4 through the latch 255 and the data bus d bus the cpu 2 compares the previous scan data stored in the working memory 4 and the immediately following scan data when a difference is detected this data portion is updated the updated data is then supplied to the tone generator 8 when this updated data represents a change in preset value or sound volume only the updated data is supplied to the interface circuit 250 when the control signal is supplied form the control circuit 251 to the latch 252 the ps converter 253 of the interface circuit 250 and the subunits 400 l to 400 k in accordance with the address values supplied through the address bus the data received through the data bus is latched by the latch 252 and is then ps converted by the ps converter 253 the converted data is supplied to the register 103 l this data is sequentially supplied to another register 103 and is latched by the corresponding latch circuit 402 in accordance with the output from the corresponding decoder.