a circuit diagram showing the construction of a voltage comparator embodying the present invention as shown in fig1 the voltage comparator according to this embodiment comprises transistors 2 5 whose drains are connected to the power supply and whose gates are connected to input terminals 10 11 respectively resistors 3 6 having one end connected to transistors 2 5 respectively transistor 4 whose drain and gate are connected to the other end of the resistor 3 and whose source is grounded transistor 7 whose drain is connected to the other end of the resistor 6 whose gate is connected to the gate of the transistor 4 and whose source is grounded transistor 9 whose source is grounded and whose gate is connected to a node at which the drain of the transistor 7 and the resistor 6 are connected and transistor 8 whose gate and source are tied together and connected to the drain of the transistor 9 and whose drain is connected to the power supply the drain of the transistor 9 is connected to output terminal 12 the transistors 4 and 7 construct a current mirror circuit and the transistor 8 constitutes the load of the transistor 9 letting vin 10 represent the input voltage at input terminal 10 vt 2 vt 4 the threshold voltages of the transistors 2 4 and r 3 the resistance value of the resistor 3 we have i 0 vin 10 u2212 vt 2 u2212.