in this example also typically have a net surface doping concentration ranging for example from 10 19 to 10 21 atoms cm 3 the gate region of the device includes a conductive gate electrode region 108 which can be for example a metal region a doped polycrystalline silicon polysilicon region or a combination of the same the gate electrode region 108 is beneficially provided in the form of a mesh or lattice that is generally located over the areas between the source regions 104 drain regions 106 and body contact regions 103 the gate region further includes a gate dielectric layer 109 which can be for example silicon dioxide or another suitable dielectric material an additional dielectric layer 110 for example a layer of silicon dioxide a layer of bpsg borophosphosilicate glass or a combination thereof is preferably provided over the gate electrode region 108 source metallization 112 s drain metallization 112 d and body metallization 112 b are provided over the source regions 104 drain regions 106 and body contact regions 103 respectively the source drain and body regions may be connected using one or more layers of interconnect not illustrated in fig2 as noted above the device of fig2 utilizes regular octagonal source regions 104 and drain regions 106 that are alternatively arranged in orthogonal rows and columns as a result of this arrangement semiconductor space is made available at the diagonal corners of the source and drain regions for the body contact regions.