of the slot boundary position accordingly the timing generator 7 calculates the current timing within the respective slots by means of the counter 72 on the basis of the slot boundary timing information and the slot format information shown in fig4 then referring to the table 73 the agc gain update timing is outputted from the controller 71 for example at timings t 1 to t 4 shown in fig5 first to fourth positions for each of the slots in this case the table 73 stores therein the information of the respective timing positions t 1 to t 4 with reference to the slot boundary for each of the slots as shown in fig5 the counter 72 starts to count up the clocks with the slot boundary as a trigger and when the count value coincides with the information of the storage timing positions corresponding to the slot formats for example slot no respectively the controller 71 outputs the slot agc update timing signal at that time as shown in fig5 the reason that the agc gain update timing is shifted for each of the slots is to prevent the update of the agc gain from being conducted at the symbol position of the same w cdma wideband cdma.