adjusted in advance the voltage level difference between the input signal and the reference signal vref or vref u2212 is increased when the voltage level of the input signal in is adjusted to an opposite voltage level and then applied to the positive terminal of the differential amplification unit 21 so that a voltage level of the output signal of the input buffer may be rapidly adjusted to the opposite voltage level if the input signal of a logic high level is applied to the differential amplification unit 21 the first reference signal vref is selected as the reference signal therefore if the voltage level of the input signal is adjusted to a logic low voltage level the difference between the first reference signal vref and the input signal increases referring to fig5 the reference voltage adjusting unit 23 includes a first reference voltage adjusting unit 23 a and a second reference voltage adjusting unit 23 b the first reference voltage adjusting unit 23 a includes a first resistance r 1 a first nmos transistor t 1 a second nmos transistor t 2 and a second resistance r 2 connected in series between a power supply voltage vdd and a ground gnd two nmos.