be a film that can be etched selectively to the pad films 118 120 122 the box 104 and the gate dielectric film 130 polysilicon is one example and other suitable materials can also be used this gate 128 material is deposited to a thickness sufficient to completely cover the regions between the silicon islands to a height well above the pad films 118 120 122 the gate conductor film is then polished for the case where the gate conductors are connected together the polish would stop above the layer of the pad films 118 120 122 with the height above the pad films determined by the resistive path between the gates see fig6 a and 6 b in the case where the gate conductors are independently addressed the polish would proceed until the pad films 118 120 122 are reached as shown in fig1 a and 13b the latter case is shown in fig1 a and 18b after polishing the gate 124 after defining the pc mask 126 the gate 128 is etched selectively to the gate dielectric box films and the dielectric 130 on the silicon line if the dielectric on top of the silicon line 106 108 110 is the gate dielectric then stopping the etch without penetrating the gate dielectric will be quite challenging after this etch process the structure will be similar to that depicted.