in capacitance as a function of the channel geometry as the result of simulations fig6 shows a second exemplary embodiment of the present invention corresponding elements have been provided with the same reference numerals as in fig1 and 2 in this particular exemplary embodiment in fig6 once again a gate electrode is provided which is divided into two surface sections 30 32 and the plating of the gate electrode is porous and designed in such a way that each gas to be detected is able to penetrate through the gate electrode to the surface of the underlying gate stack layer on the insulator layer here as well however the gate stack layer surface is geometrically divided into two sections 34 36 corresponding to surface sections 30 32 and is provided with materials of differing gas selectivity sensitivity gate stack surface layer 34 36 is produced from electrically insulating materials for example from oxides such as silicon dioxide sio 2 aluminum oxide al 2 o 3 hafnium oxide hfo 2 tantalum oxide ta 2 o 5 or zirconium oxide zro 2 and or from nitrides such as silicon nitride si 3 n 4 or boron nitride bn for example and or from carbides such as silicon carbide for example and or from silicides such as tungsten silicide wsi 2 or tantalum silicide tasi 2 for example different doping of the two gate stack surface layers 34 and 36 using metals such as pt or pd for example may also contribute to gate regions 30 and 32 having different sensitivities or selectivities typical layer thicknesses of the gate stack surface layers are in a range of 10 nm to 500 nm preferably 20 nm to 100 nm the present invention is.