first trenches 26 for the waveguide the trenches 12 14 and 26 may be formed by a process such as reactive ion etching rie illustrated in fig2 are the second trenches 28 formed for the waveguide second trenches should not extend all the way through the semiconductor layer 16 in one exemplary embodiment there should be about 10 to 150 nm of semiconductor layer 16 left at the bottom of trenches 28 in this process the cmos device and germanium photodetector may need to be masked to prevent further etching of the cmos device and germanium photodetector pillars of semiconductor layer 16 result in the germanium photodetector waveguide and cmos device after the etching steps oxide 30 is then conventionally deposited to fill the trenches 12 for the cmos device trenches 14 for the germanium photodetector and trenches 26 28 for the waveguide as shown in fig3 referring now to fig4 and 16 the silicon nitride layer 24 has been stripped leaving the pad oxide layer 22 well and v t implants are then conventionally done for the cmos device as indicated in box 1608 in fig1 the implant energy for photonic devices depends on the thickness of the soi.