well fig9 is a plan view of three of the dram cells of fig6 and 7 the layout shown in fig9 allows the use of a continuous polysilicon word line 914 or gate to connect the dram cells the upper plate of the capacitor which was shown as a ring shaped upper plate 612 around the memory cell in fig8 is now separated into two halves 912 one on each side of the continuous polysilicon word line fig1 is a summary of the major process steps required to form the improved dram cell in fig1 a p doped substrate is provided in step 1002 an implant mask is patterned to define the wells forming the guardrings in step 1004 the wells are implanted in step 1006 a gate oxide and polysilicon layer are formed in steps 1008 and 1010 the polysilicon layer is patterned to form the upper plate of the capacitor in step 1012 step 1014 represents the source and drain implant process and step 1016 shows the formation of the metalization interconnects fig1 is a schematic view of an image projection system 1100 using an improved micromirror 1102 according to the present invention in fig1 light from light source 1104 is focused on the improved micromirror 1102 by lens 1106 although shown as a single lens lens 1106 is typically a group of lenses and mirrors which together focus and direct light from the light source 1104 onto the surface of the micromirror device 1102.