different transconductances that is different products of the bias current by the degenerescence resistance the determination of the transconductance values to be used is performed for example by so called volterra developments according to an embodiment of the present invention all transistors are identical the behavior of transconductor 30 will be described hereafter in relation with fig3 b and 3c fig3 b which is to be compared with fig1 b and 2b illustrates gain g of the stage according to input output voltage v fig3 c which is to be compared with fig1 c and 2c illustrates the variations of the transconductor output current i out according to the same input voltage v the considered input voltage v is the base emitter voltage applied across the transistors in parallel 31 and 32 the gain of the transconductor remains constant at a value g 5 however each transistor 31 32 has a specific gain g 3 g 4 characteristic of a class ab stage especially beyond a given threshold v 0 each gain g 3 g 4 varies a multiple transconductance implementation according to the present invention enables obtaining inverse variations and same amplitudes for example gain g 3 tends to increase from threshold v 0 while gain g 4 tends to decrease for small input signals the transconductor then exhibits a class a behavior the.