gate 131 the output of gate 131 is an input to a multiplexer 133 multiplexer 133 is controlled such that if two signed 8 bit numbers a0 and b0 are being multiplied the single bit output of xor gate 131 is provided as the correction vector at bit position 16 in other cases zero is provided as the correction input the result of the addition of these quantities from csa 127 is provided to a 32 bit cpa 135 fig4 shows the multiplication of a u00d7 b0 carried out in the first multiplier 51 a register 101 contains operand a operand a may be a 16 bit number if signed bit 15 will be the sign bit it may also contain a first 8 bit number in bits 0 7 and a second eight bit number in bits 8 15 these are designated a0 and a1 if signed bits 7 and 15 are the respective sign bits operand a is first converted into a derivative operand a 39 which can be stored in a register 103 the lower 8 bits of a 39 are the same as the lower 8 bits of a the upper 8 bits of a 39 are either zeros or a sign extension of a 7 or the same as the upper 8 bits of a depending on the multiplication being performed a 3 1 multiplexer 57 selects one of these possibilities based on ctl input 60 for a 16 bit multiplication a 39 is the same as a and input 1 of multiplexer 57 is selected for signed 8 bit multiplications input 2 is selected and for unsigned 8 bit multiplications input 3 is selected to sign or zero extend a0 respectively operand b0 may be the lower 8 bits of a 16 bit number.