signal of interest the output signals of the receiver 10 which are generated in this way are input signals of the downstream baseband arrangement 11 and are fed as input signals to a respective analog to digital converter adc 12 after the conversion of the analog input signal into a digital output signal that is performed by the adc 12 the frequency shift is reversed again in the digital domain in the arrangement for correcting the frequency shift 13 that is displayed downstream of the adcs 12 measures for further suppression of adjacent channel interference of the type known from prior designs are furthermore carried out the signal subsequently filtered by a digital low pass filter is fed to the sampling rate converter the latter reduces the sampling rate to an integral value of the system 39 s basic sampling rate the signal adapted in terms of the sampling rate in this way is fed to a second digital low pass filter 16 and a further suppression of adjacent channel interference is thus realized the second digital low pass filter 16 may comprise a decimation stage for reduction to the basic sampling rate of the system the output of the second digital low pass filter 16 is connected to the demodulator 17 connected downstream the demodulator having an output for outputting the demodulated received bits according to the disclosure an aci detector 18 is additionally used which identifies the presence of adjacent channel interference exceeding a predetermined interference level and also the position of the adjacent channel interference in the spectrum of the signal of interest the term u201c position u201d means a shift of the adjacent channel interference relative to the signal of interest to a higher or lower frequency the aci detector 18 generates.