of an input stage of an operational amplifier the phase delay which the active load current mirror introduces into the single path is utilized in a way such that the phase delay of the overall stage is less than the delay of the primary differential pair it is a mathematical fact that when two sinusoidal signals of the same frequency are added together the result is also sinusoidal considering two such signals the second of which has a phase lag with respect to the first if the two signals are combined by the addition of ordinates the resulting sinusoid also has a phase lag however if the second signal is instead subtracted from the first then the resulting sinusoid has a phase lead with resect to the first signal the present invention makes use of this phenomenon by causing the delayed mirror signal to be subtracted from rather than added to the primary signal this produces a differential transconductance stage with less negative phase shift than that of the prior art in fact less than that of the primary differential pair alone application_number US 66205196 A description fig1 shows the differential stage of an operational amplifier in accordance with the present invention as shown in the fig1 schematic the differential pnp transistors q1 and q2 have their collectors split in an asymmetric fashion with the area of the cross coupled collector larger than the area of the primary collector specifically for pnp.