requirement of a single command that is a single word line activation in practice the steady driver 211 will have a large transistor width relative to the active driver 212 moreover each active charge injector transistor 213 214 will have even smaller transistor widths than the active driver 212 as shown in fig2 the active charge injector transistors 213 214 may have a small w 2 transistor width but may be u00bc width or less depending upon the given architecture and related load on the given array such modifications are possible so long as the size of the transistors is enough to compensate for current load of performing an active cycle in the memory in operation the active driver 212 moves down faster than the steady driver 211 because of the small miller compensation capacitor 220 and small driver size however drastic voltage drop is avoided by the active charge injector transistor operation such that the active charge injector transistors 213 214 preserve the vpp level without using complicated control logic decoding it should be understood that the charge injector transistor logic is implemented using delays and d flip flops where the additional logic is negligible relative to known manner of providing a huge reservoir capacitor to be able to keep vpp at a desired level further the fast response of the active charge injector transistor elements 213 214 does not require any feedback loop to ensure the quick recovery of vpp level as well pvt variation of the vpp level and current consumption can be tuned by pulse width control for process variation voltage and temperature variation are basically resolved with pmos driver temperature and voltage variation of turn on current without trimming.