column and with the replica amplifier absent middle column as indicated by the table the effective dc gain is increased using the replica amplifier by a factor of about 13 with no load resistor and a factor of 50 with a one kilohm load without degrading other performance parameters while the power dissipation and the die area are greater with the replica amplifier and coupling circuit than without the power and area increase can be reduced by scaling down the replica amplifier as discussed above in connection with fig4 the principles of the present invention can be used with other designs and in conjunction with other elements such as the addition of a cascode transistor for example referring to fig7 a replica amplifier 52 is coupled to a main amplifier 50 through transconductance stage 54 this embodiment is similar to that described in conjunction with fig5 a except that the input stages of both the main amplifier 50 and replica amplifier 52 are connected to receive differential inputs and there are no transistors in series with capacitors c 1 and c 2 referring to fig8 a the replica amplifier technique can be applied to other types of amplifiers such as a folded cascode topology in.