word generated by the circuit 18 the memory address words generated by the time base logic circuit 18 are also applied to a comparator 30 that receives as its other input the word stored in the trigger register 16 and representing the location within the waveform memory 8 of the data word that occurred immediately following the trigger pulse the comparator 30 generates an output pulse when the timebase logic circuit 18 generates a memory address word that is the same as the word stored in the register 16 or defines a location in the memory 8 that was filled after the location defined by the address stored in the trigger register 16 when the comparator 30 generates an output pulse the controller enters a trigger display subroutine in this subroutine the counter 26 is disabled and accordingly the horizontal display address word provided by the counter 26 remains constant throughout the subroutine the memory address word provided to the memory 8 remains constant and therefore the vertical display address word provided by the memory remains constant the controller applies offsets to the horizontal and vertical display address words through offset circuits 38 and 40 that are connected respectively between the counter 26 and the horizontal dac 24 and between the waveform memory 8 and the vertical dac 20 the offsets that are applied to the display address words provided by the counter 26 and the waveform memory 8 cause a letter t to be displayed immediately above the display point represented by the outputs of the counter 26 and the waveform memory 8 the letter t may be composed of a vertical row of three display points and a horizontal row of.