the metal component such as tantalum nitride tan rich in tantalum or tantalum carbide tac rich in tantalum subsequently the gate electrode material 18 can be patterned using lithography and an anisotropic etch technique e g reactive ion etching to define sidewall surfaces of the gate electrode 18 as shown in fig4 although not shown dielectric spacers can then be formed upon the sidewall surface of the gate electrode 18 via chemical vapor deposition of a dielectric followed by an anisotropic etch technique which etches the dielectric at a faster rate in the vertical direction than in the horizontal direction without intending to be limited by theory it is believed that the presence of the gate electrode 16 comprising tin rich in ti in the gate structure affords additional protection against the growth of oxide at the surface of the silicon based substrate 10 because the gate electrode 16 has a relatively low oxygen content and forms a good barrier to the diffusion of oxygen fig4 also depicts the formation of source and drain s d junctions 20 in the silicon based substrate 10 on opposite sides of the gate electrode 18 in the case where an nfet is being formed the s d junctions 20 can be formed through the implantation of p type dopants therein in the case wherein a pfet is being formed the s d junctions 20 can be formed through the implantation of n type dopants therein while fig4 only depicts the formation of one type of fet it is understood that both nfets and pfets can be formed upon the silicon based substrate 10 when it is desirable to form a complementary metal oxide semiconductor cmos integrated circuit during the implantation step the gate electrode 18 and the dielectric sidewall spacers if present.