thereby allowing the capacitor c osc to begin charging again the discharge time of the capacitor c osc is preferably designed to be approximately equal to one half of the period of the oscillation t r see reference in fig4 for the voltage v 39 q1 across the switching transistor q1 therefore the maximum variation in a switching period is given by equ1 where t r is the period of oscillation of the voltage v 39 q1 across the switching transistor q1 and t s is the original switching period of the flyback converter 800 those skilled in the art should recognize that although the charging time of the capacitor c osc is slightly reduced the discharge time is substantially unaffected thus resulting in only a slight increase in the flyback converter 800 switching frequency furthermore an examination of the resulting voltage v 39 q1 across the switching transistor q 1 reveals that the switching occurs at a point reference a in fig9 when the voltage v 39 q1 is at a peak minimum thus resulting in reduced turn on losses in the switching transistor q 1 and therefore improved overall efficiency for the flyback converter 800 at nearly constant operating frequency turning now to fig1 illustrated is another embodiment of a control circuit of the present invention employed in the flyback converter 800 of fig8 as previously mentioned the control circuit constructed in accordance with the principles of the present invention is embodied within the synchronization signal generating circuit 810 and the drive signal modifier circuit 820 the synchronization signal generating circuit 810 includes the rectifying element 812 and pulse shaping circuit 814 the pulse shaping circuit 814 however includes a resistor 1015.