output a signal with the h level accordingly regardless of the level of the data signal thus input the signals outp and outn both become signals with the l level in the embodiment the dff 44 has a function of retrieving the odd data at the timing of the rise of the clock signal from the signal outp according to a clock signal cmos_clk refer to an input clk shown in fig3 further the dff 44 has a function of outputting the odd data thus retrieved to the selector 21 similarly the dff 45 has a function of retrieving the even data at the timing of the rise of the clock signal from the signal outn according to the clock signal cmos_clk refer to the input clk shown in fig3 further the dff 45 has a function of outputting the even data thus retrieved to the selector 20 in the embodiment the dffs 44 and 45 are formed of a flip flop circuit having an identical configuration and has a configuration the same as that of the dff 34 of the differential input circuit 16 refer to fig5 the configuration of the dffs 44 and 45 is not limited to that in the embodiment and the dffs 44 and 45 may have a configuration different from that of the dff 34 an operation of the single input circuit 18 for retrieving the data signal in the single input method will be explained with reference to fig3 and 5 in the embodiment in the dffs 44 and 45 when the clock signal is the l level the signal flowing through the signal line 86 is the h level and the.