read prior to the start of the reading operation the bit lines bl1 and bl2 are pre charged to a high level state for instance 5 v and the bit line bl3 is pre discharged to a low level state for instance 0 v in advance in these states when the input output terminal b of the bistable circuit 9 is in a low level state a current flows from the bit line bl2 to the input output terminal b via the nmos 29 the nmos 29 is turned on by bringing the word line wl2 to a high level state and turning on the pmos 33 by bringing the word line wl3 to a low level state as a result the bit line bl2 becomes a low level state and the voltage information written in the input output terminal b of the bistable circuit 9 is read by the output circuit not shown connected to the bit line bl2 moreover since the input output terminal b is in a low level state the pmos 31 is turned on and a current flows in the bit line bl3 via the pmos 31 and pmos 33 because of this the bit line bl3 becomes a high level state and an inverted voltage information which has a logic level that is the reverse that of the voltage information written.