0 the fixed number of cycles earlier similarly a delaying element 20 2 is provided on the control signal line 14 0 to delay control signals passing to the processor 4 1 so that the processor 4 1 is controlled to execute the operations the fixed number of cycles later than the processor 4 0 also a third delaying element 20 3 is provided in the signal path between the processor 4 0 and the comparison circuitry 10 to delay the output of the processor 4 0 corresponding to the shared auxiliary circuit by the fixed number of cycles so that the comparison is performed once the output of the processor 4 1 becomes available by duplicating the auxiliary circuits 8 0 8 1 then in the performance mode each processor 4 0 4 1 can independently use the auxiliary circuit and so performance is increased on the other hand in the locked mode auxiliary circuit coherency is ensured because each processor uses the same auxiliary circuit the auxiliary circuit 8 0 8 1 may comprise many different types of circuit component some examples of types of auxiliary circuit are illustrated in fig3 a to 3g one type of auxiliary circuit which can be used for the present technique is a self protecting auxiliary circuit 8 a which comprises error detecting logic 30 for detecting errors in operation of the self protecting auxiliary circuit 8 a see fig3 a as the self protecting auxiliary circuit 8 a has its own error detection capability duplication of this circuit is not required during the locked mode and so coherency can be achieved by using only one shared auxiliary circuit 8 a during the locked mode other types.