result of this exclusive or operation is xored with the third leftmost bit from the parallel bus 202 in exclusive or gate 210 the result of exclusive or gate 210 is xored with the fourth leftmost bit from the parallel bus 202 in exclusive or gate 214 the bit by bit xor may be implemented on any data width and need not be restricted to the 4 bit wide example of the embodiment 200 in fig2 greater or fewer xor gates may be added or subtracted such that they are sufficient to xor in the fashion shown above for the entire data set provided by the parallel bus 202 it will be understood by one of ordinary skill in the art that the bit by bit xor circuit 200 shown in fig2 may be implemented using different types or arrangements of gates without departing from the scope of the present invention it will be understood by one of ordinary skill in the art would be to create other flowcharts illustrating how to implement other embodiments of the present invention that enable use of the adjacency principle of gray code over any even count range of values turning now to fig3 the particular methods of the invention are described in terms of computer software with reference to a flowchart 300 the methods to be performed by a computer constitute computer programs made up.