maintaining full fibre channel arbitrated loop fc al compliance switch matrix 408 provides a quasi direct architecture in the form of a buffer less switch matrix switch matrix 408 includes data multiplexers that provide a path to each port in one aspect twenty multiplexers may be used in one aspect data is 16 bits wide plus the internal u201c k u201d control signal and two parity bits at power up sga 408 is setup in a flow through configuration which means all ports send what was received on host port 404 when a valid lip sequence occurs sga 408 configures the switch to a complete loop configuration for the address selection process during normal data transfer on the loop sga 408 reconfigures the switch data path to connect the active ports in what appears as a smaller loop which lowers the latency but still emulates fc al functionality to all entities on the loop during loop configuration sga 408 configures the switch data path to include a snooping port that walks through each port during the lip physical address assignment to track each port 39 s assigned arbitrated loop physical address al_pa this snooping process is called the u2018 lip walk u2019 when the lip process is done the firmware records the u201c port to al_pa u201d map in an internal table built in sga 408 during normal data transfer mode sga 408 monitors arbitration requests open requests and close primitives to determine which ports have.