coincident with the present time disappears in the logic simulation processor fig3 shows the construction of an embodiment of the current time output unit according to the invention referring to fig3 the current time output unit comprises a counter 21 a control means 22 and an or gate 23 with signal lines 910 911 800 806 811 and 812 connected to the above components the or gate 23 delivers to the signal line 911 the true value when at least one of the signal lines 806 and 811 assumes the true value but the false value when both of the signal lines 806 and 811 assume the false value the counter 21 always delivers current time to the signal line 800 prior to start of a simulation operation the control means 22 delivers to the signal line 910 an instruction for initializing the current time when receiving the current time initialization instruction from the signal line 910 the counter 21 sets the current time to zero during execution of the simulation operation the control means 22 reads values on the signal lines 800 812 and 911 and delivers an instruction for updating the current time when the value on the signal line 800 is smaller than that on the signal line 812 and the signal line 911 assumes the false value.