masking layers for fabricating inverse mems structures u201d proc spie 7972 79722j 2011 doi 10 1117 12 881653 and 2 scott a ostrow and jr ronald a coutu u201c novel microelectromechanical systems image reversal fabrication process based on robust su 8 masking layers u201d j micro nanolith mems moems 10 033016 sep 2 2011 doi 10 1117 1 3625633 both of which are incorrorated herein by reference the process starts with the coating of a clean silicon wafer with su 8 at the standard spin speeds a 5 u03bcm thick su 8 layer was utilized in the development of this novel process this is followed by a ramped softbake with a bake at 65 u00b0 c for 3 min followed by a bake at 110 u00b0 c for 10 min this is a longer bake time and higher bake temperature than typically prescribed but it is critical to ensure the integrity of the su 8 layer and to optimize material compatibility throughout subsequent processing after a rest of several minutes at ambient temperature to allow for the su 8 layer to stabilize the wafer sample is coated with a buffer layer of s1818 positive photoresist which serves to protect the su 8 from being exposed and crosslinked during metal deposition allowing the su 8 layer to stabilize creates a solid base for the s1818 layer and reduces the chances of unwanted interactions between the two photoresists the su 8 layer needs to be protected.