for the first raster address generated in the frame the pixel position counter 204 would generate the two consecutive pixel positions xo yo and xl yo the x y position values are provided as an input to the video window detect circuit 206 which compares the position values with the limits of the video window in the preferred embodiment the limits of the video window are stored as an upper left window corner position xul yul and a lower right corner window position xlr ylr in registers 220d 220g when an x y position is within the video window detect circuit 206 an indicator signal is provided to the mux 208 and the video data address generator 210 window detect circuits are well known in the art and so will not be discussed in further detail herein the video address generator 210 generates a series of video data addresses beginning from the video data base address stored in register 220h the video data addresses are received at a second input to the mux 208 if the indicator signal from the video window detect circuit 206 is received by the mux 208 the video data addresses are output from the mux 208 instead of the graphics raster addresses the frame buffer.