these cases of extreme voltage instability this specification will subsequently further examine maximal flatness and other criterion engaged in the aforementioned processes fig4 through fig9 provide results from varying physical parameters during simulation and thus further define u201c maximal flatness u201d of output voltage in response to current transients in an actual realizable system this specification of the present invention will hereinafter use the notation of a verr m to refer to the voltage instability amplitude prior to contributing a ierr m and n 0 compensation and a verr m u2032 to refer to the voltage instability amplitude after applying any of the previously described techniques fig4 illustrates a time domain response plot 400 from a simulation comprising two transitions of power states for an exemplary embodiment of the present invention as shown in all response plots starting from plot 400 of fig4 through response plot 900 of fig9 inclusively the left vertical axis 403 displays a scale of amperes that apply to the legend 402 indicating the sum of currents into model loads iload 110 and r 111 in the schematic plot 100 of fig1 iload 110 transitions at a rate of u2212 20 amperes per microsecond at simulation time 100 microseconds in all plots 400 through plot 900 of fig4 through fig9 inclusive also common to all these plots 400 through 900 inclusive along the right vertical.