of the npn transistors qd 1 qd 2 the emitter electrodes of which drive the gate electrodes of the nmos transistors nd 1 nd 2 and resistances rd 1 rd 2 the drain electrodes of the nmos transistors nd 1 nd 2 with load current provided via the resistances rd 1 rd 2 provide the output signal phases 15 p 15 n the current required by the output stage 114 a as supplied by the current source 120 d is equal to the required load current iload as for matching the output impedance of the output stage 114 a to the load 16 as well as the signal transmission medium it should be readily understood that the 100 ohms of the load impedance 16 is matched by the sum of the impedances of the resistances rd 1 rd 2 as should be readily understood by one of ordinary skill in the art an ac signal analysis will show that the upper ends of the resistances rd 1 rd 2 are effectively terminated at signal ground potential due to the extremely low impedances of the emitter follower outputs at the emitters of the npn transistors qd 1 qd 2 while at the lower ends of the resistances rd 1 rd 2 the nmos transistors nd 1 nd 2 do not affect the signal due to the high impedances of their channels while operating in saturation additionally the supply current ip required by the pre driver stage 112 a can be minimized by increasing the resistance values of the pre driver resistances rp 1 rp 2 since the pre driver output signals 13 p 13 n drive the large input impedances of the output stage emitter.