to pld core building blocks 240 along ipconfigctl bus one advantage of the present invention is the ability to dynamically reconfigure embedded ip building blocks 280 another advantage of the invention is that the invention allows the user to obtain valuable status information stored in the status and control registers in embedded ip building blocks 280 yet a third advantage of the invention is the ability to select between configuring embedded building blocks 280 using mdio 260 or using pld configuration control block 230 the table in fig3 shows four possible frames address write read and read increment that may be implemented by the mdio 260 in one embodiment of the invention the address frame overwrites the address register with the new preferably 16 bit address in the address field the write and read frames access the register whose address is stored in the address register the read increment frame increments the address register by 1 after completing the read operation the management frame fields shown in fig3 are as follows pre preamble shows a signal of 32 ones to establish synchronization st start of frame is typically a lt 00 gt pattern op operation code is typically lt 00 gt for address lt 01 gt for write frame lt 11 gt for read frame and lt 10 gt for read.