permitted vrefl is present between terminals 206 and 207 then the resulting adc out value has a value of zero as desired this is indicated in fig1 by the arrow adc data min 0 the corresponding smallest allowable slope of the voltage on node 227 is indicated by dashed line 404 the minimum vin voltage vin_min is illustrated on the vertical axis of the upper waveform of fig1 fig1 is a flowchart of a novel method of calibrating and operating microcontroller 205 of fig5 initially step 500 a first high calibration voltage for example vrefh is supplied onto the input lead 227 of an integrating adc the adc performs a conversion and a first counter value is obtained processor 201 then determines an offset between the first counter value and a high desired adc output value for example 2 n a second low calibration voltage for example vrefl is then supplied onto the input lead 227 of the integrating adc the second low calibration voltage for example ground potential is a voltage that is to be converted by the integrating adc into a low desired adc output value for example zero the adc performs a conversion and a second counter value is obtained next step 503 the second counter value is used to determine a scaling factor the scaling factor is such that when it is applied to an offset corrected counter value under the condition when the first high calibration voltage is on the adc input terminals the scaling factor has no affect the scaling factor is such that when it is applied to an offset corrected counter value under the condition when the second low calibration voltage is on the adc input terminals the result of applying the scaling factor is the.