tibnx zrsinz wsinx wbnx zralnx mosinx moalnx moalnx tasinx taalnx etc a bit line 146 bl may then be formed on the upper electrode 144 as illustrated as will be understood by those skilled in the art the series resistance and phase e g crystalline or amorphous of the phase changeable material region may be determined during a memory read operation by passing a forward read current through the phase changeable material region this read current may be provided by enabling a selected bit line 146 as a current source and enabling a corresponding selected word line 144 as a current sink according to alternative embodiments of the present invention the phase changeable material region 140 illustrated by fig2 c may be modified by planarizing 60 the phase changeable material region 140 to have an upper surface that is planar with the growth inhibiting layer 138 as illustrated by fig3 a alternatively the planarization step 60 may be performed for a greater duration to expose the seed layer 136 or the upper interlayer dielectric layer 130 referring now to fig3 b an electrically insulating dielectric layer 142 may be deposited on the planarized phase changeable material region 140 and then patterned to define an opening therein that is then filled with the upper electrode 144 a bit line 146.