a vt below vss the output is pulled down through transistor 89 to vss during program the output of a corresponding control circuit 80 for a deselected row is 5v the input is at 0v causing transistor 88 to be on and transistor 89 to be off since signal line 96 is at 5v the output is pulled up to 5v through transistor 88 vdd 5v with signal line 96 at 5v transistor 89 is off and the charge pump is off during read the output of a corresponding control circuit 80 for a selected row should be at 2v the control circuit 80 for the row has vdd at 2v vss at 2v vrr at 3v and clock input inactive to select the row the input is at 0v which causes transistor 88 to be on and transistor 89 to be off signal line 96 is pulled high to 2v transistor 87 is a very weak transistor and will be on providing a current path between vrr and vdd through transistor 83 and inverter 90 but by sizing the transistors 87 and 83 and by making the source of vrr strong this current can be sustained and the voltage on signal line 96 can be held close to 2v turning transistor 89 off therefore the output is at 2v.