so shaped as shown in a 4 of fig2 and its corresponding chip side alignment mark is so shaped as shown in b 4 of fig2 with such shapes of the alignment marks the shape of c 4 of fig2 is derived when one alignment mark is placed on the other fig1 b is a schematic cross sectional diagram for illustrating a semiconductor package being another example of the semiconductor device to which the invention is applied the semiconductor package 1 of fig1 b is configured to include the circuit board 2 being a glass epoxy circuit board a first semiconductor chip 14 mounted over the circuit board via a die bonding material 13 and a second semiconductor chip 15 so disposed as to have a predetermined gap with the first semiconductor chip an electric connection is established between an electrode 16 of the first semiconductor chip and an electrode 17 of the second semiconductor chip by the protruding electrode 6 the protruding electrode 6 is called bump and is formed mainly using soft solder there is a gap between the first and second semiconductor chips and the gap is filled with the underfill material 7 being a resin material this material filling is aimed to increase the connection reliability by relaxing any external stress thermal stress included applied to a bump jointed portion the first semiconductor chip is electrically connected to the circuit board by a bonding wire 18 and the first and second semiconductor chips are sealed by the mold resin 8 being a resin material on the second semiconductor chip side surface of the first semiconductor chip an aluminum made alignment mark 19 with a thickness of about 1 12 u03bcm is formed which is hereinafter referred to as first.