processing and level forming steps are modified such that a conducting stud 82 is placed in contact with the conductor 80 near the dicing plane of the stackable integrated circuit chip pursuant to the present invention stud 82 is waffled as shown as used herein the term 34 waffled 34 means any shape in which the conducting material forming the stud is not uniformly distributed throughout the volume which the stud occupies the waffled nature of the stud provides benefits both during fabrication and during its use the fabrication advantage involves an improvement in the filling and planarization steps more fully discussed below the advantage of the waffled stud in use involves the additional electrical contact surfaces of the stud in the particular embodiment shown in fig3 the contact surface near the edge of the cube would include surfaces 86a c and surface 84 however surfaces 88a c are now also available for electrical contact with the module face conductor if proper polishing and etching are used to create and expose these surfaces a deposited module face conductor will 34 fill 34 the etched voids and therefore contact the vertical surfaces 88a c those skilled in the art will understand that the isometric view shown only depicts the metallized portions of the conductor levels and that insulating materials would actually be contained within the voids in the waffle structure however this insulator may be etched away during module face processing resulting in surfaces 88a c which surfaces can then be used during the module.