the suggested download algorithm or set of instructions and system architecture can be easily enhanced to have a better functionality for example the suggested architecture as can be seen in fig2 involves time slots when the memory is not available for execution with the required code in these cases while the memory device is in the process of downloading the required code for execution it is required to supply a u201c busy signal u201d 26 to the executing entity 30 in order to notify that the required code is not yet available the executing entity 30 should use the u201c busy signal u201d 26 in order to hold off the execution attempt until the memory device is ready and able to supply the required code there are many prior art platform dependant methods of holding off an execution attempt a further preferred embodiment of the present invention describes a dual or multiple sram buffer 20 this buffer or set of buffers as can be seen in fig2 can be used in order to prevent the memory from being locked for accesses during download operations in this case the download operation will load the requested content to one sram buffer referred to as download logic 22 while the other sram buffer 20 remains accessible and executable the executable buffer 20 can be expanded to include two or more executable buffers in this case with proper support of the download state machine it is possible to support code execution from one or more buffers while simultaneously modifying.