net to pin relationship each pin record also has a back pointer field called the parent net field 144 for linkage back to the net record 138 one skilled in the art can readily see how relationship information between instances nets and pins can be stored and accessed according to the design file definition fig7 is a diagram illustrating a portion of a design file showing the pin arc relationship note how a pin record 146 links a list of source arc records via the first source arc pointer field 148 and a list of destination arc records via the first destination dest arc pointer field 150 each arc record has a next destination arc for source field 152 for linking additional arc records to a source list each arc record also has a next source arc for destination field 154 for linking additional arc records to a destination list each arc record in a source list has a source pin field 156 pointing back to the pin record 146 each arc record in a destination list has a destination pin field 158 pointing back to the pin record 146 one skilled in the art can readily see how relationship information between pins and arcs can be stored and accessed according to the design file definition a reduced design file has a substantial portion of the internal interconnect information of a lower level design removed from the original design file more precisely it is a design file which contains only paths that are.