as it is patterned to further serve as an rpo film during a subsequent silicidation process the composite dielectric layer covers part of a semiconductor substrate that includes a gate structure the tensile stressed nitride layer protects the oxide layer and alleviates oxide damage during a pre silicidation pai process portions of the gate structure and the semiconductor substrate not covered by the composite dielectric layer include amorphous portions that include the pai implanted dopant impurities a silicide material is disposed on the gate structure and portions of the semiconductor substrate not covered by the composite dielectric layer application_number US 86164210 A description fig1 is a cross sectional view showing semiconductor device 4 and substrate 2 substrate 2 may be a conventional semiconductor substrate such as silicon gallium arsenide or other suitable substrates used in the semiconductor manufacturing industry substrate 2 includes surface 3 in one exemplary embodiment semiconductor device 4 may be a transistor such as an nmos n type metal oxide semiconductor or pmos p type metal oxide semiconductor transistor but other suitable semiconductor devices may be processed according to aspects of the disclosure in other exemplary embodiments in the illustrated embodiment semiconductor device 4 includes gate electrode 6 formed over gate dielectric 15 formed over channel region 12 gate electrode.