mf1 is connected to the output of the first operational amplifier 25 and through r15 to v the source terminal of mf1 is connected to the collector of q5 and the drain terminal is connected through r16 to the inverting input of the first operational amplifier 25 and to the emitter of q5 the substrate terminal of mf1 is connected to its drain terminal and to the base of q5 the second current regulator 31 comprises two resistors designated r17 and r18 a p channel mosfet designated mf2 and a pnp transistor designated q6 the output of the second operational amplifier 27 is connected to the gate of mf2 and through r18 to v the source terminal of mf2 is connected through r17 to the inverting input of the second operational amplifier 27 and to the emitter of q6 the drain terminal of mf2 is connected to the collector of q6 the substrate terminal of mf2 is connected to its source terminal and to the base of q6 r ref is connected between the emitters of q5 and q6 the first and second current regulators 29 and 30 illustrated in fig3 are relatively conventional circuits wherein the mosfets provide high input impedance to the outputs of the operational amplifiers and are used to control the magnitude of the current passed by q5 and q6 the functions of sb1 and sb2 illustrated in fig2 are performed by a circuit comprising three resistors designated r19 r20 and r21 two diodes designated d8 and d9 and a pnp transistor designated q7 r19 is connected from the junction between r8 and zd1 of the reference voltage supply to the base of q7 r20 is connected between the base of q7 and v the emitter of q7 is connected to v the collector of.