q 3 and the capacitor c 2 and the frequency generator 10 are connected in parallel and the frequency modulation signal controls the magnitude of current of a collector of the transistor q 3 such that the current passing through the capacitor c 1 can be reduced due to the divided current of the transistor q 3 and the capacitor c 2 so as to change the speed of charging or discharging the capacitor c 1 and limit the frequency width of the frequency reference signal and the frequency reference signal affects the frequency of a duty cycle of the pulse controller 2 to generate a second duty cycle with a frequency different from that of the first duty cycle further the intensity of the frequency modulation signal is too high such that after the transistor q 3 is saturated the current of the current of the transistor q 3 stops rising and forms a frequency limit boundary of the frequency reference signal and the pulse controller 2 uses the frequency reference signal and the voltage reference signal to produce a third duty cycle and adjust the brightness of the lamp set 7 referring to fig3 and 5 to 7 fig3 shows a circuit having nodes a to e and fig5 to 7 show a voltage waveform of each node at different operating conditions wherein node a is the voltage waveform of the frequency reference signal and node e is a voltage waveform of the adjusting signal and nodes b and c are the voltage waveforms of the gates of the primary switch 51 and the secondary switch 52 respectively and node d is a voltage waveform of the transformer 6 the adjusting signal at e of.