way if the conversion range is selected so that no overflow will occur in the beginning of every connection the radio is switched on before the data reception is started during this time the receiver can be synchronized with the incoming data flow when the signal is prevented from reaching the radio the binary word w o corresponding to the offset voltages of the radio the mixer and particularly of the fm detector can be read from the a d converter 7 this binary word w o is supplied to the logic which reads and stores it in the register block 9 into a register allocated for it from each binary word w s representing a received symbol and provided by the a d converter 7 the logic subtracts the fm detector 39 s offset voltage whereby individual differences of the fm detectors can be compensated for the register block 9 contains also the decision levels and the alarm levels an adder 10 is also connected to the register block 9 the 8 bit digital comparator 11 compares each input binary word w s with the decision levels and the alarm levels the updating logic 12 updates the decision levels and the alarm levels the system decoding logic 13 outputs serial data fig3 shows a function diagram of the decision logic of the signal detector according to the invention.