by the design of the 3d device structure 10 referring now to fig5 spacers 40 42 have been conventionally formed on gates 24 26 by deposition of a spacer material such as a nitride followed by a dry etching process sources 44 46 and drains 48 the drain for first fin 18 is hidden by gate 24 may be formed for example by doping the spacers 40 42 sources 44 46 and drains 48 for each of the structures in the 3d device structure 10 may be the same or different as required by the design of the 3d device structure 10 a cross section of the 3d device structure shown in fig5 is taken in the plane indicated by arrows 6 6 and shown in fig6 shown is a 3d device structure 10 including a first 3d device 50 such as a finfet or trigate device and a second 3d device 52 such as a finfet or trigate device the first 3d device 50 has a first device width and the second 3d device 52 has a second device width such that the first device width is different from the second device width the difference in device width is more than that obtained just through manufacturing tolerances in an exemplary embodiment the first device width and the second device width should differ by at least 20 referring now to fig7 a second exemplary embodiment of the 3d device structure 110 will be discussed the starting structure shown in fig7 is the same starting structure shown in fig1 the 3d device structure 110 includes a substrate 112 which may be a bulk semiconductor substrate such as silicon or may be an soi substrate as shown in fig7 the soi substrate 112 includes a bottom semiconductor layer 114 and a.