memory of fig1 further fig1 is a view of the sequence flow at the time of programming data after this below an explanation will be made of the sequence flow of fig1 and fig1 referring to the example of the configuration of fig1 etc first an explanation will be made of the sequence flow at the time of erasing data in fig1 at step s21 the data erasing operation is commenced at step s22 the number of times k of the erasing verify operation is set to the initial 1 then an erasing operation for applying an erasing pulse step s23 and a verify reading operation step s24 are continuously carried out when the end point showing that all of the memory cells in the block have finished being erased can be detected as a result of the verify reading operation of step s24 step s25 the data erasing operation is ended on the other hand when the end point showing that all of the memory cells in the block have finished being erased cannot be detected as a result of the verify reading operation of step s24 step s25 at step s26 it is checked whether or not the number of times k of the erasing verify operation is less than the predetermined number of times k0 for example about 10 to 100 times set in advance when the result is that the number of times k of the erasing verify operation is less than the set number of times k0 the number of times k of the erasing verify operation is further incremented step s27 and.