produce differentiator output s 17 as shown in fig1 the first inverter 324 receives the differentiator output s 17 which inverter 324 comprises a resistor r 302 a diode d 301 and a transistor q 301 the invertor 324 inverts and shapes the differentiator output s 17 to produce negative rectangular pulse s 18 in fig1 the negative rectangular pulse s 18 is again differentiated through the second differentiator 325 which comprises a resistor r 303 and a capacitor c 302 a differentiator output s 19 is again inverted to a positive rectangular pulse serving as the shift up signal s 6 the shift up signal s 6 has a duration corresponding to a predetermined retard angle the second inverter 326 thus includes a resistor r 304 a diode d 302 and a transistor q 302 which is turned off in response to the differentiator output s 19 to produce the constant duration of shift up signal s 6 the shift up signal s 6 is fed to the integrator 204 of the arithmetic circuit 200 via the diode d 301 as set forth the shift up signal s 6 is inputted to the negative input terminal of the operational amplifier op 202 the integrator output s 15 representative of a predetermined retard angle is thus produced in a period of time corresponding to the duration of the shift up.