but delayed to be same as the read trigger would be during the read cycle to protect half selected columns during a write operation the write signal too may be used if the timing is as good fig3 depicts an illustrative timing diagram of a write operation showing the behavior of wordline wl 44 and node nt 42 fig1 after the wl assist is released i e deactivated at delay t d traces 44 u2032 and 42 u2032 depict the behaviors of the wordline wl and node nt without deactivation of the wl assist as can be seen nt 42 flips sooner relative to nt 42 u2032 when the assist is deactivated in addition it can be seen that wl 44 remains stable fig4 depicts an illustrative timing diagram of a read operation showing the behavior of wordline wl 52 and bitline bl 54 see fig1 after the wl assist is released i e deactivated at t d traces 52 u2032 and 54 u2032 depict the behaviors of the wordline wl and node nt without deactivation of the wl assist here again it can be seen that bl 54 outperforms bl 54 u2032 and wl 52 remains stable throughout fig5 depicts a flowchart for implementing dynamic wordline assist for an sram device at s 1 a read or write cycle begins and at s 2 the wordline.