16 with the gain k the input voltages u 1 and u 2 are delivered by the two line paths for the data and configuration cells the differential amplifier stage 16 outputs the output voltage ua k u00b7 u 1 u2212 u 2 next the result is shifted in the voltage range such that no level is at 0 volt fig6 shows the difference voltages for the different configurations and also the prohibited zone in this case the 0 volt level is situated centrally between two levels specifically between those levels at which the rating is intended to take place voltages above the prohibited zone deliver a logic high signal and voltages below the prohibited zone deliver a logic low signal accordingly the shift has to take place in a negative direction that is to say downward in the graph from fig6 by the reference voltage uref 1 xmr p u00b7 u 2 in other embodiments this level can also be combined with the differential amplifier stage 16 shown in fig5 the circuit shown in fig7 includes magnetic cells namely a high resistance cell 17 and a low resistance cell 18 across which the voltages r max u00b7 i c and u2212 r min u00b7 i c drop this circuit delivers the tmr signal swing times the current i c which is characteristic of the circuit as an output voltage this produces the reference voltage uref 0 to produce the reference voltage uref 1 it is necessary to multiply by k to halve and to divide by p p indicates the number of cells connected in series the reference voltage uref 1 can be produced using active or passive circuits.