by the wordlines and the data bitlines thus no additional semiconductor processing steps are required if preferred embodiments of the present invention pull up resistors 202 connected to dummy bitlines dl1 and dl2 are of lower resistance than pull up resistors 26 connected to the data bitlines so that much higher current is supplied to the wordline by dummy lines dl1 and dl2 when they are connected to that wordline thus each dummy line when connected to a wordline is the equivalent of multiple loads in a preferred embodiment of the present invention each dummy bitline is the equivalent of 32 5 loads this level is chosen because three quarters of the data bitlines are losing their current to the y address buffer decoder 16 at any time on those two hundred forty 240 bit lines which are not selected by y address buffer decoder 16 the bitline current is being shared between the wordline decoder driver for the selected wordline and the y address buffer decoder 16 the maximum load for a 320 bitline isl rom like that described in this example is eighty 80 full loads and two hundred forty 240 half loads this represents a total maximum loading of two hundred 200 actual loads in this.