that the delay element output of the n th operation circuit 304 n is not used moreover the multiplier 307 multiplies the error signal 303 1 that is an output of the subtracter 109 i by the content of the constant register 306 supplies the resulted product to the n units of the operation circuits 304 1 304 n further if the above mentioned filter coefficient update value u03b4 n is the equation 9 it becomes the learning identification method proposed in paper 5 equ2 fig4 shows a block diagram of an adaptive filter that is applied by this leaning identification method about this adaptive filter the above mentioned power calculation circuit 308 and the divider 309 that receives an output of this power calculation circuit 308 and an output of the subtracter 307 are added to said adaptive filter 107 i next the concrete configuration of the operation circuit 304 1 304 n is explained fig5 is a diagram showing the configuration of the operation circuit 304 of the adaptive filter 107 i this operation circuit 304 receives the delay element input 321 the adder input 322 and the filter coefficient update value 323 performs delay processing convolution operation and coefficient updating and outputs the delay element output 324 and the adder output 325 first the delay element input 321 is supplied to the delay element 326 and the first multiplier 327 the delay element 326 outputs a delayed version of the delay element input 321 as the delay element output 324 the first multiplier 327 multiplies the delay element input 321 by the content of the coefficient register 331 and supplies the resulted product to the first adder 328 the first adder 328 sums up the resulted product of the first multiplier 327 and the adder.