the channel of the gate voltage discharge transistor tr 14 is formed on the gate insulating layer 140 that is formed on the gate electrode 124 of the gate voltage discharge transistor tr 14 electrodes 172 172 1 of the other end of the variable capacitor are formed on the gate insulating layer 140 to overlap with each of the variable capacitor electrodes 125 125 1 while extending in the vertical direction to the extending direction of the gate line in the same layer as the data line gate insulating layer 140 the variable capacitor electrodes 125 125 1 the electrodes 172 172 1 of the other end of the variable capacitor and the gate insulating layer 140 therebetween each form the two variable capacitors csc when voltage is applied to the electrodes 172 172 1 of the other end of the variable capacitor the variable capacitor csc has the capacitance and when the electrodes 172 172 1 of the other end of the variable capacitor is floated the variable capacitor csc is not operated as the capacitor the first extending region 122 of the next stage and the second extending region 123 of the current end are connected to a connecting member 179 as a result the gate on voltage of the next stage is applied to the gate electrode 124 of the gate voltage discharge transistor tr 14 of the previous stage a source electrode having a plurality of grooves and a drain electrode 175 having a plurality of protruding portions are formed on the gate electrode 124 of the gate voltage discharge transistor tr 14 and on the semiconductor layer.