strobe signal stbi the strobe signal is being produced until the strobe pulse width counter 58 counts down the block clock blkck by the number preset thereto accordingly the drive pulse is being produced from the and gate 43 as long as the strobe signal stbi is present then the flip flop 41 is reset by the next enable clock signal ecki by this the flip flop 41 of the head driver 36 2 is set and the output of the flip flop is fed to the first input of the and gate 43 in fig5 the block clock blkck which is produced in response to the termination of the drive of the previous block is applied to the block counter 56 which counts up the clock as a result the pulse width data corresponding to the head driver 36 2 is read from the pulse width designation memory 54 and is set to the strobe pulse width counter thus the strobe signal stb corresponding to the pulse width is produced and the head driver 36 2 is driven during the pulse width likewise the head driver 36 3 36 n are sequentially driven thereafter thus the strobe flip flop 60 produces a strobe signal stb composed of a series of pulses each having the pulse width determined by the flip flop 60 these.