as a result of pull up resistor 148 and the low input and gate 124 will be disabled and output 152 will not represent address bit 17 however if bank 3 112 is present in the memory module 86 then an internal jumper 154 will connect bank connector 156 with bank connector 150 bank connector 150 is connected to bank connector 138 through jumper 142 and bank connector 144 to a logical ground this will establish a path between input 146 to logical ground within memory module 86 and would allow address bit 17 116 to pass through low input and gate 124 and be present as a logical high on output 152 in addition the memory module 86 connects address bits 0 through 14 104 which are present in the cabinet 26 and connects these address bits 0 through 14 along with outputs 132 140 152 to the memory address register 158 the memory address register 158 functions to address the banks 106 108 110 and 112 which are present in the memory module 86 the address from the main memory address register 158 onward in the memory module 86 is contemporary and can be followed by reference to the navsea documents note that the result of the scaling apparatus illustrated in fig1 is that address bit 16 118 is stripped from the memory address unless bank 1 108 is present and address bit 17 116 is stripped from the memory address unless bank 1 108 and bank 3 112 are present this means that for a 64 000 word memory module only bank 0 106 present that both address bits 16 and 17 will be stripped or scaled from the incoming memory address for a 128 000.