in the first dielectric layer 80 and metal conductors 82 have been formed between each of the bond pads 78 and sites 84 where the solder bumps 56 will be placed then a second dielectric layer 86 is formed over the first dielectric layer 80 and the metal conductors 82 and openings 88 are made in the second dielectric layer 86 to expose the sites 84 for the solder bumps 56 as shown in fig3 d fig3 e shows the solder bumps 56 in place on the sites 84 and fig3 f shows the individual die packages 70 after a singulation process fig4 5 and 6 show some of the embodiments possible in practicing the current invention in fig4 the semiconductor die 34 is in a cavity 22 which is next to a much deeper cavity 90 which contains a passive electrical element 92 such as an inductor a resistor or a capacitor the semiconductor die 34 may have a height of about 20 u03bcm and the electrical element 92 may have a height of 1 mm but the height of each can vary with application requirements in addition the widths of the semiconductor die 34 and the electrical element 92 may be different as shown in fig4 thus the pre molded carrier 94 is formed to accommodate the heights and.