while the signal from the switching means 13 fig4 c indicates a logic 34 1 34 then the signal from the detector 5 has a wave form as shown in fig4 a the signal from the detector 5 is fed to the amplifier 27 to be amplified thereat to a predetermined level the signal not shown from the amplifier 27 is fed to the shaping circuitry 28 from which the signal having a wave form as shown in fig4 b is generated to be fed to the and gate 29 through the input terminal 29a therefore the and gate 29 generates a signal with a wave form as shown in fig4 d which signal is then fed to the integrator 30 to be integrated therein the wave form of the output of the integrator 30 is shown in fig4 e the signal from the integrator 30 is then fed to the comparator 31 which compares the magnitude of the supplied signal with that of the reference signal 34 l 34 in fig4 e wherein when the latter is more than the former the signal from the comparator 32 indicates a logic 34 1 34 on the other hand otherwise the signal from the comparator 32 indicates a logic 34 0 34 as shown in fig4 f whilst the and gate 32 receives a signal indicative of a logic 34 1 34 at the end of the time period of the signal from the switching means 13 as shown in fig4 g therefore in the above case the and gate 32 does not generate a control signal which is to be fed to the relay circuit 24 to open the switch 16 it is understood that if the magnitude of.