306 first serial port port 0 312 0 and second serial port 312 1 respectively the programmed device of fig3 c 1 may be one version of that shown in fig1 and or 2b while the embodiments of fig3 c 0 and 3c 1 show programmable circuit portion 314 configured to include two ports to access spm portion 302 other embodiments may include more ports for accessing a same single port section further while fig3 c 0 and 3c 1 show fifo logic 320 other embodiments may have different kind of logic for forwarding requests to spm portion 302 in this way a multi port memory device may include programmable circuits that may be programmed to form two or more ports for accessing a single port device such programmability may enable one device to be deployed that can accommodate multiple different port specifications by allowing the device to be programmed to meet such specifications thus a programmable circuit portion to provide a flexible interface to accommodate various applications while the embodiments of fig3 a to 3c 1 show a programmable circuit portion in which various sections of a port expansion section are created with programmable circuits in other embodiments a programmable circuit portion may include circuit blocks with predetermined functions that are substantially not programmable such embodiments will be.