and the like if the functional regions conform with the quality standards of the manufacturer the printed circuit board or chip carrier is accepted otherwise the printed circuit board or chip carrier is rejected although non functional regions of a bonding strip may also be inspected they need not be inspected to the same quality standards set for the functional regions of the strip these and other features and advantages of the present invention will be more clearly understood from the following detailed description in conjunction with fig2 and 3 fig2 illustrates a section of chip carrier 30 in accordance with one embodiment of the present invention two bonding strips 32 and 34 are shown deposited on the surface of the chip carrier 30 each bonding strip 32 and 34 is typically deposited by electroplating copper and gold onto the chip carrier 30 the type of processes for making the bonding strips 32 and 34 are not critical to the present invention as an example bonding strip 32 may be a power carrying strip such as a positive voltage reference bonding strip 34 may be a ground reference strip although other configurations are possible bonding strips 32 and 34 are illustrated as.