an insulating film for aluminum inter layer respectively 20 a second layer aluminum wiring 21 and 22 a surface passivation film and a tantalum surface passivation film under the structure described above the npn transistor in the region 7 is formed in the relatively thicker epitaxial layer 5 having 8 to 10 u03bcm in thickness to maintain high voltage proof against the power source voltage which is determined by an energy amount supplied to the electro thermal converter element 11 as described above the conventional structure provides the pmos transistor in the epitaxial growth layer 5 a thickness of which is determined by maintaining high voltage proof of the npn transistor thereby requiring an extremely large surface area as the region 9 where the pmos transistor is formed as compared to the region 8 where the nmos transistor is formed contrary to the above the structure according to the present invention provides the pmos transistor and the nmos transistor in the n well and the p well diffusion layers respectively thereby keeping the respective mos transistors with nearly same size the shift register the latch circuit and the logic gate which are constituted in the substrate require only the voltage proof against the power source voltage for example 5 v or less than 5 v which enables the operation of the cmos structure circuit so that a gap length between each of the diffusion layers which constitute mos transistors can be designed in a manner to have a permissible range in order to satisfy the above condition when a process technology enabling to obtain a further fine structure is employed to constitute each components the shift register the latch circuit and the.