and a desired initialization state of the memory and then outputs it to the multiplexer 202 the initialization data is formed by 4 bits or two symbols here there may be a plurality of the trellis encoder 203 for example 12 the 12 bytes outputted from the multiplexer 202 are sequentially inputted to the each of the trellis encoders 203 here the beginning 4 bits of each byte or two symbols can be initialization data namely the initialization controller 204 generates initialization data and then outputs it to the multiplexer 202 and the compatible processor 130 in which the initialization data initializes the memory of the trellis encoder 203 in first two symbol intervals at which the known data symbol stream is started the compatible processor 130 inputs the output of the rs encoder non systematic rs parity holder inserter 121 and the output of the initialization controller 204 and then generates non systematic 20 byte parity to be outputted to the multiplexer 202 of the trellis encoding unit 123 namely since the memory of the trellis encoding unit 123 is initialized by new data but not by data which is interleaved in the data interleaver 122 rs parity must be re generated to substitute the original parity data such procedure is performed in the compatible processor 130 the compatible processor 130.