gate and a substantially deeper junction in the portion of the source and drain removed from the gate and in the proximity of the contact metalization thus the gate to drain capacitance is maintained at a relatively low value providing high speed performance while all of the advantages of the invention are attained following the extra diffusion the wafer is then dipped in an etchant which thins layer 16 somewhat and removes any oxides formed during the phosphorous diffusion after the etchant dip the device is completed by formation of contacts 19 and 20 on the surface of the wafer which may provide a means for connecting the device to an external circuit to other devices on the same substrate or to another layer of interconnect the very high surface concentration of phosphorous has been found to have some unique important and surprising results the silicon at the surface appears to be strained by the diffusion to such an extent that there is no longer preferential etching in the 34 100 34 direction and consequently 34 spiking 34 of the source and drain junctions is substantially reduced in addition the source and drain are driven deeper so that any spikes if such did exist would not be as apt to penetrate the junctions the nature of the source and drain are also changed to enable an alloying cycle of a less critical nature and or to permit pure aluminum to be used rather than an aluminum silicon alloy for metalization another important result of the invented device is that the bulk lifetime of minority carriers is greatly increased so that when being used.