stack 10 referring to fig5 b there is shown the patterning of two horizontally separated sub cells 10 and 11 on bottom electrodes 300 and 301 respectively there is also shown the deposition and planarization of a dielectric refill layer 400 to form planar surface 451 including the upper surfaces of cells 10 and 11 in the general case n horizontally separated mtj sub cells and their bottom electrodes would be formed where n is an integer greater than 1 referring to fig5 c there is shown the formation of a conducting via 50 through the planarized layer 400 and the formation and patterning of two top electrodes 250 and 251 over the planarized surface 451 in fig5 b in the case of n mtj sub cells the top electrode layer would be patterned into n sections with each of n u2212 1 sections electrically connecting an mtj sub cell to the bottom electrode of a neighboring adjacent sub cell through a conducting via referring to fig5 c 1 there is shown the formation of a surrounding dielectric layer 600 the top surface of this layer will be planarized to allow the formation of a bit line 100 and the top via 261 over the top electrode 251 of the last the nth mtj sub cell will be vertically extended so that it allows the top electrode 251 to electrically contact by the bit line it is understood that bottom electrode 300 can contact via 800 shown so that contact to a transistor not shown can be made this connection is shown in fig3 a as is finally understood by a person skilled in the art the preferred.