because e7 is 1 and standard pulses produced are delivered as inputs through and circuit 10 4 or circuit 10 5 to frequency dividing circuit 7 at this time nand circuit 9 21 is intercepted and and circuit 11 3 of memory call up transfer gate circuit 11 is also cut off and and circuit 13 3 of auto manual transfer gate circuit 13 is intercepted as well consequently the routes through which signals can pass are only those for and circuit 11 2 or circuit 11 5 of memory call up tranfer gate circuit 11 and and circuit 13 2 and or circuit 13 4 of auto manual transfer gate circuit 13 as a result standard pulses delivered as inputs to frequency dividing circuit 7 are divided at eight stages in frequency dividing circuit 7 and after the frequency is set to 8 khz are given to reversible counter 8 whereby subtraction starts use of a lower frequency than when memorizing in case of calling or reading out memory values is to shorten the time requied for memory as mentioned under the application no sho 48 95007 next an explanation is made about the detection circuits automatic setting functions to detect a shutter closing signal by means of the first detection circuit 16 for the second detection circuit 17 the detection circuit employed in manual setting an explanation is to be made later the first detection circuit 16 is composed of switching elements 16 1 16 2 16 3 16 16 16 17 16 18 whose gate terminals are connected to the q outputs of respective counting stages 8 1 8 2 8 3 8 16 8 17 8 18 in the reversible counter 8 and and circuit 16 21.