to the rpa memory 22 the rpa memory controller causes chunk 1 to be transferred to the xor engine 62 the xor engine then causes chunk 1 to be stored in buffer location 64a of the intermediate parity buffer 64 the disk array controller 10 then causes a second chunk of data chunk 2 to be transferred to the rpa memory 22 and to the intermediate parity buffer 64 step 120 as with chunk 1 chunk 2 is transferred from the host device 31 through the host interface circuit 16 across the system bus 28 through the rpa controller memory 60 across the memory bus 66 and into the rpa memory 22 while chunk 2 is transferred through the rpa memory controller 60 to the rpa memory 22 the rpa memory controller 60 also causes chunk 2 to be transferred to the xor engine 65 the xor engine 62 then causes chunk 2 to be bit wise xored with the data stored in buffer location 64a of the intermediate parity buffer 64 in step 130 the disk array controller 10 causes a third chunk of data chunk 3 to be transferred to the rpa memory 22 and to the intermediate parity buffer 64 chunk 3 like chunk 1 and chunk 2 above is transferred from the host device 31 through the host interface circuit 16 across the system bus 28 through the rpa controller memory 60 across the memory bus 66 and into the rpa memory 22 while chunk 3 is transferred through the rpa memory controller 60 to the.