the word line next a first sio 2 layer 33 is deposited on the semiconductor substrate 31 as an interlayer insulating layer and a first si 3 n 4 layer 34 is formed on the first sio 2 layer 33 as an etching barrier layer a contact hole which exposes a predetermined portion of the source drain region 32 is formed by selectively etching the first si 3 n 4 layer 34 and the first sio 2 layer 33 subsequently a polysilicon layer is deposited on a resulting structure including the contact hole and a polysilicon plug 35 which partially fills the contact hole is formed using the recess etchback process method a tisi 2 layer 37 is formed on the polysilicon plug 35 and a first tin layer 36 is formed on the tisi 2 layer 37 at this time the tisi 2 layer 37 and the first tin layer 36 function as a barrier layer having a stacked structure the tisi 2 layer 37 is formed in an interface between the polysilicon plug 35 and the tin layer 36 through a thermal process after depositing the tin layer 36 the barrier layer uses a two dimensional nitride material having good heat resistance such as the first tin layer 36 or a three dimensional nitride material i e a tisin tialn or the like to increase an oxide resistance the above mentioned tisi 2 layer 37 forms an ohmic contact between the polysilicon plug 35 and a post bottom electrode and a stacked barrier layer of the tisi 2 layer 37 and the first tin layer 36 play a role of a barrier layer against metal and oxygen diffusion a non reactive ti layer is removed after forming.