300 microns the wafer 230 is flipped so that the active surface 232 faces the top surface 212 of the substrate 210 the flipped wafer 230 is then arranged onto the substrate 210 so as to bond the bumps 238 of the wafer 230 onto the top surface 212 of the substrate 210 the bumps 238 can be bonded to the interconnection pattern 216 of the substrate 210 by either eutectic bonding or using anisotropic conductive film acf the eutectic bonding metallurgically attaches the bumps of the wafer to the substrate by using eutectic preforms in various compositions alternatively the acf consisting of non filled adhesive layer and a thermal setting adhesive layer filled with conductive particles can be placed between the bumps and the substrate for bonding still the bonding should create uniform connection between the bumps 238 of the wafer 230 and the substrate 210 the wafer 230 is electrically connected to the substrate 210 through the bumps 238 and the interconnection pattern 216 by using a glass substrate the cte mismatch between the wafer or die and the glass substrate is relatively small so that thermal stress caused by cte mismatch is greatly reduced in accordance with the embodiment no underfill process is required referring to fig4 a wafer dicing process is performed to cut the wafer 230 into a plurality of dies 231 by using wafer saw technology basically the wafer is cut along the scribe lines referring to fig5 a through hole th drilling process is performed by for example laser drilling to form through holes 240 through the substrate plate 210 the size of the through holes can be about 20 u2013 50 microns afterwards a plating process for example electroplating or electroless plating process.