the bounds of this thermal budget 0034 fig1 shows a cross sectional tem micrograph of a goi structure after layer transfer and selective etching this is the first demonstration of high quality epitaxial ge transfer from a virtual substrate to si using the buried etch stop layer 64 the surface damage induced by the ge exfoliation process is removed using a selective etch rather than a cmp process allowing for very precise control of the transferred ge thickness 66 the thickness 66 of the transferred ge layer 68 is defined by the etch stop layer 64 which is located at the surface of the structure 70 in fig1 the thickness 66 of the transferred ge layer 68 is 1400 u00e5 the reverse selectivity of our cmp process can be used to remove the si rich etch stop relative to the underlying ge device layer leaving a damage free ge surface for device fabrication as described herein the virtual substrates are capped with a thin si passivation layer 70 to protect the ge surface during wafer processing because this layer 70 is epitaxially grown directly on ge it contains a high density of defects resulting from the 4 mismatch between si and ge after bonding and film transfer this layer 70 becomes buried between the lto and ge layers in the final structure as seen in fig1 the effect of the passivation layer 70 will be device specific and no conclusions can be made until actual devices are fabricated however it is speculated that since the passivation layer 70 is very thin lt 100 u00e5 compared to the ge device layer 68 the defects confined to the.