x i via an anisotropic conductive film the ics 621 1 621 2 621 8 further include 14 input pins for receiving 6 bit digital data ddsr ddsg and ddsb for the r g and b respectively a horizontal start signal sth a horizontal clock signal ckh a loading signal ld a reference voltage ref and a horizontal output signal sw an input pin for receiving a horizontal start signal sth and an output pin for sending the horizontal start signal sth to the next stage of x tab chip 601 these input and output pins are electrically connected via an anisotropic conductive film with 16 data terminals 641 disposed on the array substrate 101 in order to prevent a break in connection with the x printed wiring board 701 a pair of dummy terminals 651 1 and 651 2 larger than the data terminals 641 are installed on the array substrate 101 and located on opposite sides of the 16 data terminals 641 this x printed wiring board 701 is a multilayer film including a flexible surface layer film 712 a first layer film 752 and a second layer film 782 the surface layer film 712 has slits 741 for partitioning the film into regions corresponding to the signal line driving ics 621 1 621 2 621 8 respectively 16 data pads 721 corresponding to the signal line driving ics 621 1 621 2 621 8 respectively a pair of dummy pads 731 1 731 2 larger than the data pads 721 and windows 743 for permitting electrical connection of the dummy pads 731 1 731 2 with the data terminals 721 and the dummy terminals 651 1 and 651 2 positioned on the.