detector 34 compares the phase of the two input signals and provides an output pulse the duration of which corresponds to the phase error this output pulse is applied to the charge pump 38 which provides a current output proportional to the phase error this charges the capacitor 40 the voltage across which is applied as the input voltage to the vco 42 the phase detector 34 will continue providing an error signal to the charge pump 38 which will in turn charge the capacitor 40 until the voltage across the capacitor is equal to a voltage necessary for the vco output to have the same frequency as the input from the reference oscillator 44 thus the phase locked loop circuit will lock onto the frequency of the reference signal by varying the voltage input to the vco 42 the data rate is nominally equal to the reference frequency and when the input of the phase detector is switched to receive data the phase lock loop circuit will track the variations in the data rate the charge pump is connected between a supply voltage vcc and ground and in order to provide maximum performance from the phase locked loop circuit it is desirable that the charge pump operate midway between these voltages i e that the voltage at the input to the vco 42 for the nominal output.