of the methods may be run on a single wafer sequentially e g the methods may be run in sequence on a single wafer or simultaneously for example the method 500 may be used to ensure that the cd measurements are within a certain range prior to the peb process while the method 100 may be used to ensure that the cd measurements are within a certain range following the peb process accordingly although shown separately the methods 100 and 500 may be integrated into a single method for real time cd control furthermore in some embodiments a determination may be made as to whether to use the additional baking of the method 100 or the additional exposure of the method 500 based on the cd measurements for example analysis of the cd measurements may reveal that it is more efficient based on time energy requirements overall process flow in the fabrication facility etc to use additional baking or additional exposure referring now to fig6 basic components of an exemplary semiconductor processing system are illustrated the various components may be separate pieces of processing equipment or various components may be combined into a single piece of processing equipment a process flow through the components for wafer or lot 202 includes resist coating 602 pre baking.