layer 235 of masking material e g photoresist is then deposited on wafer 220 fig1 c and patterned such that it coats layer 231 along walls 236 and part way along lower surface 224 and to form a bump 237 facing away from lower surface 224 a layer 238 of conductive seed material e g gold is then applied to wafer 220 and patterned such that it coats all of layers 233 and 235 fig1 d illustrates the subsequent plating of a layer 239 of resilient conductive material e g nickel onto layer 238 as seen in fig1 e wafer 220 is cut to separate die 226 and 228 of fig1 a 11d into respective ic chips 240 and 242 layer 235 is also removed from chips 240 and 242 using a solvent e g acetone thereby forming spring contacts 241 and 243 having contact tips 244 and 245 and linked to bond pads 230 and 232 respectively fig1 is a simplified sectional elevation view of a stack 260 of two ic chips 262 and 264 interconnected using signal paths 270 and 272 formed in accordance with the invention ic chips 262 and 264 are mounted on a substrate 266 having a set of traces 267 bond pad 265 of ic 262 communicates with bond pad 273 of ic 264 through interconnect 270 bond pad 269 of ic 264 communicates with trace 267 through interconnect 277 thus has been shown and described a method for fabricating a vertical signal path on a semiconductor substrate traversing an outer edge of that substrate since.