terminal coupled to the collector terminal of transistor q 514 and an emitter terminal coupled to the emitter terminal of the transistor q 513 and to the fourth bias current source including transistor q 516 and resistor r 515 amplifier circuit 512 accelerates signal transitions at nodes b 1 and b 2 but only after the signals at these nodes have passed through a transistion or cross over point as a result the switching of the signals on nodes b 1 and b 2 starts out u201c slow u201d thereby creating very little electromagnetic noise and then speeds up to complete the transition before a next bit time as a result the processing of the differential input signal ip and in is completed at high speed within a low timeframe but without generating large amounts of electromagnetic noise the first differential amplifier 506 of fig5 a and 5b includes transistors q 50 and q 51 a resistor network r 54 a first bias current source formed with transistor q 57 and resistor r 512 and a second bias current source formed with transistor q 58 and resistor r 512 the transistor q 50 has a base terminal coupled to a first output port of the receiver circuit 504 and to a first output port b 1 of the transition accelerating circuit 512.