and d alternatively the logic circuit 2 may turn off the first circuit 5 turn on the second circuit 6 at the same time and cause the output 7 to output the second voltage level 4 based on the input signals a b c and d referring to fig3 again in the first preferred embodiment of the invention the first circuit 5 comprises a plurality of first transistors 55 coupled in parallel each of the first transistors 55 is coupled to a corresponding one of the inputs a b c and d it is noted that the first circuit 5 could comprise four input units 50 with only a first input unit 50 shown in fig3 for the sake of brevity as shown in fig3 the first input unit 50 comprises a plurality of first transistors 55 for respectively receiving the input signals a b c and d each of the remaining input units 50 not shown in fig3 may have the same structure as that of the first input unit 50 besides each of the input units 50 receives the input signals a b c and d in a sequence different from that of each of the other input units 50 for example a second input unit 50 not shown in fig3 are coupled to the input signals d a b and c a.