in this case also a non overlapping output waveform is generated however the output frequency is double of the previous embodiments being fully differential this circuit provides a truly 50 duty cycle output waveform as errors due to minor mismatches in the differential transistors balance off still referring to fig6 a the circuit is explained in more detail resistive strings r a u2212 r e u2212 r a and r d u2212 r b u2212 r d are both coupled between v dd and a reference potential typically ground as shown in fig6 a the node between r a and r e is labelled v h and the node between r e and r a is labelled v l in the identical switching arrangement as that of fig3 a for switching means s 1 to s 4 the high side of r b couples via s 1 u03c6 2 and s 2 u03c6 1 to the positive and negative input of transconductor 32 respectively the low side of r b couples via s 3 u03c6 1 and s 4 u03c6 2 to the positive and negative input of transconductor 32 respectively the plus and minus output of transconductor 32 couples to the plus and minus input of dual output comparator 66 respectively the plus and minus outputs of comparator 66 feed sr latch 38 coupled between nodes v h and v l are in series switching means s 5 u03c6 2 s 6 u03c6 1 s 7 u03c6 2 s 8 u03c6 1 the junction between s 6 u03c6 1 and s 7 u03c6 2 is node vcap a capacitor 64 a.