as noted above before the crack width and delay time values are displayed on the screen at step 128 the system then checks at step 132 whether any of the pulse widths are equal to zero and if so at step 134 the delay is set to zero for any channel whose pulse width is equal to zero the system then writes all data to the log file at step 136 and then waits for the next event the interrupt routine of fig1 is activated at step 200 at the end of each event or a two second time out as illustrated in fig1 a an interrupt is issued at step 202 and if it is determined at step 204 that the interrupts are not enabled the interrupt request is cleared at step 206 the interrupts are reenabled at step 208 and the system returns from the interrupt at step 210 however if it is determined at step 204 that the interrupts are enabled it is then determined at step 212 whether the program is busy if the program is busy the return flag is set to a maximum value of 256 at step 214 and the interrupts are reenabled at step 208 before the system returns from the interrupt at step 210 however if the program is determined not to be busy at.