and sel 3 respectively the ignition timing signal input circuit 20 is connected to a terminal g of the distributing circuit 31 and outputs a logical 34 high 34 signal when the ignition timing signal igm is a logical 34 high 34 signal and outputs a logical 34 low 34 signal when the ignition timing signal igm is a logical 34 low 34 signal when the ignition timing signal igm is 34 high 34 the input circuit 20 allows the distributing circuit 31 to receive and supply the distributing signals sel 1 sel 2 and sel 3 the output of the signal input circuit 20 is also connected to the base of the switching transistor 24c through a differentiation circuit and an invertor when the ignition timing signal igm changes from 34 high 34 to 34 low 34 the transistor 24c discharges the capacitor 24b and the transistor 24c outputs a 34 high 34 signal to the terminal g1a of the distribution circuit 31 which prohibits the distribution circuit 31 from providing any output signals this prohibiting time period is determined from the time constants of a charging resistor 24a and the capacitor 24b a terminal g2b of the distributing circuit 31 is connected to a voltage watching circuit 43 when the voltage watching circuit 43 detects the power decrease it sends a signal to the terminal g2b which disables the distributing circuit 31 a driving circuit 25 for the thyristor 25a turns the thyristor 25a on when the ignition timing signal igm changes from 34 high 34 to 34 low 34 so that the condenser 26 starts charging a switching circuit 27 turns on in accordance with the logical 34 high 34 signal of the first distributing signal sel1 and turns off.