synchronous dram sdram double data rate ddr sdram ddr2 sdram ddr3 sdram etc the peripherals 34 may include peripheral 18 shown in fig1 and may include any desired circuitry depending on the type of system 30 for example in one embodiment the system 30 may be a mobile device and the peripherals 34 may include devices for various types of wireless communication such as wifi bluetooth cellular global position system etc the peripherals 34 may also include additional storage including ram storage solid state storage or disk storage the peripherals 34 may include user interface devices such as a display screen including touch display screens or multitouch display screens keyboard or other keys microphones speakers etc turning now to fig4 a flow diagram of one embodiment of a method for operating a switch circuit is shown in the embodiment shown method 40 includes activation of a switch circuit by asserting an enable signal block 42 using switch circuit 20 as an example activation thereof may be accomplished by asserting the enable_h signal at a logic high voltage the logic high voltage may be received on the gate terminals of transistors q 2 q 3 and q 6 transistor q 2 is an nmos transistor in the embodiment shown in fig2 and thus activates responsive to the assertion of the enable_h signal transistors q 3 and q 6 which are pmos transistors that function as protection devices in the embodiment shown in fig2 are deactivated responsive to the assertion of the enable_h.