of the intended prioritization application_number US 201615348157 A description referring now to fig1 a heterogeneous computer 10 may have one or more general processing units 14 a and one or more specialized processing units 14 b these two processing units 14 a and 14 b each having a different architecture the two processing units 14 a and 14 b may be in the form of single chip heterogeneous processor schp system 12 invigorating the processor units 14 a and 14 b on a single integrated circuit substrate 15 the processor system 12 may communicate with an external memory 18 for example comprised of dynamic random access memory dram this communication may be managed by a memory controller 20 as will be discussed further below the general processing unit 14 a typically termed computer processing unit cpu may execute a complex instruction set for general purpose scalar processing examples of such general processors include those supporting the x86 instruction set architecture capable of executing standard operating systems such as windows osx linux and the like in contrast the specialized processing units 14 b may execute a specialized instruction set for example on stream or vector data examples of specialized processing units 141 are graphic processing units gpus or visual processing units vpus operating on video stream data or audio processors operating on audio stream data each amenable to highly parallelizable processes henceforth these devices will be termed gpus without intending loss of generality general processing units.