to display panel 21 display panel 21 and pcb 22 respectively comprise connection lines not shown for connecting fpcs 231 u02dc 23 n since the structures of display panel 21 and pcb 22 are well known to those skilled in the art thus description thereof is omitted fpc 231 is given as an example fpc 231 comprises a substrate 24 function lines f 1 f 2 and dummy lines d 1 u02dc d 8 substrate 24 comprises periphery areas 241 243 and an intermediate area 242 intermediate area 242 is disposed between periphery areas 241 and 243 and comprises function lines f 1 and f 2 signals are transmitted between display panel 21 and pcb 22 through function lines f 1 and f 2 periphery area 241 comprises layout region 251 and 252 and a rough region 253 rough region 253 is roughed for increasing an adhesion capability between rough region 253 and the acf and is disposed between layout regions 251 and 252 the width of rough region 253 is between 2 cm and 4 cm in this embodiment the width of rough region 253 is between 2 3 cm and 4 cm or between 2 cm and 2 3 cm layout region 251 comprises dummy lines d 1 and d 2 layout region 252 comprises dummy lines d 3 and d 4 dummy lines d 1 u02dc d 4 cannot transmit signals in this embodiment the lengths of dummy lines d 1 and d 2 are equal to that of dummy lines d 3 and d 4 the number of dummy lines within layout region 251 is equal to that of the dummy lines within layout region 252 but the disclosure is not limited thereto periphery area 243 comprises layout region 261 and 262 and a rough region.