The blue instruction, which was due to be fetched during cycle 3, is stalled for one cycle, as is the red instruction after it.
مثلاً در پردازنده های ARM و MIPS تعدادمراحل، ۵ است که شامل موارد زیر است:# fetch:بیرون کشیدن دستورالعمل از حافظه.