 The first sub-unit reads the address and decodes it, the next "fetches" the values at those addresses, and the next does the math itself.With pipelining the "trick" is to start decoding the next instruction even before the first has left the CPU, in the fashion of an assembly line, so the address decoder is constantly in use.Any particular instruction takes the same amount of time to complete, a time known as the "latency", but the CPU can process an entire batch of operations much faster and more efficiently than if it did so one at a time.