 The vector instructions were applied between registers, which is much faster than talking to main memory.Whereas the STAR would apply a single operation across a long vector in memory and then move on to the next operation, the Cray design would load a smaller section of the vector into registers and then apply as many operations as it could to that data, thereby avoiding many of the much slower memory access operations.The Cray design used pipeline parallelism to implement vector instructions rather than multiple ALUs.