 The PowerQUICC III processors are based on a 32-bit Power ISA v.2.03 core called e500, introduced in 2003.It has a dual issue, seven-stage pipeline with double precision FPUs, 32/32 KiB data and instruction L1 caches, multiple Gigabit Ethernet, PCI and PCIe, RapidIO, DDR/DDR2 memory controllers, and security accelerators.Speeds ranges from 533 MHz up to 1.5 GHz.