 The compilers used with the systems were expected to dedicate more time during compilation to making effective use of the registers and cleaning the instruction stream.By doing instruction scheduling in the compiler, this design avoided the problems and complexity of dynamic instruction scheduling (where instructions for multiple functional units must be selected carefully in order to avoid interdependencies between intermediate values) encountered in superscalar designs such as Digital Equipment Corporation's Alpha.In some respects, the VLIW design can be thought of as "super-RISCy", as it offloads the instruction selection process to the compiler as well.