sentences:  The caches on the MicroVAX processor boards had a capacity of 16 KB (4,096 4-byte lines) and were implemented with eleven 2 KB (4-bit by 4,096-word) SRAMs and twenty transistor–transistor logic (TTL) devices.The cache control logic was implemented with fifteen devices, mostly consisting of programmable array logic (PAL) devices.The caches on CVAX processor boards differed only in the capacity