sentences:  As described in "JAXA's LSI (MPU/ASIC) roadmap", this V70 variant is designated "32bit MPU (H32/V70)", whose development, probably including the testing (QT) phase, was "from the middle of 1980s to early 1990s".This variant was used until its replacement, in 2013, by the HR5000 64-bit, 25MHz microprocessor, which is based on the MIPS64-5Kf architecture, fabricated by HIREC, whose development was completed around 2011.